JPS6158058A - 半導体記憶装置 - Google Patents
半導体記憶装置Info
- Publication number
- JPS6158058A JPS6158058A JP59178269A JP17826984A JPS6158058A JP S6158058 A JPS6158058 A JP S6158058A JP 59178269 A JP59178269 A JP 59178269A JP 17826984 A JP17826984 A JP 17826984A JP S6158058 A JPS6158058 A JP S6158058A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- word line
- data
- row address
- cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Image Input (AREA)
- Controls And Circuits For Display Device (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59178269A JPS6158058A (ja) | 1984-08-29 | 1984-08-29 | 半導体記憶装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59178269A JPS6158058A (ja) | 1984-08-29 | 1984-08-29 | 半導体記憶装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6158058A true JPS6158058A (ja) | 1986-03-25 |
| JPH0338678B2 JPH0338678B2 (enrdf_load_html_response) | 1991-06-11 |
Family
ID=16045528
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59178269A Granted JPS6158058A (ja) | 1984-08-29 | 1984-08-29 | 半導体記憶装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6158058A (enrdf_load_html_response) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63187495A (ja) * | 1987-01-30 | 1988-08-03 | Fujitsu Ltd | メモリ装置 |
| US4962486A (en) * | 1987-06-10 | 1990-10-09 | Fujitsu Limited | Boundary-free semiconductor memory device having a plurality of slide access memories |
| US4965770A (en) * | 1986-09-26 | 1990-10-23 | Hitachi, Ltd. | Semiconductor memory capable of simultaneously reading plural adjacent memory cells |
| JPH04109339A (ja) * | 1990-08-29 | 1992-04-10 | Mitsubishi Electric Corp | レジスタ番地指定回路及びそれを備えたデータ処理装置 |
| US5274596A (en) * | 1987-09-16 | 1993-12-28 | Kabushiki Kaisha Toshiba | Dynamic semiconductor memory device having simultaneous operation of adjacent blocks |
| JPH0737378A (ja) * | 1993-07-19 | 1995-02-07 | Nec Corp | メモリ素子 |
-
1984
- 1984-08-29 JP JP59178269A patent/JPS6158058A/ja active Granted
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4965770A (en) * | 1986-09-26 | 1990-10-23 | Hitachi, Ltd. | Semiconductor memory capable of simultaneously reading plural adjacent memory cells |
| JPS63187495A (ja) * | 1987-01-30 | 1988-08-03 | Fujitsu Ltd | メモリ装置 |
| US4962486A (en) * | 1987-06-10 | 1990-10-09 | Fujitsu Limited | Boundary-free semiconductor memory device having a plurality of slide access memories |
| US5274596A (en) * | 1987-09-16 | 1993-12-28 | Kabushiki Kaisha Toshiba | Dynamic semiconductor memory device having simultaneous operation of adjacent blocks |
| JPH04109339A (ja) * | 1990-08-29 | 1992-04-10 | Mitsubishi Electric Corp | レジスタ番地指定回路及びそれを備えたデータ処理装置 |
| JPH0737378A (ja) * | 1993-07-19 | 1995-02-07 | Nec Corp | メモリ素子 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0338678B2 (enrdf_load_html_response) | 1991-06-11 |
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