JPS6156458A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6156458A
JPS6156458A JP17976584A JP17976584A JPS6156458A JP S6156458 A JPS6156458 A JP S6156458A JP 17976584 A JP17976584 A JP 17976584A JP 17976584 A JP17976584 A JP 17976584A JP S6156458 A JPS6156458 A JP S6156458A
Authority
JP
Japan
Prior art keywords
transistor
protection
resistor
region
diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17976584A
Other languages
Japanese (ja)
Inventor
Takeshi Hamaya
毅 濱谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP17976584A priority Critical patent/JPS6156458A/en
Publication of JPS6156458A publication Critical patent/JPS6156458A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bipolar Transistors (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To keep the area occupied by the following elements on a semiconductor substrate to the minimum by a method wherein a protection diode for guarding against static breakdown and protection resistors are formed in a transistor island region in an integral body. CONSTITUTION:A buried layer 10a immediately under the emitter region 11 and the collector regions 12 of a transistor 2 and buried layer 10b immediately under an N<+> type region 13 for base electrode lead-out are provided by alienation from each other. Such a construction allows the interposal of resistor component made of an N type epitaxial layer 14 on the side of the base of the transistor 2. The resistor thus formed has the function as a protection resistor 8. On the other hand, in order to produce a protection diode 7, the base region of the transistor 2, i.e. the epitaxial layer 14 is made as the cathode, and a metallic layer 15 in contact with the top of this epitaxial layer is made as the anode. It is sufficient to form so-called a Schottky diode. In such a manner, the protection diode 7 and the protection resistor 8 are formed in the island region of the transistor 2 in an integral body.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は半導体装置に係り、特に静電破壊防護対策が施
された半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device provided with electrostatic damage protection measures.

従来例の構成とその問題点 半導体装置に配設された外部リード端子と内部回路との
間に、保護ダイオードや保護抵抗を介在させ、半導体装
置を静電破壊から防護しようとする対策はすでに周知で
ある。Conventional configuration and its problems Countermeasures to protect semiconductor devices from electrostatic damage by interposing protective diodes or protective resistors between external lead terminals arranged on semiconductor devices and internal circuits are already well known. It is.

第１図は、ＰＮＰトランジスタのベース側が外部リード
端子に導出される回路構成に上記の対策を施した一実施
例を示す。図において、半導体装置１の中のトランジス
タ２１，３および抵抗４，５は、たとえば、人ＬＳ（人
ｄｖａｎｃｅｄ　Ｌｏｗ　ｐｏｗｅｒ−３ｃｈｏｔｔｋ
ｙ　）　−Ｔ　Ｔ　Ｌの入力側に配置された回路の一部
を構成する。なお、６は人ＬＳ−ＴＴＬの入力端子を示
す。又、回路構成上、必須の前記回路素子群とは別に、
トランジスタ２のベースと外部リード端子６との間には
、保護ダイオード７および保護抵抗８が介在されること
が一般的である。FIG. 1 shows an embodiment in which the above-described measures are taken in a circuit configuration in which the base side of a PNP transistor is led out to an external lead terminal. In the figure, transistors 21 and 3 and resistors 4 and 5 in the semiconductor device 1 are, for example, LS (advanced low power-3chottk).
y) - forms part of the circuit placed on the input side of TTL. Note that 6 indicates an input terminal of the human LS-TTL. In addition, in addition to the circuit element group that is essential for the circuit configuration,
Generally, a protection diode 7 and a protection resistor 8 are interposed between the base of the transistor 2 and the external lead terminal 6.

すなわち、保護ダイオード７は特に負のサージ電圧に対
して、保護抵抗８は特に正のサージ電圧て対してそれぞ
れ防諜作用を有する。ＰＮ接合による素子分離法を用い
た半導体装置の場合には、Ｐ型半導体基板上にＮ型エピ
タキシャル層を形成シ、この中にトランジスタ２を形成
するならば、保護ダイオード７に相当するものが必然的
に形成されるので、保護ダイオード７を作るだめの島領
域を特如用意する必要がない。したがって保護抵抗８を
設けるだめの島領域を用意するだけでよい。That is, the protection diode 7 has a counterintelligence effect especially against negative surge voltages, and the protection resistor 8 has a counterintelligence effect especially against positive surge voltages. In the case of a semiconductor device using an element isolation method using a PN junction, an N-type epitaxial layer is formed on a P-type semiconductor substrate, and if the transistor 2 is to be formed in this layer, something corresponding to the protection diode 7 is inevitably required. Therefore, there is no need to prepare a special island area for forming the protection diode 7. Therefore, it is only necessary to prepare an island area in which the protective resistor 8 is provided.

又、絶縁膜てよる素子分離法を用いた場合でも、トラン
ジスタ２のペース領域に相当するＮ型エピタキシャル層
と同エピタキシャル層上に、たとえば、アルミニウム（
Ａｌ　）や白金（Ｐｔ）などの金属を接触させた、いわ
ゆる、ショットキバリアダイオードを形成するならば、
トランジスタ２の島領域内に保護ダイオード了が形成で
きるので、これも又、島領域を用意することが不要であ
る。しかし、この絶縁膜素子分離法であっても、以然と
して、保護抵抗８を設けるための領域は必要である。Furthermore, even when an element isolation method using an insulating film is used, for example, aluminum (
If a so-called Schottky barrier diode is formed by contacting a metal such as Al ) or platinum (Pt),
Since the protection diode can be formed within the island region of the transistor 2, it is also unnecessary to provide an island region. However, even with this insulating film element isolation method, a region for providing the protective resistor 8 is still necessary.

このために、保護素子の半導体基板上に占める面積が増
大するという不都合が存在していた。For this reason, there has been a problem that the area occupied by the protection element on the semiconductor substrate increases.

発明の目的 本発明は、上記事情にかんがみてなされたものであり、
すなわち、静電破壊防護用素子の半導体基板上に占める
面積が最小限で形成できる半導体装置を提供する目的を
有する。Purpose of the Invention The present invention has been made in view of the above circumstances, and
That is, it is an object of the present invention to provide a semiconductor device in which an electrostatic breakdown protection element can be formed with a minimum area occupied on a semiconductor substrate.

発明の構成 本発明は、要約するに、ＰＮＰトランジスタのペース側
が外部リード端子に導出され、加えて前記ペース側に静
電破壊防護用の保護ダイオードと保護抵抗が介在された
半導体装置において、前記保護ダイオードおよび保護抵
抗は、前記ＰＮＰ　トランジスタの島領域内に一体的に
作り込まれている半導体装置であり、これによれば、前
記静電破壊防護用素子の半導体基板上に占める面積は最
小限に抑止される。SUMMARY OF THE INVENTION To summarize, the present invention provides a semiconductor device in which the pace side of a PNP transistor is led out to an external lead terminal, and in addition, a protective diode and a protective resistor for electrostatic breakdown protection are interposed on the pace side. The diode and the protective resistor are semiconductor devices that are integrally formed within the island region of the PNP transistor. According to this, the area occupied by the electrostatic breakdown protection element on the semiconductor substrate is minimized. Deterred.

実施例の説明　　　　　　　　　　　　　　　　　　　
　　〒第２図は本発明の一実施例にかかる半導体装置の
断面図を示す。なお、以下の説明でさらにその内容が明
らかになろうが、第２図は、第１図示のトランジスタ２
．保護ダイオード７および保護抵抗８が一体的に作り込
まれたものを示す。まず、トランジスタ２を形成するに
は周知の製造方法でよい。すなわち、Ｐ型半導体基板９
上にＮ型埋込層１０２Ｌおよび１０ｂが形成されるが、
トランジスタ２のエミッタ領域１１とコレクタ領域１２
の直下部に埋込層１０＆を形成し、ベース電極取り出し
のためのＮ＋型領領域１３直下部には埋込層１ｏｂが互
いに離間して設けられたことに注目されたい。このよう
に構成するならば、トランジスタ２のペース側にはＮ型
エピタキシャル層１４による抵抗成分が介在されるもの
となる。この抵抗成分は、Ｎ型エピタキシャル層１４の
比抵抗とその厚みｔ、さらに埋込層１０ａと１０ｂとの
距離ｅによってほぼ定められる。こうして形成された抵
抗は、第１図示の保護抵抗８としての作用を有する。一
方、２ｇ１図示の保護ダイオード７を作るためには、こ
れもすでに周知であるが、トランジスタ２のベース領域
、すなわちエピタキシャル層１４をカソード、このエピ
タキシャル層上に接触させた金属層１５をアノードとす
る、いわゆるショットキバリアダイオ−ドを形成すれば
よい。第１図示の回路構成は、トランジスタ２のコレク
タと保護ダイオード７のアノードは共に接地電位である
ので、トランジスタ２のコレクタ領域１２の一部を金属
層１５で共通接続し、この接続点を接地すればよい。な
お、第２図の中で１６はトランジスタ２のペース電極で
ちり、この電極は外部リード端子６へ接続される。１７
はトランジスタ２の土ミッタ電極、１８は酸化膜、１っ
け素子分離用の絶縁膜である。以上のようにして、トラ
ンジスタ２の島領域内に、保護ダイオード７および保護
抵抗８が一体的に形成される。Description of examples
FIG. 2 shows a cross-sectional view of a semiconductor device according to an embodiment of the present invention. Although the content will become clearer in the following explanation, FIG. 2 shows the transistor 2 shown in FIG.
．． A protection diode 7 and a protection resistor 8 are shown integrated. First, the transistor 2 may be formed by a well-known manufacturing method. That is, the P-type semiconductor substrate 9
N-type buried layers 102L and 10b are formed thereon,
Emitter region 11 and collector region 12 of transistor 2
It should be noted that a buried layer 10& is formed directly under the N+ type region 13 for taking out the base electrode, and buried layers 1ob are provided spaced apart from each other directly under the N+ type region 13 for taking out the base electrode. With this configuration, a resistance component due to the N-type epitaxial layer 14 is interposed on the base side of the transistor 2. This resistance component is approximately determined by the resistivity of the N-type epitaxial layer 14, its thickness t, and the distance e between the buried layers 10a and 10b. The resistor thus formed functions as the protective resistor 8 shown in the first diagram. On the other hand, in order to make the protection diode 7 shown in FIG. 2g1, the base region of the transistor 2, that is, the epitaxial layer 14 is used as a cathode, and the metal layer 15 in contact with this epitaxial layer is used as an anode, which is also already well known. , a so-called Schottky barrier diode may be formed. In the circuit configuration shown in FIG. 1, since the collector of the transistor 2 and the anode of the protection diode 7 are both at ground potential, a part of the collector region 12 of the transistor 2 is commonly connected by a metal layer 15, and this connection point is grounded. Bye. In FIG. 2, reference numeral 16 indicates a space electrode of the transistor 2, and this electrode is connected to the external lead terminal 6. 17
1 is a soil emitter electrode of the transistor 2, and 18 is an oxide film, an insulating film for isolation of one element. As described above, the protection diode 7 and the protection resistor 8 are integrally formed within the island region of the transistor 2.

第３図（２Ｌ）は本発明のもう一つの実施例の平面図、
同（ｂ）はその人−入断面図を示す。なお、第２図と同
一個所は同じ番号を与えた。第３図は、埋込層１ｏの一
部である幅狭部２ｏを、トランジスタ２のエミッタ領域
１１およびコレクタ領域１２の直下部より、ペース電極
１６側に向けて設けた構造図である。このように構成す
るならば、トランジスタ２のベース側には、幅狭部２Ｏ
Ｋよる抵抗成分が介在され、この抵抗成分は、第１図示
の保護抵抗８として作用する。なお、幅狭部２ｏの抵抗
値はその層抵抗、長さおよび幅によって定められる。FIG. 3 (2L) is a plan view of another embodiment of the present invention;
(b) shows a cross-sectional view of the person. Note that the same parts as in Figure 2 are given the same numbers. FIG. 3 is a structural diagram in which a narrow portion 2o, which is a part of the buried layer 1o, is provided from directly below the emitter region 11 and collector region 12 of the transistor 2 toward the space electrode 16 side. With this configuration, the base side of the transistor 2 has a narrow portion 2O.
A resistance component due to K is interposed, and this resistance component acts as the protective resistor 8 shown in the first diagram. Note that the resistance value of the narrow portion 2o is determined by its layer resistance, length, and width.

発明の効果 以上実施例で説明したように、本発明の半導体装置によ
れば、静電破壊防護用の保護ダイオードおよび保護抵抗
は、本来回路構成上必要なトランジスタの島領域内に一
体的に形成できるので、これらが半導体基板上に占める
面積は最小限に抑止され、その実用的効果は大きい。Effects of the Invention As explained in the embodiments above, according to the semiconductor device of the present invention, the protective diode and protective resistor for electrostatic discharge protection are integrally formed within the island region of the transistor, which is originally necessary for the circuit configuration. Therefore, the area occupied by these on the semiconductor substrate can be minimized, and the practical effect is great.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は、本発明を説明するために用いた回路図、第２
図は本発明の一実施例にかかる断面図、第３図は本発明
のもう一つの実施例を示し、同図、、（２Ｌ）は平面図
、同図（ｂ）はその断面図を示す。 １・・・・・・半導体装置、２，３・・・・・・トラン
ジスタ、４．５・・・・・・抵抗、６・・・・・・外部
リード端子、７・・・・・・保護ダイオード、８・・・
・・・保護抵抗、９・・・・・・Ｐ型半導体基板、１０
ａ、１０ｂ・・・・・・埋込層、１１・・・・・・エミ
ッタ領域、１２・・・・・・コレクタ領域、１３・・・
・・・Ｎ１領域、１４・・・・・・エピタキシャル層、
１５・・・・・・金属層、１６・・・・・・ペース電極
、１７・・・・・・エミッタ電極、１８・・・・・・酸
化膜、１９・・・・・・素子分離用絶縁膜、２゜・・・
・・・幅狭部。 代理人の氏名　弁理士　中　尾　敏　男　ほか１名第１
図 第　２　図 １ＯｂｌＯユ　　９Figure 1 is a circuit diagram used to explain the present invention, Figure 2 is a circuit diagram used to explain the present invention.
The figure shows a cross-sectional view of one embodiment of the present invention, FIG. 3 shows another embodiment of the present invention, FIG. 2L shows a plan view, and FIG. . 1... Semiconductor device, 2, 3... Transistor, 4.5... Resistor, 6... External lead terminal, 7... Protection diode, 8...
...protective resistor, 9...P-type semiconductor substrate, 10
a, 10b...Buried layer, 11...Emitter region, 12...Collector region, 13...
... N1 region, 14 ... epitaxial layer,
15...Metal layer, 16...Pase electrode, 17...Emitter electrode, 18...Oxide film, 19...For element isolation Insulating film, 2°...
...Narrow part. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure 1 OblOyu 9

Claims (4)

【特許請求の範囲】[Claims] （１）ＰＮＰトランジスタのベース側が外部リード端子
に導出され、加えて前記ベース側に静電破壊防護用の保
護ダイオードと保護抵抗が介在され、前記保護ダイオー
ドおよび保護抵抗は、前記ＰＮＰトランジスタの島領域
内に一体的に作り込まれていることを特徴とする半導体
装置。(1) The base side of the PNP transistor is led out to an external lead terminal, and in addition, a protective diode and a protective resistor for electrostatic damage protection are interposed on the base side, and the protective diode and protective resistor are connected to the island region of the PNP transistor. A semiconductor device characterized by being integrally built into a semiconductor device. （２）保護ダイオードは、ショットキバリアダイオード
であることを特徴とする特許請求の範囲第１項記載の半
導体装置。(2) The semiconductor device according to claim 1, wherein the protection diode is a Schottky barrier diode. （３）保護抵抗は、エピタキシャル層で形成されたこと
を特徴とする特許請求の範囲第１項又は第２項記載の半
導体装置。(3) The semiconductor device according to claim 1 or 2, wherein the protective resistor is formed of an epitaxial layer. （４）保護抵抗は、埋込層で形成されたことを特徴とす
る特許請求の範囲第１項又は第２項記載の半導体装置。(4) The semiconductor device according to claim 1 or 2, wherein the protective resistor is formed of a buried layer.
JP17976584A 1984-08-28 1984-08-28 Semiconductor device Pending JPS6156458A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17976584A JPS6156458A (en) 1984-08-28 1984-08-28 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17976584A JPS6156458A (en) 1984-08-28 1984-08-28 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS6156458A true JPS6156458A (en) 1986-03-22

Family

ID=16071492

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17976584A Pending JPS6156458A (en) 1984-08-28 1984-08-28 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS6156458A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0775367A1 (en) * 1994-07-28 1997-05-28 California Micro Devices, Inc. Semiconductor device with integrated rc network and schottky diode
WO1999017369A1 (en) * 1997-09-30 1999-04-08 Infineon Technologies Ag Integrated circuit with semiconductor comprising a structure for protection against electrostatic discharges
JP2012506630A (en) * 2008-10-24 2012-03-15 エプコス アクチエンゲゼルシャフト Bipolar transistor having n-type base and method for manufacturing the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5172286A (en) * 1974-12-20 1976-06-22 Fujitsu Ltd HANDOTA ISOCHI
JPS533071A (en) * 1976-06-29 1978-01-12 Nec Corp Semiconductor device
JPS5988872A (en) * 1982-11-12 1984-05-22 Mitsubishi Electric Corp Semiconductor integrated circuit device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5172286A (en) * 1974-12-20 1976-06-22 Fujitsu Ltd HANDOTA ISOCHI
JPS533071A (en) * 1976-06-29 1978-01-12 Nec Corp Semiconductor device
JPS5988872A (en) * 1982-11-12 1984-05-22 Mitsubishi Electric Corp Semiconductor integrated circuit device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0775367A1 (en) * 1994-07-28 1997-05-28 California Micro Devices, Inc. Semiconductor device with integrated rc network and schottky diode
EP0775367A4 (en) * 1994-07-28 2000-04-19 Micro Devices Corp California Semiconductor device with integrated rc network and schottky diode
WO1999017369A1 (en) * 1997-09-30 1999-04-08 Infineon Technologies Ag Integrated circuit with semiconductor comprising a structure for protection against electrostatic discharges
US6441437B1 (en) 1997-09-30 2002-08-27 Infineon Technologies Ag Integrated semiconductor circuit with protective structure for protection against electrostatic discharge
JP2012506630A (en) * 2008-10-24 2012-03-15 エプコス アクチエンゲゼルシャフト Bipolar transistor having n-type base and method for manufacturing the same

Similar Documents

Publication Publication Date Title
US5548134A (en) Device for the protection of an integrated circuit against electrostatic discharges
JPS6358380B2 (en)
JPH0669501A (en) Diode structure for protection of pad against static discharge in integrated circuit
JPH0324791B2 (en)
JPS6156458A (en) Semiconductor device
EP0202646B1 (en) Input protection device
JP2579989B2 (en) Electrostatic discharge protection device
JP4479041B2 (en) Semiconductor device and manufacturing method thereof
US5466959A (en) Semiconductor device for influencing the breakdown voltage of transistors
JPS5815277A (en) Input protecting circuit
JPH069208B2 (en) Semiconductor device
JPH0441499B2 (en)
JPS60103658A (en) Semiconductor ic
JPH0629466A (en) Semiconductor integrated circuit
JPH06350032A (en) Wiring structure of semiconductor device
JPH09181335A (en) Semiconductor device
JPH0454978B2 (en)
JPH0237112B2 (en)
JPH03154374A (en) Input end protecting structure of integrated circuit
JPH0511667B2 (en)
JPS61182251A (en) Semiconductor device
JPS62263670A (en) Semiconductor device
JPS6080273A (en) Semiconductor device of high withstand voltage
JPH11274519A (en) Surge protecting element
JPH0475660B2 (en)