JPS615330A - Information processor - Google Patents

Abstract

PURPOSE:To decrease the processing quantity of a CPU and to process information at a high speed by processing the coordinate signals sent from a coordinate input device after sorting then into those of a display area and a control area. CONSTITUTION:The coordinate signals X-Z of a coordinate input device 5 are sent to a signal conversion processor 9 and held by data holding circuit 10a-10c Then the signals X-Z are compared with the values set previously by X and Y comparators 11a and 11b. Thus the areas from which those coordinate signals are delivered are decided within the device 5. Then these signals are separated from each other. The coordinates signals of a display area are converted into display signals by arithmetic circuits 17a and 17b according to the resolution of a display device. While the coordinate signals of a control area are converted into the control codes by a decoder 20. The coordinate signals delivered from an undefined area are processed by a separating circuit or converted into the unused codes.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an information processing apparatus in which a CPU, a coordinate input device, a display device, etc. are connected, and graphics are created and edited by the coordinate input device.

Configuration of conventional example and its problems In general, in an information processing system equipped with a coordinate input device, the coordinate input device has three coordinate input sections as shown in FIG.
It is used in two areas.

') Display area 1 for displaying figures etc. on the display device, control area 2 for giving instructions to the CPU central processing unit, undefined areas that are neither display area 1 nor control area 2 but are not defined as information areas. This is definition area 3. Among the coordinate signals from display area 1, control area 2, undefined area 3, etc., if the signal from display area 1 has a higher resolution than the display signal for display on the display device, it will not be displayed on the display device. The resolution must be reduced to the resolution of the display signal for display. Similarly, it is necessary to reduce the resolution of the signal from the control region 2 to the resolution of the control code regions 2a to 2d obtained by dividing the control region 2. In addition, since the coordinate input section of the coordinate input device includes a display area 1, a control area 2, and an undefined area 3, it is difficult to determine from which area the signal sent from the coordinate input device is a coordinate signal. You have to decide whether.

FIG. 2 shows a configuration example of a simple information processing system equipped with a conventional coordinate input device. FIG. 1 shows an example of how the coordinate input device 6 shown in FIG. 2 is used. The coordinate signal is sent to the CPU bus 6 by instructing the coordinate input device 6 with the coordinate specifying ben 4.
is input to the CPU 7 via the display area 1,
Processing is performed to determine which area of the control area 2 or undefined area 3 the signal comes from. When the information sent from the coordinate input device 5 is a coordinate signal of the display area 1, the CPU 7 receives the signal, converts it into a display signal to be displayed on the display device 8, and moves on to the next process. control area 2
If the coordinate signal is a coordinate signal from
The coordinate signal from the coordinate input device is converted into a control code corresponding to a), and the process proceeds to the next step. The coordinate signal from the undefined area 3 is similarly fetched into the CPU 7, but the CPU 7 determines that the next process is not to be executed and fetches the next coordinate signal.

In this way, the CPU 7 takes in all the coordinate signals sent out from the coordinate input device, determines from which region the coordinate signals are sent out, and performs different processing for each region. When the number of samples to be analyzed is large, the processing amount of the CPU 7 becomes enormous, and a large amount of processing time is required.

OBJECTS OF THE INVENTION The present invention solves the above-mentioned problems in an information processing system equipped with a coordinate input device in which a display area, a control area, and an undefined area coexist. DESCRIPTION OF THE PREFERRED EMBODIMENTS A signal conversion processing circuit according to the present invention, which is capable of processing coordinate signals at high speed even when there are a large number of coordinate signals, speeds up determination, reduces the processing amount of a CPU, and improves the processing speed of an information processing system. In a device in which a CPU and a coordinate input device are connected and a figure is created and edited, the coordinate signal from the coordinate input device is a control area coordinate signal that gives an instruction to the CPU, or the figure is displayed on a display device. an area setting circuit that presets a reference value for determining and classifying a display area coordinate signal for display area coordinate signals; a comparison circuit that compares the input signal with a setting value of the area setting circuit; a separation circuit that separates the coordinate signal into the display area coordinate signal and the control area coordinate signal using a comparison circuit output signal; and a separation circuit that controls the control area coordinate signal and the display area coordinate signal separated by the separation circuit, respectively. an arithmetic circuit that converts into a display signal according to the resolution of the area and the resolution of the display device; and a decoder that converts the output signal of the arithmetic circuit of the control area coordinate signal into a code corresponding to each control code, and the coordinate input The display area coordinate signal and the control area coordinate signal sent from the device are separated, the display area coordinate signal is converted by the arithmetic circuit into a display signal according to the resolution of the display device, and the control area coordinate signal is It is characterized in that it is converted into a control code by the decoder.

DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to all the drawings. A basic configuration diagram of an embodiment according to the present invention is shown in FIG. A signal conversion processing device 9 is inserted between the coordinate input device 6 and the CPU 7. An example of the configuration of the signal conversion processing device 9 shown in FIG. 3 is shown in FIG.

A signal X, which is a coordinate value in the X-axis direction, a signal Y, which is a coordinate value in the y-axis direction, and a signal Z, which is a coordinate value in the Z-axis direction, of the coordinate input device 5 are sent to the signal conversion processing device 9. three signals x,
y and z are data holding circuits 10a and 10, respectively.
After being held at 10c and 10c, the coordinate signals X and Y enter the X comparison circuit 11a and the Y comparison circuit 11b respectively.
Area setting circuit 12a.

The coordinate signals X and Y are compared with values set in advance in the Y area setting circuit 12b to determine from which area of the coordinate input device 6 the coordinate signals X and Y are sent. Signals corresponding to each area of the control area 2° and the undefined area 3 are output. Here, the output of this signal will be explained using logic levels "1" and "o"l as in the following (D'+ (i+)).

(1) The coordinate signal of display area 1 is
a, when input to the Y comparison circuit 11b, the X comparison circuit 1
1a, Y comparison circuit "11b" outputs logic level "1".

(11) When the coordinate signal of the control area 2 or the undefined area 3 is input to the X comparison circuit 11a and the Y comparison circuit 11b, the X comparison circuit 11a and the Y comparison circuit 11b output the logic level "ON".

Upon receiving the outputs of the X comparison circuit 11a and the Y comparison circuit 11b,
The separation circuit constituted by 13 to 16b in FIG. 4 can separate the coordinate signals into regions.

When specifying display area 1 with coordinate specification Ben 4,
Since the outputs from the X comparison circuit 11a and the Y comparison circuit 11b are both 1'', the gate circuit 15a.

The gate 16b opens, and coordinate signals X and Y are output to the arithmetic circuits 1ya and 17b. Arithmetic circuit 17a.

17b performs arithmetic processing to convert the coordinate signals x, y'l into display signals for display on the display device 8;
The results of the arithmetic processing are held in the data holding circuits 19a and 19b, and the coordinates are informed to the CPUy. Both output “O” and the output of the NAND circuit 14 becomes 1”.
, 16b opens and coordinate signals X, Y enter the arithmetic circuits 18&, 18b. The arithmetic circuits 18a and 18b are the X area setting circuit 12a.

A signal corresponding to a control code is output for each control code area 2a to 2d obtained by dividing the control area 2 set by the Y area setting circuit 12b. The control code decoder converts this signal into a control code and outputs it. If the value of the coordinate signal 2 is II 11+, the gate of the gate circuit 16c is opened, and the control code output from the control code decoder 20 is transferred to the data holding circuit 1.
9G and notifies the CPU 7 of control code input.

When the undefined area 3 is specified by the coordinate designation bench 4, there are two cases in which the coordinate signals X and Y are both signals from the undefined area 3, and two cases in which the coordinate signals There are two cases where Y is a signal from control code area 2). When the coordinate signals X and Y are both output from the undefined area 3, the signals are input to the multi-control code decoder 20 if the same thread path as when the control area 2 is specified by the coordinate specifying ben 4. In the control code decoder 20, coordinate signals from this area may be assigned to unused codes. When the coordinate signals X and Y are input from different areas, A in the separation circuits 13 to 16b
Since 61'' is not output from the ND circuit 13 or the NAND circuit, the gates of the gate circuits 15a to 16b are not opened, and the coordinate signals X and Y are not output to the arithmetic circuits 17a to 18b. Therefore, signal processing can be performed efficiently.

Effects of the Invention As described above, the present invention is capable of displaying coordinate signals sent from a coordinate human-powered device that includes a display area for displaying on a display device, a control area for giving instructions to a CPU, etc. using a separate circuit. If the coordinate signal is from the display area, it is converted into a display signal that cannot be displayed on a display device. If the coordinate signal is from the control area, it is converted into a control code, and if it is a coordinate signal from the control area, it is converted into a control code. Coordinate signals from an undefined region that is neither a region nor a control region are processed by a separation circuit or converted into unused codes, so that the processing amount of the CPU is reduced and processing can be performed at high speed and efficiency.

[Brief explanation of drawings]

Figure 1 shows an example of the configuration of a general coordinate input device, Figure 2 shows an example of the configuration of a general coordinate input device.
3 is a conceptual diagram of a conventional information processing apparatus, FIG. 3 is a conceptual diagram of information processing according to an embodiment of the present invention, and FIG. 4 is a block diagram of the signal conversion processing apparatus of FIG. 3. 5...Coordinate input device, 6...CPU bus, 7...CPU, 8...Display device, 9...Signal processing conversion Equipment, 10a~
10b...Data holding circuit, 11a...
X comparison circuit, 11b...Y comparison circuit, 12a.
...X area setting circuit, 12b...Y area setting circuit, 13...AND circuit, 14...
NANDAND circuit &~16b... Gate circuit, 1
7a-18b... Arithmetic processing circuit, 19a-19
c...r-retention holding circuit, 20...control code decoder. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure 3

Claims (1)

[Claims] A central processing unit, a coordinate input device, a signal conversion processing device connected between the central processing unit and the coordinate input device, and a display device connected to the central processing unit, A value is set in advance as a reference for determining and classifying whether the coordinate signal is a control area coordinate signal for giving an instruction to the central processing unit or a display area coordinate signal for displaying a figure on a display device. a comparison circuit that compares the input signal with a setting value of the area setting circuit; and a comparison circuit that separates the coordinate signal into the display area coordinate signal and the control area coordinate signal based on the output signal of the comparison circuit. a separation circuit that converts the control area coordinate signal and display area coordinate signal separated by the separation circuit into display signals corresponding to the resolution of the control area and the resolution of the display device, respectively; A decoder is provided for converting the arithmetic circuit output signal into a code corresponding to each control code, and the display area coordinate signal and the control area coordinate signal sent from the coordinate input device are separated, and the display area coordinate signal is converted into the display area coordinate signal. The information processing device is characterized in that the arithmetic circuit converts the control area coordinate signal into a display signal according to the resolution of the display device, and the decoder converts the control area coordinate signal into a control code.