JPS6151415B2 - - Google Patents

Info

Publication number
JPS6151415B2
JPS6151415B2 JP59157541A JP15754184A JPS6151415B2 JP S6151415 B2 JPS6151415 B2 JP S6151415B2 JP 59157541 A JP59157541 A JP 59157541A JP 15754184 A JP15754184 A JP 15754184A JP S6151415 B2 JPS6151415 B2 JP S6151415B2
Authority
JP
Japan
Prior art keywords
wafer
mask
alignment
optical system
light
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP59157541A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60196944A (ja
Inventor
Mitsuyoshi Koizumi
Nobuyuki Akyama
Yoshimasa Ooshima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP59157541A priority Critical patent/JPS60196944A/ja
Publication of JPS60196944A publication Critical patent/JPS60196944A/ja
Publication of JPS6151415B2 publication Critical patent/JPS6151415B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
JP59157541A 1984-07-30 1984-07-30 アライメント方法 Granted JPS60196944A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59157541A JPS60196944A (ja) 1984-07-30 1984-07-30 アライメント方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59157541A JPS60196944A (ja) 1984-07-30 1984-07-30 アライメント方法

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP11464278A Division JPS5541739A (en) 1978-09-20 1978-09-20 Micro-projection type mask alignment device

Publications (2)

Publication Number Publication Date
JPS60196944A JPS60196944A (ja) 1985-10-05
JPS6151415B2 true JPS6151415B2 (enrdf_load_html_response) 1986-11-08

Family

ID=15651931

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59157541A Granted JPS60196944A (ja) 1984-07-30 1984-07-30 アライメント方法

Country Status (1)

Country Link
JP (1) JPS60196944A (enrdf_load_html_response)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62134604A (ja) * 1985-12-09 1987-06-17 Casio Comput Co Ltd カラ−フイルタ膜の形成方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS536716B2 (enrdf_load_html_response) * 1972-06-26 1978-03-10
US4052603A (en) * 1974-12-23 1977-10-04 International Business Machines Corporation Object positioning process and apparatus
JPS52109875A (en) * 1976-02-25 1977-09-14 Hitachi Ltd Position matching system for mask and wafer and its unit
JPS5352072A (en) * 1976-10-22 1978-05-12 Hitachi Ltd Pattern for alignment

Also Published As

Publication number Publication date
JPS60196944A (ja) 1985-10-05

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