JPS6149702B2 - - Google Patents

Info

Publication number
JPS6149702B2
JPS6149702B2 JP54013829A JP1382979A JPS6149702B2 JP S6149702 B2 JPS6149702 B2 JP S6149702B2 JP 54013829 A JP54013829 A JP 54013829A JP 1382979 A JP1382979 A JP 1382979A JP S6149702 B2 JPS6149702 B2 JP S6149702B2
Authority
JP
Japan
Prior art keywords
signal
computer
logic
input
information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54013829A
Other languages
English (en)
Japanese (ja)
Other versions
JPS55108054A (en
Inventor
Kenzo Ookawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP1382979A priority Critical patent/JPS55108054A/ja
Publication of JPS55108054A publication Critical patent/JPS55108054A/ja
Publication of JPS6149702B2 publication Critical patent/JPS6149702B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)
JP1382979A 1979-02-10 1979-02-10 Test system for synchronizing type digital circuit Granted JPS55108054A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1382979A JPS55108054A (en) 1979-02-10 1979-02-10 Test system for synchronizing type digital circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1382979A JPS55108054A (en) 1979-02-10 1979-02-10 Test system for synchronizing type digital circuit

Publications (2)

Publication Number Publication Date
JPS55108054A JPS55108054A (en) 1980-08-19
JPS6149702B2 true JPS6149702B2 (enExample) 1986-10-30

Family

ID=11844154

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1382979A Granted JPS55108054A (en) 1979-02-10 1979-02-10 Test system for synchronizing type digital circuit

Country Status (1)

Country Link
JP (1) JPS55108054A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0199801U (enExample) * 1987-12-21 1989-07-04
JPH04125207U (ja) * 1991-05-01 1992-11-16 義則 伊藤 ちり容器
JPH0731610U (ja) * 1993-11-22 1995-06-13 象印マホービン株式会社 包装用箱

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59125455A (ja) * 1982-12-30 1984-07-19 Fujitsu Ltd テストデ−タの作成方法
JP2507294B2 (ja) * 1984-12-11 1996-06-12 株式会社日立製作所 制御盤の検査方法
US4744084A (en) * 1986-02-27 1988-05-10 Mentor Graphics Corporation Hardware modeling system and method for simulating portions of electrical circuits

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
FUJITSU SCIENTTFIC & TECHNICAL JOURNAL VOLUME14 NUMBER2=S53 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0199801U (enExample) * 1987-12-21 1989-07-04
JPH04125207U (ja) * 1991-05-01 1992-11-16 義則 伊藤 ちり容器
JPH0731610U (ja) * 1993-11-22 1995-06-13 象印マホービン株式会社 包装用箱

Also Published As

Publication number Publication date
JPS55108054A (en) 1980-08-19

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