JPS55108054A - Test system for synchronizing type digital circuit - Google Patents

Test system for synchronizing type digital circuit

Info

Publication number
JPS55108054A
JPS55108054A JP1382979A JP1382979A JPS55108054A JP S55108054 A JPS55108054 A JP S55108054A JP 1382979 A JP1382979 A JP 1382979A JP 1382979 A JP1382979 A JP 1382979A JP S55108054 A JPS55108054 A JP S55108054A
Authority
JP
Japan
Prior art keywords
digital circuit
type digital
input
output
synchronizing type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1382979A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6149702B2 (enExample
Inventor
Kenzo Okawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1382979A priority Critical patent/JPS55108054A/ja
Publication of JPS55108054A publication Critical patent/JPS55108054A/ja
Publication of JPS6149702B2 publication Critical patent/JPS6149702B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)
JP1382979A 1979-02-10 1979-02-10 Test system for synchronizing type digital circuit Granted JPS55108054A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1382979A JPS55108054A (en) 1979-02-10 1979-02-10 Test system for synchronizing type digital circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1382979A JPS55108054A (en) 1979-02-10 1979-02-10 Test system for synchronizing type digital circuit

Publications (2)

Publication Number Publication Date
JPS55108054A true JPS55108054A (en) 1980-08-19
JPS6149702B2 JPS6149702B2 (enExample) 1986-10-30

Family

ID=11844154

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1382979A Granted JPS55108054A (en) 1979-02-10 1979-02-10 Test system for synchronizing type digital circuit

Country Status (1)

Country Link
JP (1) JPS55108054A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59125455A (ja) * 1982-12-30 1984-07-19 Fujitsu Ltd テストデ−タの作成方法
JPS61138312A (ja) * 1984-12-11 1986-06-25 Hitachi Ltd 制御盤の検査方法
US4744084A (en) * 1986-02-27 1988-05-10 Mentor Graphics Corporation Hardware modeling system and method for simulating portions of electrical circuits

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0199801U (enExample) * 1987-12-21 1989-07-04
JPH04125207U (ja) * 1991-05-01 1992-11-16 義則 伊藤 ちり容器
JPH0731610U (ja) * 1993-11-22 1995-06-13 象印マホービン株式会社 包装用箱

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
FUJITSU SCIENTTFIC & TECHNICAL JOURNAL VOLUME14 NUMBER2=S53 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59125455A (ja) * 1982-12-30 1984-07-19 Fujitsu Ltd テストデ−タの作成方法
JPS61138312A (ja) * 1984-12-11 1986-06-25 Hitachi Ltd 制御盤の検査方法
US4744084A (en) * 1986-02-27 1988-05-10 Mentor Graphics Corporation Hardware modeling system and method for simulating portions of electrical circuits

Also Published As

Publication number Publication date
JPS6149702B2 (enExample) 1986-10-30

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