JPS6148996A - セラミツク多層配線基板の製造方法 - Google Patents
セラミツク多層配線基板の製造方法Info
- Publication number
- JPS6148996A JPS6148996A JP59170893A JP17089384A JPS6148996A JP S6148996 A JPS6148996 A JP S6148996A JP 59170893 A JP59170893 A JP 59170893A JP 17089384 A JP17089384 A JP 17089384A JP S6148996 A JPS6148996 A JP S6148996A
- Authority
- JP
- Japan
- Prior art keywords
- laminate
- ceramic
- multilayer
- wiring board
- multilayer ceramic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000919 ceramic Substances 0.000 title claims description 21
- 238000000034 method Methods 0.000 title claims description 8
- 239000003985 ceramic capacitor Substances 0.000 claims description 20
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 238000010030 laminating Methods 0.000 claims description 4
- 238000005245 sintering Methods 0.000 claims description 4
- 238000010304 firing Methods 0.000 claims description 3
- 238000000465 moulding Methods 0.000 claims description 2
- 239000003990 capacitor Substances 0.000 description 7
- 239000000758 substrate Substances 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 2
- 239000011230 binding agent Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 210000004709 eyebrow Anatomy 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59170893A JPS6148996A (ja) | 1984-08-16 | 1984-08-16 | セラミツク多層配線基板の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59170893A JPS6148996A (ja) | 1984-08-16 | 1984-08-16 | セラミツク多層配線基板の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6148996A true JPS6148996A (ja) | 1986-03-10 |
| JPH022318B2 JPH022318B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1990-01-17 |
Family
ID=15913267
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59170893A Granted JPS6148996A (ja) | 1984-08-16 | 1984-08-16 | セラミツク多層配線基板の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6148996A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0195592A (ja) * | 1987-10-07 | 1989-04-13 | Murata Mfg Co Ltd | 多層セラミック基板の製造方法 |
| JPH0195591A (ja) * | 1987-10-07 | 1989-04-13 | Murata Mfg Co Ltd | 多層セラミック基板の製造方法 |
| JPH01166599A (ja) * | 1987-12-22 | 1989-06-30 | Narumi China Corp | 積層セラミック基板の製造方法 |
-
1984
- 1984-08-16 JP JP59170893A patent/JPS6148996A/ja active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0195592A (ja) * | 1987-10-07 | 1989-04-13 | Murata Mfg Co Ltd | 多層セラミック基板の製造方法 |
| JPH0195591A (ja) * | 1987-10-07 | 1989-04-13 | Murata Mfg Co Ltd | 多層セラミック基板の製造方法 |
| JPH01166599A (ja) * | 1987-12-22 | 1989-06-30 | Narumi China Corp | 積層セラミック基板の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH022318B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1990-01-17 |