JPS6148945A - Hibrid ic module - Google Patents
Hibrid ic moduleInfo
- Publication number
- JPS6148945A JPS6148945A JP16990984A JP16990984A JPS6148945A JP S6148945 A JPS6148945 A JP S6148945A JP 16990984 A JP16990984 A JP 16990984A JP 16990984 A JP16990984 A JP 16990984A JP S6148945 A JPS6148945 A JP S6148945A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- wall
- module
- envelope
- sealed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
- H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
- H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Dispersion Chemistry (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
この発明はハイブリッドＩＣモジュールｌ二おいて、特
（二２種の封止樹脂（二よって封止されるハイブリッド
ＩＣモジュール（二関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to hybrid IC modules (hybrid IC modules sealed with two types of sealing resins).
一般Ｃ二２徳の封止樹脂Ｃ二よって封止されるハイブリ
ッドＩＣモジュールを第８図（二示す。図（二おいて、
（１０１）はセラピンク基板で、この上ｍ１ｉ＝形成さ
れたパターン（１０２） （二４４成部品（１０３ａ
、 １０３ｂ 、 １０３ｃ −）を組込み回路を構成
したのち、接着剤（１０４） 等Ｃ：よ少外囲器（１
０５） ｌ二組込み、これら回路部分を封止材料１例え
ば封止樹脂（１０６，１０７）ζ二より封止し防湿防庭
等をはかつていた。A hybrid IC module sealed with a general C22 sealing resin C2 is shown in FIG.
(101) is a Cerapink substrate, on which m1i=formed pattern (102) (244 component (103a)
, 103b, 103c-) to form a built-in circuit, adhesive (104) etc. C: Small envelope (1
05) These circuit parts were sealed with a sealing material 1, such as a sealing resin (106, 107) ζ2, to provide a moisture-proof barrier.
封止材料は、材料自体を媒体として構成部品Ｃ二機械的
応力が加わることを極力小さくすることを主目的とした
ゲル状樹脂（１０６）の例えばシリコン樹脂と、これを
保持し防湿効果を上げるため等を目的とじて少くともゲ
ル状よルもＭＵの大きい保護用樹脂（１０７）の例えば
エポキシ樹脂から一般口構成されている。そして、上記
ゲル状樹脂（１０６）は外部との回路接続用リード（１
０３ｃ）等の必要最少限の部分を残し他のすべての植成
部品を包み充填し、その上に保護用樹脂（１０７）を充
填する。The sealing material is a gel-like resin (106) such as silicone resin whose main purpose is to minimize the application of mechanical stress to component C2 using the material itself as a medium, and to retain this and increase the moisture-proofing effect. For the purpose of protection, etc., at least the gel-like layer is also generally made of a protective resin (107) with a large MU, such as an epoxy resin. The gel-like resin (106) is then connected to the external circuit connection lead (106).
03c) etc., all other implanted parts are wrapped and filled, leaving only the minimum necessary parts, and then a protective resin (107) is filled thereon.
保護用Ｉ＃脂の防湿効果に影響する要因は第１（＝それ
自体の透湿性であ少、第２に外囲器との接触状態が考え
られる。同一の樹脂を用い等量（二で封止するときの防
湿効果は外囲器との蝋触状態のみの影響をうける。The factors that influence the moisture-proofing effect of the protective I# resin are firstly (its own moisture permeability) and secondly the contact condition with the envelope. The moisture-proofing effect during sealing is affected only by the state of wax contact with the envelope.
駅上のようなモジュールが高温、低温または高低温サイ
クルの環境下Ｃ二おかれたとき、またはモジエール自体
の発熱等Ｃ二より外囲器、封止材料。When a module such as on a station is placed in an environment of high temperature, low temperature or high/low temperature cycle, or the module itself generates heat, the envelope and sealing material.
回路４成部品等の熱膨張係数の違い（二よる相互間の引
張シまたは圧縮の応力を発生し、時として外囲器、接着
部（二亀裂を生じてモジュールの耐湿性を著るしく低下
させることがある。亀裂が発生する原因は上Ｃ：述べた
よう（二同じ材料１等葉である時外囲器との接着力の影
醤を受けるものであシ、また、この接着力は外囲器の表
面状態と、外ｄ器と保護用樹脂相互の材料の組合わせを
同一条件としたとき、接着の面積（二よシ＋ａする。こ
の接着面積は図（：も示されるよう（＝、毛管現象（＝
よる樹脂の這い上シなどがあシ、算出は檻しいが、例え
ばこれを無視しこの樹脂の厚さく＝単位面積を掛は合わ
せたものと仮冗しても、上記表面状態等（＝よシこの部
分が応力（二最も弱くなるのが一般的である。Differences in thermal expansion coefficients of circuit components (2) generate tensile or compressive stress between them, and sometimes cause cracks in the envelope and adhesive parts (2), significantly reducing the moisture resistance of the module. The reason why cracks occur is as mentioned in C: above (when the two are made of the same material, they are affected by the adhesive force with the envelope, and this adhesive force is When the surface condition of the envelope and the material combination of the outer envelope and the protective resin are the same, the area of adhesion (2+a) is calculated as shown in the figure (:). =, capillary action (=
However, even if we ignore this and assume that the thickness of this resin = unit area multiplied together, the above surface condition etc. (= Stress (2) is generally the weakest in this area.
成上の問題（二対して通常樹脂量を増す処置がとられる
。これ（＝よ）接着面積が増加し接着力は増大するが、
漬着部以外の部分（二対しては過剰（−なるため、モジ
ュールがコスト高となり、外囲器を必要以上（二大きく
しなければならない等の制約が発生する。In response to the production problem (2), usually measures are taken to increase the amount of resin.This (=yo) increases the bonding area and increases the bonding force, but
Since the parts other than the dipping part are excessive, the cost of the module increases and restrictions arise such as having to make the envelope larger than necessary.
この発明は上記従来の技術の問題点（二鑑みてハイブリ
ッドＩＣモジュールの外囲器と封止樹脂界面（二熱的影
響（＝よって生ずるクラックを防止し耐湿性の１司上を
はかる。In view of the above-mentioned problems of the conventional technology, the present invention aims to improve moisture resistance by preventing cracks caused by the interface between the envelope and the sealing resin of a hybrid IC module (= thermal effects).
この発明（二かかるハイブリッドＩＣモジュールは外囲
器内（二その庶ｍに密接しこの外民器の内装部品の少く
とも一部を囲繞する内側壁を設け、この内側壁内を封止
する第１の封止樹脂と、外囲器の側壁の内面に周縁で封
着しかつこの側壁の内面と前記内側壁との間Ｃ二形成さ
れた隙間（二人り込ませて外囲器内を封止する第２の封
止樹脂によって封止されたことを特徴とし、接着面積を
増大して接着強度を上げ、封止の耐湿効果を同上させる
ものである。According to the present invention, the hybrid IC module is provided with an inner wall that is in close contact with the outer package and surrounds at least a part of the interior parts of the outer package, and a second wall that seals the inside of the inner wall. The sealing resin of No. 1 is sealed to the inner surface of the side wall of the envelope at the periphery, and the gap C2 is formed between the inner surface of this side wall and the inner wall (two people are inserted to inspect the inside of the envelope). It is characterized in that it is sealed with a second sealing resin, which increases the bonding area, increases the bonding strength, and improves the moisture resistance effect of the sealing.
以下（＝この発明を実施例Ｃ二つ＠第１図ないし第７図
を参照して説明する。なお、実施例の説明において従来
と変わらない部分Ｃ＝ついては図面（二同じ符号を付け
て示し説明を省略する。Below, this invention will be explained with reference to two embodiments C @ Figs. The explanation will be omitted.
第１図Ｃ二示すへイブリッドＩＣモジュールは、その外
囲器（１）の側壁（１ａ）の内面（ｌｂ） ｌ二対同し
、かつある間隙を有して底面（ＩＣ）から立上る内側壁
（２）が設けられている。そして、この内側壁（２）内
（＝ゲル状の樹脂、例えばシリコン樹脂（１０６）を封
入し、この上面から内側壁（２）を越えて間隙内を充た
す保護用の樹脂、例えばエポキシ樹脂（１０７）が外囲
器１ｉｌｌ壁内面（ｌｂ）−二層縁で封着して封止を達
成するものである。The hybrid IC module shown in FIG. A wall (2) is provided. Then, a gel-like resin such as silicone resin (106) is sealed inside this inner wall (2), and a protective resin such as epoxy resin ( 107) is sealed between the inner wall surface (lb) of the envelope and the two-layer edge to achieve sealing.
次（＝、第２図１＝示すハイブリッジＩＣモジュールは
、第１図に示すものと内側壁αりが外囲器の底面（ｌｃ
） ｌ：ｌ−接着剤Ｒ（３）で固着されたものである。The high bridge IC module shown in Fig. 2 is different from the one shown in Fig.
) 1: 1- Fixed with adhesive R (3).
したがって内側壁μりは図（ｂ）（＝示すような枠体で
よく、これは外囲器とは別途容易（二作製できるととも
（−外囲器は従来のままで用いることもできる利点がお
る。Therefore, the inner wall may be a frame as shown in Figure (b), which can be easily manufactured separately from the envelope (-the advantage that the envelope can be used as is). There is.
次の第３図には内側壁αりの固定（ニシリコン樹ノ信（
１０６）を用いたもので、外囲器内（＝予め必要とする
高さよシ少く入れたのち、内側壁（Ｌのを装入し、流れ
出ない状態（−加熱処理を施しておく。ついで内側壁の
内側（二必要とする量の樹脂を注加するものである。The following figure 3 shows the fixing of the inner wall α
106) is used, and after filling the inside of the envelope (= in advance to the required height), the inner wall (L) is charged and heat treated to prevent it from flowing out. Inside the wall (2) pour the required amount of resin.
次の第４図（＝は内側壁ａ邊が外囲器内の底面（ｌｉｅ
）に設けられた溝（ｌｉｄ） ｉ二装入固定されたもの
を示す。The following figure 4 (= indicates that the inner wall a side is the bottom surface (lie
) Groove (lid) provided in (i) Shows one in which two charges are fixed.
これは接着剤を用いずＣ二内側壁を固定できるとともＣ
二、溝加工も簡単である利点がある。This allows the inner wall of C2 to be fixed without using adhesive.
Second, it has the advantage of being easy to process grooves.
次の第５図（二は内装部品の一部を限って内装する内側
壁＠を例示する。なお、この内側壁はこれを外囲器底面
へ固定するの（＝接着剤（３）を用いた場合を例示した
が、第１図、または第３図二夫々示すよう（＝底面から
一体（二車上らせ形成しても、また底面（−溝を設けて
装入固定させても、さら（＝は次（二第６図（＝よって
説明する一体構造としてもよい。The following Figure 5 (2) shows an example of an inner wall where only a part of the interior parts are internalized.This inner wall is fixed to the bottom of the envelope using adhesive (3). However, as shown in Fig. 1 and Fig. 3, respectively, Furthermore, it may be an integral structure as explained below.
次の第６図（＝示す構造は外囲器Ｑ１）がプレス成形Ｃ
：よって形成され、その内側種口は外囲器を折曲して形
成した一体構造になっている。The following Fig. 6 (=the structure shown is the envelope Q1) is press-formed C
: Therefore, the inner seed opening has an integral structure formed by bending the envelope.
次の第７図Ｃ二示す構造は外囲器６υ（＝コネクタ（Ｉ
Ｏ２）が取着されたもので、このコネクタは成上の諸構
造Ｃ：おける外部との回路接続用リード（１０３ｃ）二
相当するが、保護用樹脂（１０７）を貫通していない構
造上の特徴を備えている。The structure shown in Fig. 7C2 is the enclosure 6υ (= connector (I
This connector corresponds to the external circuit connection lead (103c) 2 in the structure C of Naruko, but it is a structural lead that does not penetrate the protective resin (107). It has characteristics.
封止材料と外囲器との接審力は、接着部の辰面状態、双
方の＃質の組合わせが一定のとき接着面積Ｃ二はぼ比例
することは自明である。この発明の構造は外囲器側壁の
内側に隙間をもって内側壁を設け、この隙間（二保腹用
樹脂の周縁部を広く接着させて耐湿、封止効果を同上で
きる顕著な利点がある。また、上記接着面積を増大する
ため（二樹脂封入量を％１；増量することなく達成でき
る上に、この構造は廉価Ｃ：構成できる利点もある。It is obvious that the contact force between the sealing material and the envelope is approximately proportional to the bonding area C2 when the surface condition of the bonded portion and the combination of the # quality of both are constant. The structure of this invention has the remarkable advantage that the inner wall is provided with a gap inside the side wall of the envelope, and this gap (the peripheral edge of the protective resin) can be widely adhered to improve moisture resistance and sealing effects. This can be achieved without increasing the adhesive area (by 1%), and this structure also has the advantage that it can be constructed at a low cost.
第１図（ｄ）、第２図（ａ）、第３図ないし第７図はい
ずれも夫々がこの発明の実施例Ｃ二かかるＩＣモジュー
ルのｌＯＴ面図、第１図＋ｂｌは同図１ａｌの一部を切
欠して示す斜視図、第２図（ｂｌは同図＋ａｌの内側壁
の−かるＩＣモジュールの断面図、同図（ｂｌは斜視図
でちる。
１ 、１１．２１．３１ 外囲器
２ 、１２．２２．３２ 内側壁
１０１、１０２．１０３ａ、 １０３ｂ、 １０３ｃ
内装部品１０６ 第１の封止（ゲル状
）樹脂１０７ 第２の封止（保護用）ｍ脂
代理人 弁理士 井 上 −男
第１図
（α２
（ｃＬン
第 ２ 図
（ｂ］
第 ３ 図
ｌ
第 ４ 図
／／ ｔｌｔｔ ＩＩＣ
第５図
第６図
第 ７ 図
第 ８ 図
（ａ）
（ｂ）1(d), FIG. 2(a), and FIGS. 3 to 7 are respectively lOT side views of an IC module according to Embodiment C2 of the present invention, and FIG. 1, 11.21.31 External enclosure Vessel 2, 12.22.32 Inner wall 101, 102.103a, 103b, 103c
Interior parts 106 First sealing (gel-like) resin 107 Second sealing (protective) Resin agent Patent attorney Inoue - Male Fig. 1 (α2 (cLn Fig. 2 (b)) Fig. 3 l Figure 4 // tltt IIC Figure 5 Figure 6 Figure 7 Figure 8 (a) (b)
Claims (1)
くとも一部を囲繞する内側壁を設け、この内側壁内を封
止する第１の封止樹脂と、外囲器の側壁に周縁で封着し
かつこの外囲器を封止する第２の封止樹脂によつて封止
されたことを特徴とするハイブリツドＩＣモジュール。An inner wall that is in close contact with the bottom surface of the envelope and surrounds at least a part of the interior parts of the envelope is provided in the envelope, a first sealing resin that seals the inside of the inner wall, and a first sealing resin that seals the interior of the envelope; A hybrid IC module characterized in that the module is sealed with a second sealing resin that is peripherally sealed to a side wall and seals the envelope.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16990984A JPS6148945A (en) | 1984-08-16 | 1984-08-16 | Hibrid ic module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16990984A JPS6148945A (en) | 1984-08-16 | 1984-08-16 | Hibrid ic module |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6148945A true JPS6148945A (en) | 1986-03-10 |
Family
ID=15895211
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16990984A Pending JPS6148945A (en) | 1984-08-16 | 1984-08-16 | Hibrid ic module |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6148945A (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5956231A (en) * | 1994-10-07 | 1999-09-21 | Hitachi, Ltd. | Semiconductor device having power semiconductor elements |
| US6001943A (en) * | 1997-01-30 | 1999-12-14 | Dow Corning Toray Silicone Co., Ltd. | Silicone gel composition and silicone gel for use in sealing and filling of electrical and electronic parts |
| US6001918A (en) * | 1997-07-10 | 1999-12-14 | Dow Corning Toray Silicone Co., Ltd. | Silicone gel composition for use as a sealant and a filler for electrical and electronic components and a gel prepared from this composition |
| WO2015111409A1 (en) | 2014-01-27 | 2015-07-30 | Dow Corning Toray Co., Ltd. | Silicone gel composition |
| WO2018056298A1 (en) | 2016-09-26 | 2018-03-29 | 東レ・ダウコーニング株式会社 | Laminate, manufacturing method thereof, and manufacturing method of electronic component |
| WO2018056297A1 (en) | 2016-09-26 | 2018-03-29 | 東レ・ダウコーニング株式会社 | Curing reactive silicone gel and use thereof |
| WO2018079678A1 (en) | 2016-10-31 | 2018-05-03 | 東レ・ダウコーニング株式会社 | Layered body and method for manufacturing electronic component |
| WO2019049950A1 (en) | 2017-09-11 | 2019-03-14 | 東レ・ダウコーニング株式会社 | Cured silicone elastomer having radical reactivity and use of same |
| US11396616B2 (en) | 2017-04-06 | 2022-07-26 | Dow Toray Co., Ltd. | Liquid curable silicone adhesive composition, cured product thereof, and use thereof |
-
1984
- 1984-08-16 JP JP16990984A patent/JPS6148945A/en active Pending
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5956231A (en) * | 1994-10-07 | 1999-09-21 | Hitachi, Ltd. | Semiconductor device having power semiconductor elements |
| US6001943A (en) * | 1997-01-30 | 1999-12-14 | Dow Corning Toray Silicone Co., Ltd. | Silicone gel composition and silicone gel for use in sealing and filling of electrical and electronic parts |
| US6001918A (en) * | 1997-07-10 | 1999-12-14 | Dow Corning Toray Silicone Co., Ltd. | Silicone gel composition for use as a sealant and a filler for electrical and electronic components and a gel prepared from this composition |
| WO2015111409A1 (en) | 2014-01-27 | 2015-07-30 | Dow Corning Toray Co., Ltd. | Silicone gel composition |
| US10155852B2 (en) | 2014-01-27 | 2018-12-18 | Dow Corning Toray Co., Ltd. | Silicone gel composition |
| KR20190051022A (en) | 2016-09-26 | 2019-05-14 | 다우 코닝 도레이 캄파니 리미티드 | Curing reactive silicone gel and uses thereof |
| WO2018056298A1 (en) | 2016-09-26 | 2018-03-29 | 東レ・ダウコーニング株式会社 | Laminate, manufacturing method thereof, and manufacturing method of electronic component |
| WO2018056297A1 (en) | 2016-09-26 | 2018-03-29 | 東レ・ダウコーニング株式会社 | Curing reactive silicone gel and use thereof |
| US11279827B2 (en) | 2016-09-26 | 2022-03-22 | Dow Toray Co., Ltd. | Curing reactive silicone gel and use thereof |
| KR20190046997A (en) | 2016-09-26 | 2019-05-07 | 다우 코닝 도레이 캄파니 리미티드 | LAMINATE, METHOD OF MANUFACTURING THE SAME, |
| US10961419B2 (en) | 2016-10-31 | 2021-03-30 | Dow Toray Co., Ltd. | Layered body and method for manufacturing electronic component |
| KR20190080912A (en) | 2016-10-31 | 2019-07-08 | 다우 도레이 캄파니 리미티드 | Laminate and electronic component manufacturing method |
| WO2018079678A1 (en) | 2016-10-31 | 2018-05-03 | 東レ・ダウコーニング株式会社 | Layered body and method for manufacturing electronic component |
| US11396616B2 (en) | 2017-04-06 | 2022-07-26 | Dow Toray Co., Ltd. | Liquid curable silicone adhesive composition, cured product thereof, and use thereof |
| WO2019049950A1 (en) | 2017-09-11 | 2019-03-14 | 東レ・ダウコーニング株式会社 | Cured silicone elastomer having radical reactivity and use of same |
| US11981814B2 (en) | 2017-09-11 | 2024-05-14 | Dow Toray Co., Ltd. | Cured silicone elastomer having radical reactivity and use of same |
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