JPS6145264B2 - - Google Patents

Info

Publication number
JPS6145264B2
JPS6145264B2 JP11052381A JP11052381A JPS6145264B2 JP S6145264 B2 JPS6145264 B2 JP S6145264B2 JP 11052381 A JP11052381 A JP 11052381A JP 11052381 A JP11052381 A JP 11052381A JP S6145264 B2 JPS6145264 B2 JP S6145264B2
Authority
JP
Japan
Prior art keywords
address
register
control
data
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP11052381A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5812054A (ja
Inventor
Hideo Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP11052381A priority Critical patent/JPS5812054A/ja
Publication of JPS5812054A publication Critical patent/JPS5812054A/ja
Publication of JPS6145264B2 publication Critical patent/JPS6145264B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/321—Program or instruction counter, e.g. incrementing

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
  • Executing Machine-Instructions (AREA)
JP11052381A 1981-07-15 1981-07-15 アドレス制御装置 Granted JPS5812054A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11052381A JPS5812054A (ja) 1981-07-15 1981-07-15 アドレス制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11052381A JPS5812054A (ja) 1981-07-15 1981-07-15 アドレス制御装置

Publications (2)

Publication Number Publication Date
JPS5812054A JPS5812054A (ja) 1983-01-24
JPS6145264B2 true JPS6145264B2 (member.php) 1986-10-07

Family

ID=14537952

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11052381A Granted JPS5812054A (ja) 1981-07-15 1981-07-15 アドレス制御装置

Country Status (1)

Country Link
JP (1) JPS5812054A (member.php)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01311338A (ja) * 1988-06-10 1989-12-15 Oki Electric Ind Co Ltd データメモリアドレス発生回路

Also Published As

Publication number Publication date
JPS5812054A (ja) 1983-01-24

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