JPS614469A - Overcurrent protecting circuit of inverter - Google Patents

Abstract

PURPOSE:To instantaneously stop at overcurrent generating time by providing Hall CTs at the primary and secondary sides of an inverter, and providing the first and second stopping circuits for stopping the switchings by the pulses from the CT for the prescribed time. CONSTITUTION:A transistor inverter 6 converts a DC input voltage rectified from a commercial AC power source by a rectifier 2 into AC, and supplies it through a transformer 7 into a load 8. In this case, the first Hall CT11 is provided at the emitter sides of the third and fourth transistors (Tr)3c, 3d at the primary side of the inverter 6, and the second Hall CT12 is provided at the primary winding 7a of the transformer 7. Thus, when the load 8 becomes overload so that an overcurrent flows to the primary winding 7a, it is input from the second CT12 through a rectifier 13 to the overcurrent protector 15 of the controller 14, and the first stopping circuit 15d stops the output of the base control signal. When the stopping number is counted by a counter 15e to arrive at the prescribed number, the second stopping circuit 15g completely stops.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an overcurrent protection circuit for an inverter that prevents each transistor in a transistor inverter from being damaged by overcurrent.

[Prior art]

Conventionally, thyristors have been used as control elements in inverters used as control power supplies for variable operation of large rust-conducting motors or as stabilizing power supplies for large electronic computers.
With the recent increase in the capacity of power transistors, the development of transistor inverters that use power transistors as control elements in place of thyristors is progressing.

And, if the conventional transistor inverter is
It is configured as shown in the figure, and as shown in the figure, (1)
(2) is the connection terminal connected to the commercial AC power supply, and (2) is the thyristor (2) that rectifies and smoothes the AC through the connection terminal (1).
a) , Reactor (2+)) , , : Rectifier circuit consisting of I y tensor (2C), (8a), (8b), (
8C) and (8d) are NPN type IT to fourth transistors, and a flywheel diode (4) is connected in antiparallel to the collector and emitter of each transistor (3a) to (3d), respectively. 2 transistors (8a),
(8b) is connected to the positive output terminal of the rectifier circuit (2), and the collector of the third. The collector of the fourth transistor (30), (ad) is connected to the collector of the fourth transistor (30), (ad). 21st - transistor (8a), (3b
), and the emitters of the third and fourth transistors (8Cj) and (8d) are connected to the rectifier circuit (
2), and further connected to the negative output terminal of each transistor (
The bases of 3a) to (3d) are connected to a base control terminal of a control circuit to be described later, and a rectifier circuit (2).

Each transistor (3a) to (ad); each diode (
4) constitutes a transistor inverter (6).

(7) means that both ends of the primary winding (7a) are the first. A transformer is connected to the emitter of the second transistor (3B) and (3b), (8) is a load connected to the secondary winding (7b) of the transformer (7), and (9) is a control circuit with a gate A gate control section outputs a gate control signal to the gate of the thyristor (2a) via a control terminal (9a), and a gate control section outputs a gate control signal to the gate of the thyristor (2a) via a control terminal (9a), and outputs a gate control signal to each transistor (81a) via four base control terminals (9b) to (9e).
) to (ad), and an overcurrent protection unit 01 as shown in FIG.
It is composed of .

Next, in Fig. 2, (10a) is a DC reference power supply, (
lob) is a comparison circuit that compares the reference voltage from the reference power supply (10a) with the voltage based on the primary current of the inverter (6) detected by the detector (5), and (+00) is a stop circuit. a display section, and outputs a stop signal to the base control section to output a stop signal to each transistor (3a) to (3) when the voltage caused by the primary side current is higher than the reference voltage.
d) to stop the output of the base control signal to stop the switching of each of the transistors (3a) to (3d), and display an abnormality on the display section;
The reference power supply (IOEL), the comparison circuit (10b), and the stop circuit (10G) constitute an overcurrent protection section.

Then, the base control signal from the base control section of the control circuit (9) is transmitted to the first. The base of the fourth transistor (3B), (ad) and the second. Third transistor (8b>, (8G
) of 1 (is output alternately to the base, the first and fourth transistors (3a), (3d) and the second and third transistors p (8b), (8c) are alternately turned on and off, By turning on the first and fourth transistors (3B) and (8d), the DC current from the rectifier circuit (2) is transferred to the collector, emitter, and transformer (7) of the first transistor (3a).
primary winding (7a), collector and emitter of the fourth transistor (3d), detector 1f [(5), rectifier circuit (
2), and the second. Third transistor (8b), (80
> is turned on, the DC current from the rectifier circuit (2) is turned on to the second
The collector and emitter of the transistor (8b), the primary winding (7a) of the transformer (7), and the third transistor (3C)
) collector, emitter, detector (5), rectifier circuit (2
), the inverter (61) converts the direct current from the rectifier circuit (2) into alternating current, and supplies the alternating current to the load (8).

At this time, the inverter (
6) Since the primary current is a steady current, the voltage value given to the comparator circuit (Job) by the detector (5) based on the primary current is different from the reference voltage value from the reference power supply (IOa). Therefore, the stop circuit (+00) is not activated by the comparison signal from the comparison circuit (IOb), and each base control signal is output from the base control section without a stop signal being output from the stop circuit (IQC). The inverter (6) continues to operate normally.

By the way, if an abnormality occurs during the normal operation of the inverter (6), such as malfunction of the base control section, for example, the first and third transistors (3a) and (90) are turned on at the same time. 1. Third transistor (3a)
.

(3C) are turned on at the same time, the output of inverter (61) is short-circuited, and an overcurrent flows to the primary side of inverter (6).
Based on the overcurrent, the detector (5) detects the comparator circuit (]
When the voltage value given to Ob) becomes equal to or higher than the reference voltage value from the reference power source (IOa), the stop circuit (100) is activated by the comparison signal from the comparison circuit (Job), and the stop circuit Cl
A stop signal is output from the base control section (0C), and the output of the base control signal from the base control section is stopped.
3a) to (8d) are turned off and the operation of the inverter (6) is stopped, and an abnormality is displayed on the display section of the stop circuit (TOE).

However, when a shunt is used as the detector (5), insulation must be provided to prevent the output signals of the shunt from being directly input to the bases of each transistor (3a) to (3d), which is very complicated. If a DC current transformer is used as the detector (5), the current transformer becomes a delay element, so when an overcurrent occurs, the output of the base control signal from the base control section is instantly stopped. However, there is a drawback that the transistors (3a) to (3d) etc. may be damaged.

It is also conceivable to use a fuse as the detector (5), but the fuse cannot instantly stop the output of the base control signal from the base control section when an overcurrent occurs.

Furthermore, when the load (8) is a capacitor input type load, when starting the load, a large charging current is required to charge the capacitor immediately after starting by turning on the start switch, etc. Inverter (6) 1
The next-side current also increases, and the overcurrent protection section 0a
operates, the inverter (6) stops operating, and the load is not started.

[Purpose of the invention]

The present invention has been made with the above points in mind, and an object of the present invention is to instantly stop an inverter when an overcurrent occurs and to enable starting of a capacitor input type load.

[Structure of the invention]

The present invention provides an inverter that converts direct current into alternating current by switching a plurality of transistors, and an inverter that is provided on a primary side and a secondary side of the inverter, and
The first one outputs a voltage signal proportional to the current flowing on the next side.
Compare the output voltage values of the second hole CT and the two holes/l10T with each of two reference voltage values, and output a comparison signal based on the voltage signal from the two holes 1vCT, each of which is higher than the two reference voltage values. 1st. a second comparison circuit;
a first stop circuit that stops the switching of each of the transistors for a predetermined period of time by a pulse from one of the tTJ pulse generation circuits; The overcurrent protection circuit for an inverter is characterized by comprising a second stop circuit that stops switching of each of the transistors when the number of pulses reaches a set value.

〔Effect of the invention〕

Therefore, according to the inverter overcurrent protection circuit of the present invention, one
The first one on the next side and the second side. A second hole 1lzCT is installed,
With either pulse from both pulse generation circuits based on voltage signals from both Hall CTs that are higher than both reference voltage values,
By providing a first stop circuit that stops switching of each transistor of the inverter for a predetermined period of time, and a second stop circuit that stops switching of each transistor when either number of pulses reaches a set value, The inverter can be stopped instantly when an overcurrent occurs, preventing damage to transistors, etc., and even if the load is a capacitor input type, it can be started easily, making it practical. It is.

〔Example〕

Next, this invention will be explained in detail with reference to the drawings from FIG. 3 onwards showing an embodiment of the invention.

First, in Fig. 3, the same symbols as in Fig. 1 indicate the same things, and CIυ is an inverter (6) instead of a detector (5).
The third. which is the primary side of Fourth transistor (3C).

(3d) is the first hole/L/CT provided between both emitters and the negative output terminal of the rectifier circuit (2), (2) is the primary side of the transformer (7) of the inverter (6). A second hole/L/CT is provided between one end of the primary winding (7a) and the collector of the fourth transistor (3d).
-) LyCT (11).

(2) outputs a voltage signal proportional to the current flowing through the primary and secondary sides of the inverter (6).

The head is a rectifier that rectifies the AC voltage signal output from the second hole CT (6), and aΦ is a control circuit, which outputs a gate control signal to the gate of Cyrisk (2a) via the gate control terminal (14a). a gate control section that outputs a base control signal to the base of each transistor (3a) to (3d) via four base control terminals (14b) to (+48), and a control section shown in FIG. It is composed of an overcurrent protection section 05 as shown.

Next, in Figure 4, (15a) and (+5a)' are 2
The DC reference power supplies (+56) and (+5b) are calculated by comparing the reference voltages from the same reference power supplies (+56) and (+5a) with the output voltage values of the first hall CT (lη and rectifier (1)), respectively. The first and second comparison circuits, (+5c) and (+5c), which output comparison signals, output high-level pulses in response to voltage signals from the first hole CTgυ and rectifier 'au■, which are higher than the quasi-voltage value of both threads, respectively. 1st degree M2 pulse generation circuit consisting of monostable multivibrator, (+5d)
is the first stop circuit, and one of the pulse generation circuits (+
50), the output period of said pulse which is a predetermined time by Noculus from (+50)'.

That is, during the high level period, the output of the base control signal from the base control section to each of the transistors (8a) to (ad) is stopped, and switching of each of the transistors (3a) to (3d) is stopped. -111≠Moan→〒 (+5e), (+5e)' are both pulse generation circuits (+50
), (+50)', and the counted pulse numbers are respectively counted as the 1st. Second setting device (
15f), (+5f)' [When the value is reached, the 1st. The first one outputs the second command signal. A second counter (15g) is a stop section and has a display section, and completely controls the output of the base control signal from the base control section to each of the transistors (3a) to (3d) in response to one of the command signals. The switching of each transistor (3a) to (3d) is stopped, and an abnormality is displayed on the display section.
+58)', double membrane regulator (15f), (15f)'' and stop part (15g) constitute a second stop circuit (15h), and the circuit surrounded by the one-dot chain line in Fig. 4 prevents overcurrent. Protection part (IQ is configured.

Next, the operation of the embodiment will be explained.

Now, the first and fourth transistors (3a) are activated by the base control signal from the base control section of the control circuit (1).

(3d) and second. Third transistor (3b), (3
C) alternately turns on and off, and the inverter (6)
For example, when the first . third transistor (8a),
(3C) If both are turned on at the same time, the first. Third transistor (3a).

(3C) turns on at the same time, the output of impark (6) becomes LC ear, 4-piece (6). 1□j, □, 1ゎ,
1) The voltage value of the voltage signal from v CT Ql) to the first comparator circuit (15b) is the reference power supply (+5a)
exceeds the reference voltage value, and the first comparison circuit (+51)
) The first pulse generation circuit (15G)
The output of /i turns to high level and a high level pulse is output, and the mJ pulse causes the first stop circuit (+5d, )
is activated, and the base control is activated by the first stop circuit (15d) only during the output period of the pulse. The output of the base control 1 signal from the 41 section to each transistor (8a,) to (3d) is stopped, the switching of each transistor (3a) to (3d) is stopped, and the operation of the inverter (6) is stopped. I.J.
It stops only during the high level period of the pulse.

Then, when the output of the first pulse generating circuit (150) is inverted to the 71 high level and then inverted again to the low level after a predetermined period of time, the first stop circuit (15d) stops operating and the base control section sends each transistor ( The angle base control signals are output to 3a) to (3d), but "E"
If overcurrent continues to flow to the primary side of the inverter (6) due to simultaneous ON of the 8th transistors (3a) and (3G), the operation in 1jJ is repeated and the 1st The counter (+50) causes the first pulse generation circuit (15
The number of pulses from C) is counted and the first counter (+
When the count value of 5 (+) reaches the set value by the first setting device (15f), the stop section (15g) is activated by the command signal output from the first counter (+58), and the second stop circuit (1511 ), the output of the base control signal from the iJ base control unit to each transistor (3a) to (3d) is completely stopped, and each transistor (3a) to (3d)
The switching of the inverter (6) is stopped and the operation of the inverter (6) is completely stopped, and an abnormality is displayed on the display section of the stop section (15g).

Next, the load (8) becomes overloaded and the inverter (6)
If an overcurrent flows through the primary winding (7a) of the transformer (7), which is the secondary side of the
When the voltage value of the voltage signal from the CT (2) to the second comparison circuit (15b)' exceeds the reference voltage value from the reference power supply (+5a)' and an overcurrent occurs on the primary side of the inverter (6). Same as.

Similarly, a high level pulse is output from the second pass generation circuit (15c), and the pulse causes the first stop circuit (+
5d) from the base control section to each transistor (3
The output of the base control signal to a) to (3d) is stopped, and the operation of the inverter (6) is stopped only during the high level period of the pulse.

Furthermore, if the overcurrent continues to flow to the secondary side of the inverter (6) even after the pulse from the second pulse generation circuit (150)' is inverted to low level, the inverter (
6) When an overcurrent occurs on the primary side, the second pulse generating circuit (15C) is activated by the second counter (+5(!,)').
The number of pulses from the second counter (15e
)' reaches the value set by the second setter (15f)', the second stop circuit (+5h) outputs the base control signal from the base control section to each transistor (3a) to (3d). Completely stopped, each transistor (
3a) to (3d) are stopped, and the operation of the inverter (6) is completely stopped, and at the same time, the switching of the inverter (6) is stopped.
An abnormality is displayed on the display section.

When the load (8) is of the capacitor input type, the inverter (6) operates and the load (8) is connected to the load (8) through the transformer (7).
), the negative m (8
) requires a large charging current to charge the capacitor of the inverter (6), that is, the transformer (7).
), an overcurrent flows through the primary winding (7a), and as described above, the q-first stop circuit (+5d) is activated and the base control signal is sent to each transistor (3a) to (3d) in the base control section. The output of the first stop circuit (1
When the base control section outputs and stops outputting the base control signal according to step 5d), the charging current of the capacitor gradually decreases, and eventually the rectifier α
The voltage value of the voltage signal from the second Ho) vCT (6) rectified by the barrel becomes lower than the reference voltage value from the reference power supply (15a)', and the first. Second stop circuit (15d), (+
5b) no longer operate, the inverter (6) continues to operate normally, and the load (8) is started.

Therefore, according to the embodiment, the hole CTaυ,α
4, it is possible to remove delay elements such as DC current transformers, and it is possible to instantly stop the inverter (6) when an overcurrent occurs.

It is possible to prevent damage to the transistors (3a) to (3d), etc.

In addition, the first stop circuit (15d) and the second stop circuit (15d)
5h), even if the load (8) is a capacitor input type, it can be started easily, making it very practical.
It is useful for two purposes.

In the above embodiment, the inverter (6) is of a full-bridge type using transistors, but it goes without saying that it may be of a half-bridge type.

[Brief explanation of drawings]

Figure 1 is a wiring diagram of a conventional inverter overcurrent protection circuit.
Fig. 2 is a partial wiring diagram of Fig. 1, Fig. 3 and the following drawings show one embodiment of the overcurrent protection circuit for an inverter according to the present invention, Fig. 3 is a wiring diagram, and Fig. 4 is a schematic diagram. FIG. (3a) to (3d)...transistors, (6)...
Inverter, aυ. 0 discharge/hole CT, (+51)), (+5b)'...
Comparison circuit, (15G). (+50)'...Pulse generation circuit, (15d)...
First stop circuit, (15h)...second stop circuit. Agent Nof@! Mr. Fujita Ryuobu Figure 1 Figure 2

Claims (1)

[Claims] (1) An inverter that converts direct current into alternating current by switching multiple transistors, and a voltage signal that is provided on the primary and secondary sides of the inverter and is proportional to the current flowing through the primary and secondary sides. Compare the output voltage values of the first and second Hall CTs to be output, the output voltage values of both the Hall CTs, and each of the two reference voltage values, and compare the voltage signals from the Hall CTs that are each higher than the reference voltage values. first and second comparison circuits that output signals, first and second pulse generation circuits that output pulses based on both of the comparison signals, and switching of each of the transistors using pulses from either of the pulse generation circuits. A first stop circuit that stops switching for a predetermined period of time; and a second stop circuit that counts both pulse numbers and stops switching of each of the transistors when one of the pulse numbers reaches a set value. Features an inverter overcurrent protection circuit.