JPS6143797B2 - - Google Patents

Info

Publication number
JPS6143797B2
JPS6143797B2 JP14519580A JP14519580A JPS6143797B2 JP S6143797 B2 JPS6143797 B2 JP S6143797B2 JP 14519580 A JP14519580 A JP 14519580A JP 14519580 A JP14519580 A JP 14519580A JP S6143797 B2 JPS6143797 B2 JP S6143797B2
Authority
JP
Japan
Prior art keywords
floating gate
potential
gate
memory cell
control gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP14519580A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5769592A (en
Inventor
Hiroshi Iwahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP14519580A priority Critical patent/JPS5769592A/ja
Publication of JPS5769592A publication Critical patent/JPS5769592A/ja
Publication of JPS6143797B2 publication Critical patent/JPS6143797B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0416—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)
JP14519580A 1980-10-17 1980-10-17 Semiconductor storage device Granted JPS5769592A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14519580A JPS5769592A (en) 1980-10-17 1980-10-17 Semiconductor storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14519580A JPS5769592A (en) 1980-10-17 1980-10-17 Semiconductor storage device

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP60075556A Division JPS60242598A (ja) 1985-04-10 1985-04-10 半導体記憶装置
JP60075555A Division JPS60242597A (ja) 1985-04-10 1985-04-10 半導体記憶装置

Publications (2)

Publication Number Publication Date
JPS5769592A JPS5769592A (en) 1982-04-28
JPS6143797B2 true JPS6143797B2 (enrdf_load_stackoverflow) 1986-09-30

Family

ID=15379612

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14519580A Granted JPS5769592A (en) 1980-10-17 1980-10-17 Semiconductor storage device

Country Status (1)

Country Link
JP (1) JPS5769592A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5295096A (en) * 1988-07-11 1994-03-15 Mitsubishi Denki Kabushiki Kaisha NAND type EEPROM and operating method therefor

Also Published As

Publication number Publication date
JPS5769592A (en) 1982-04-28

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