JPS6143018A - Signal switching circuit - Google Patents

Abstract

PURPOSE:To suppress the generation of an unnecessary siwtching pulse by providing a constant source and a resistor in series setting the operating current of each differential circuit in a signal switching circuit comprising full feedback type double balanced type differential amplifier circuit. CONSTITUTION:A differential circuit 36 is provided to the differential circuits 32, 34. Transistors (TRs) 38, 40 and resistors 42, 44 as constant current sources are provided while being connected in series to the current path between the differential circuits 32, 34 and 36. An input signal fed to input terminal 62, 64 is selected laternately in response to switching signals A, B is selected alternately and outputted on an output terminal 66. Since the level of the unnecessary switching pulse outputted to the terminal 66 is suppressed by limiting the change in the current flowing to a base-collector capacitance of the TRs 54, 56 because the resistors 42, 44 are connected in series with the capacitance. Thus, the generation of an unnecessary switching pulse is suppressed.

Description

DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION This invention relates to an improvement in a signal switching circuit constructed with a fully feedback double-balanced differential amplifier circuit.

Conventional technology A signal switching circuit composed of a fully feedback double-balanced differential amplifier circuit has a third differential amplifier circuit for first and second differential circuits 2.4, as shown in FIG. A differential circuit 6 is installed.

The first differential circuit 2&' is composed of transistors 8 and 10, the second differential circuit 4 is composed of transistors 12 and -14, and the third differential circuit 6 is composed of transistors 16 and 16.
．． It consists of 18. The resistor 20 is a load resistance of the first and second differential circuits 2.4 and 2.4.6.
An operating current is applied from a constant current source 22 to .

A first signal is applied to the input terminal 24, a second signal is applied to the input terminal 26, a switching signal is applied to the base of the transistor 16.18 from a control circuit (not shown), and the selected signal is output. It is taken out from the terminal 28.

That is, when the base potential of the transistor 16 is higher than the base potential of the transistor 18, an operating current flows through the first differential circuit 2, so that the first
is selected and appears at the output terminal 28. Furthermore, when the base potential of the transistor 18 is higher than the base potential of the transistor 16, an operating current flows through the second differential circuit 4, so that the second signal applied to the input terminal 26 is selected and output to the output terminal 28. appears in

A in FIG. 4 is a switching signal applied to the base of transistor 18, and B in FIG. 4 is a switching signal applied to the base of transistor 16.

Problem to be Solved by the Invention When performing this signal switching at high speed, the transistor 16
．． Since the capacitance C11c exists between the base and the collector of 18, an unnecessary switching pulse C8 is generated when the signal is switched, as shown in C in FIG.

Accordingly, the present invention aims to suppress the generation of unnecessary switching pulses in signal output due to such signal switching.

Means for Solving the Problems The present invention provides a third differential circuit that selects a signal by selectively switching the operation of the first and second differential circuits to which signals are individually applied. In the signal switching circuit, a signal switching circuit for the first, second and third differential circuits is provided in a current path between the first and second differential circuits and the third differential circuit. A constant current source that sets the operating current and a resistor are installed in series.

A constant current source is installed between the first and second differential circuits and the third differential circuit, and a constant current is supplied to the transistors constituting the third differential circuit. By connecting a resistor in series with the capacitance between the base and collector of the capacitor, changes in the current flowing through the capacitor are suppressed.

Embodiments Hereinafter, the present invention will be explained in detail with reference to embodiments shown in the drawings.

FIG. 1 shows an embodiment of the signal switching circuit of the present invention.

A third differential circuit 36 is installed for the first and second differential circuits 32 and 34.
2.34 and the third differential circuit 36, a transistor 38.40 as a constant current source and a resistor 42 are provided.
．． 44 are connected and installed in series.

That is, the first differential circuit 32 is a pair of transistors 46.48 with a common emitter, and the second differential circuit 34 is a pair of transistors 50.52J with a common emitter.
Further, the third differential circuit 36 includes a pair of transistors 54 and 56, each having a common emitter, and the emitters of the transistors 54 and 56 are connected to a ground point (GND). 1 and second differential circuit 3
The load resistance is 2.34.

Also, the transistor 38.400 base has a resistor 4
2.44 and transistor 54.56,
A constant constant current is generated, and the input terminal 6
The first and second signals are applied to the transistor 54.56, and the signal from the transistor 54.56 is extracted from the crystal power terminal 66. explain.

Transistor 46.48 or transistor 50.52
Assuming that the current flowing through the transistor 38 or the transistor 40 is 1, the circuit conditions are set so that an operating current of 2I flows through the transistor 38 or the transistor 40.

In this case, the operating current flowing through the range length 46.48 or the transistor 50.52 is the transistor 3'.
8.60, resistor 42.44 and transistor 54.5
It is set at 6.

4. If the transistor 54 or the transistor 56
When a voltage is applied to the penis of transistor 54 or ' to make transistor 56 sufficiently conductive, the operating current 2I is 2I = (Vm V++i
It is given by VCE(SATI)/R. here,
R is the resistance value of the resistor 42 or the resistor 44, (1) is the emitter-base voltage of the transistor 38 or the transistor 40, and V ct +sAt+ is the collector-emitter saturation voltage of the transistor 54 or the transistor 56.

Also, at this time, the resistance values R4t and R4 of the resistor 42.44
4 is R= Ra□=R44, collector-emitter saturation voltage v ct of transistor 54.56 (S^TIQ
S4sV CE (SATI 1156 is V CE
+5AT) = V CE +5AT1 QS4 =
VcE (SATI 056, transistor 38
．． The operating currents I flowing through 40 become equal.

At this time, the base-emitter voltage V□Q'311 11E'114° of the transistor 38.40 is 1
, ■ v0=vllE, 38=vll! I24゜There's nothing to say about it.

Furthermore, when a voltage is applied to the base of the transistor 54 or the transistor 56 that makes the transistor 54 or the transistor 56 non-conductive, the collector and emitter of each transistor 54 and 56 are in an open state. Alternatively, no operating current flows through the transistor 40.

The switching signal pulse shown at A in FIG.
(as shown in Figure 2B) 4
Therefore, when 2.71 □ 31 4 o 6-7 . 34 operating currents are alternately switched and input terminal 6
The first and second signals applied at 2.64 are alternately selected and appear at the output terminal 66, as shown in FIG. 2C.

In this case, at C of FIG. 2, Co designates the switching pulse appearing at the output terminal 66, the level of this switching pulse C0 being 'each transistor 54.511! Since the resistors 42 and 44 are connected in series with the base-collector capacitance of the capacitor, changes in the current flowing through the capacitance are limited, and as a result, changes in the current flowing through the capacitance are suppressed to a negligible level compared to conventional circuits.

Furthermore, as is clear from a comparison with the conventional circuit shown in FIG. 3, since the transistors 54.56 are placed on the ground side, the collector of the transistors 54.56 has a Since the saturation voltage is given to an extremely lower value than in the conventional circuit, it is possible to expand the dynamic range of the signal.

As described in detail, according to the present invention, even if the signal switching speed is increased, switching pulses can be suppressed to an almost negligible level, and the dynamic range of the signal can be expanded.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the signal switching circuit of the present invention, FIG. 2 is an explanatory diagram showing its operation, FIG. 3 is a circuit diagram showing a conventional signal switching circuit, and FIG. 4 is a circuit diagram showing its operation. FIG. 32... First differential circuit, 34... Second differential circuit, 36... Third differential circuit, 38.40... Transistor as constant current source, 42.44... ·resistance. Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] A signal switching circuit including a third differential circuit that selectively switches the operation of first and second differential circuits to which signals are individually applied to select the signal,
A constant current source and a resistor that set operating currents for the first, second, and third differential circuits in a current path between the first and second differential circuits and the third differential circuit. A signal switching circuit characterized in that two are installed in series.