JPH02137129U - - Google Patents

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Publication number
JPH02137129U
JPH02137129U JP4590089U JP4590089U JPH02137129U JP H02137129 U JPH02137129 U JP H02137129U JP 4590089 U JP4590089 U JP 4590089U JP 4590089 U JP4590089 U JP 4590089U JP H02137129 U JPH02137129 U JP H02137129U
Authority
JP
Japan
Prior art keywords
constant current
switching circuit
bias
current source
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4590089U
Other languages
Japanese (ja)
Other versions
JPH0633713Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989045900U priority Critical patent/JPH0633713Y2/en
Publication of JPH02137129U publication Critical patent/JPH02137129U/ja
Application granted granted Critical
Publication of JPH0633713Y2 publication Critical patent/JPH0633713Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Electronic Switches (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本考案のアナログ・スイツチ回路の
一実施例を示す図、第2図は、アナログ・スイツ
チ回路の他の実施例を示す図、第3図は、動作速
度を説明する為の図、第4図は、従来のアナログ
・スイツチ回路を示す図である。 1,2……入力端子、3……出力端子、4,5
,6……端子、7……バイアス切換回路、8……
切換回路、9……電流ミラー回路。
Fig. 1 is a diagram showing one embodiment of the analog switch circuit of the present invention, Fig. 2 is a diagram showing another embodiment of the analog switch circuit, and Fig. 3 is a diagram showing the operating speed. FIG. 4 is a diagram showing a conventional analog switch circuit. 1, 2...Input terminal, 3...Output terminal, 4,5
, 6... terminal, 7... bias switching circuit, 8...
Switching circuit, 9...Current mirror circuit.

Claims (1)

【実用新案登録請求の範囲】 (1) 第1と第2の入力信号が供給される第1と
第2のトランジスタから形成された差動対を含む
切換回路と、該切換回路の該第1と該第2のトラ
ンジスタの何れかに定電流化されたバイアス電流
を供給することによつて前記第1と第2の入力信
号の何れかを選択するバイアス切換回路とを具え
ることを特徴とするアナログ・スイツチ回路。 (2) 第1と第2の入力信号が供給される第1と
第2のトランジスタから形成された差動対を含む
切換回路と、該切換回路の該第1と該第2のトラ
ンジスタのベースの何れかに定電流化されたバイ
アス電流を供給して前記第1と第2の入力信号の
何れかを選択するバイアス切換回路とから構成さ
れ、該バイアス切換回路が第1の定電流源回路の
出力段に接続されたPNPトランジスタと、第2
の定電流源回路の出力段に接続されたNPNトラ
ンジスタと、該NPNトランジスタのエミツタに
接続されたダイオードと、該PNPトランジスタ
と該NPNトランジスタの共通接続されたベース
に接続された切り換えの為の制御信号が入力され
る分圧抵抗とから形成され、該第1の定電流源の
出力段と第2の定電流源の出力段が夫々前記第1
と第2のトランジスタのベースに接続されている
ことを特徴とするアナログ・スイツチ回路。
[Claims for Utility Model Registration] (1) A switching circuit including a differential pair formed of first and second transistors to which first and second input signals are supplied; and a bias switching circuit that selects either the first or second input signal by supplying a constant bias current to either of the second transistors. analog switch circuit. (2) a switching circuit including a differential pair formed of first and second transistors to which first and second input signals are supplied, and bases of the first and second transistors of the switching circuit; a bias switching circuit that supplies a constant current bias current to one of the first and second input signals, and the bias switching circuit supplies a constant current bias current to one of the first and second input signals, and the bias switching circuit is a first constant current source circuit. a PNP transistor connected to the output stage of the second
an NPN transistor connected to the output stage of the constant current source circuit, a diode connected to the emitter of the NPN transistor, and a switching control connected to the commonly connected bases of the PNP transistor and the NPN transistor. and a voltage dividing resistor into which a signal is input, and the output stage of the first constant current source and the output stage of the second constant current source are respectively connected to the first constant current source.
and a second transistor connected to the base of the analog switch circuit.
JP1989045900U 1989-04-19 1989-04-19 Analog switch circuit Expired - Lifetime JPH0633713Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989045900U JPH0633713Y2 (en) 1989-04-19 1989-04-19 Analog switch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989045900U JPH0633713Y2 (en) 1989-04-19 1989-04-19 Analog switch circuit

Publications (2)

Publication Number Publication Date
JPH02137129U true JPH02137129U (en) 1990-11-15
JPH0633713Y2 JPH0633713Y2 (en) 1994-08-31

Family

ID=31560491

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989045900U Expired - Lifetime JPH0633713Y2 (en) 1989-04-19 1989-04-19 Analog switch circuit

Country Status (1)

Country Link
JP (1) JPH0633713Y2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001111402A (en) * 1999-03-30 2001-04-20 Lucent Technol Inc Current divider

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6143018A (en) * 1984-08-06 1986-03-01 Rohm Co Ltd Signal switching circuit
JPS62295511A (en) * 1986-06-16 1987-12-22 Matsushita Electric Ind Co Ltd Signal switching device
JPS6480123A (en) * 1987-09-22 1989-03-27 Matsushita Electric Ind Co Ltd Signal switching circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6143018A (en) * 1984-08-06 1986-03-01 Rohm Co Ltd Signal switching circuit
JPS62295511A (en) * 1986-06-16 1987-12-22 Matsushita Electric Ind Co Ltd Signal switching device
JPS6480123A (en) * 1987-09-22 1989-03-27 Matsushita Electric Ind Co Ltd Signal switching circuit

Also Published As

Publication number Publication date
JPH0633713Y2 (en) 1994-08-31

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