JPS6142859U - hybrid integrated circuit - Google Patents

hybrid integrated circuit

Info

Publication number
JPS6142859U
JPS6142859U JP12782984U JP12782984U JPS6142859U JP S6142859 U JPS6142859 U JP S6142859U JP 12782984 U JP12782984 U JP 12782984U JP 12782984 U JP12782984 U JP 12782984U JP S6142859 U JPS6142859 U JP S6142859U
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
abstract
fixing frame
sandwiching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12782984U
Other languages
Japanese (ja)
Inventor
功 座間
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP12782984U priority Critical patent/JPS6142859U/en
Publication of JPS6142859U publication Critical patent/JPS6142859U/en
Pending legal-status Critical Current

Links

Landscapes

  • Casings For Electric Apparatus (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例による混成集積回路の断面図
、第2図は第1図の上面図、第3図は従来例を示す断面
図。 1・・・下側回路基板、2・・・固定枠、3・・・下側
回路基板のリード端子、1′・・・上側回路基板、3′
・・・上側回路基板のリード端子、4・・・下側回路基
板搭載ペレ’/}、4’・・・上側回路革板の搭載ペレ
ット。
FIG. 1 is a sectional view of a hybrid integrated circuit according to an embodiment of the present invention, FIG. 2 is a top view of FIG. 1, and FIG. 3 is a sectional view of a conventional example. DESCRIPTION OF SYMBOLS 1...Lower circuit board, 2...Fixing frame, 3...Lead terminal of lower circuit board, 1'...Upper circuit board, 3'
...Lead terminal of the upper circuit board, 4...Pellet mounted on the lower circuit board'/}, 4'...Pellet mounted on the upper circuit board.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ほぼ同面積の二つの回路基板をそれぞれ搭載ペレット面
を向い合せ固定枠を挾んで固定したことを特徴とする混
成集積回路。
A hybrid integrated circuit characterized by two circuit boards having approximately the same area, each with their mounting pellet surfaces facing each other and fixed by sandwiching a fixing frame.
JP12782984U 1984-08-23 1984-08-23 hybrid integrated circuit Pending JPS6142859U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12782984U JPS6142859U (en) 1984-08-23 1984-08-23 hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12782984U JPS6142859U (en) 1984-08-23 1984-08-23 hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPS6142859U true JPS6142859U (en) 1986-03-19

Family

ID=30686459

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12782984U Pending JPS6142859U (en) 1984-08-23 1984-08-23 hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS6142859U (en)

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