JPS6142625U - CPU power consumption reduction device - Google Patents
CPU power consumption reduction deviceInfo
- Publication number
- JPS6142625U JPS6142625U JP12527884U JP12527884U JPS6142625U JP S6142625 U JPS6142625 U JP S6142625U JP 12527884 U JP12527884 U JP 12527884U JP 12527884 U JP12527884 U JP 12527884U JP S6142625 U JPS6142625 U JP S6142625U
- Authority
- JP
- Japan
- Prior art keywords
- power consumption
- cpu
- output port
- reduction device
- consumption reduction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Power Sources (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の構成を示す一実施例のブロック図、第
２図は本考案のフローチャート、第３図は本考案の他の
実施例を示す図である。
１・・・ＣＰＵ， ２・・・分周回路、３・・・クロツ
ク切分け回路、４・・・出力ポート、５・・・発振器。FIG. 1 is a block diagram of one embodiment showing the configuration of the present invention, FIG. 2 is a flow chart of the present invention, and FIG. 3 is a diagram showing another embodiment of the present invention. 1... CPU, 2... Frequency divider circuit, 3... Clock separation circuit, 4... Output port, 5... Oscillator.
Claims (1)
け回路と、出力ポートからなり、ＣＰＵが低消費電力モ
ードに入りたい出力ポートに信号を出してクロックを低
速に″切り換え、また、割込み等の要求により処理が必
要になった時は、再び出力ポートに信号を出し高速クロ
ツクモードとすることを特徴とするＣＰＵの低消費電力
化装置。It consists of a CPU, an n-stage frequency divider circuit with a reset, a clock isolation circuit, and an output port.The CPU sends a signal to the output port that wants to enter low power consumption mode to switch the clock to a low speed, and also handles interrupts. A device for reducing power consumption of a CPU, which is characterized in that when processing becomes necessary due to a request such as that, a signal is sent to an output port again to set it to a high-speed clock mode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12527884U JPS6142625U (en) | 1984-08-20 | 1984-08-20 | CPU power consumption reduction device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12527884U JPS6142625U (en) | 1984-08-20 | 1984-08-20 | CPU power consumption reduction device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6142625U true JPS6142625U (en) | 1986-03-19 |
Family
ID=30683966
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12527884U Pending JPS6142625U (en) | 1984-08-20 | 1984-08-20 | CPU power consumption reduction device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6142625U (en) |
-
1984
- 1984-08-20 JP JP12527884U patent/JPS6142625U/en active Pending
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