JPS6141459B2 - - Google Patents

Info

Publication number
JPS6141459B2
JPS6141459B2 JP2114679A JP2114679A JPS6141459B2 JP S6141459 B2 JPS6141459 B2 JP S6141459B2 JP 2114679 A JP2114679 A JP 2114679A JP 2114679 A JP2114679 A JP 2114679A JP S6141459 B2 JPS6141459 B2 JP S6141459B2
Authority
JP
Japan
Prior art keywords
phase
output
circuit
timer
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP2114679A
Other languages
English (en)
Japanese (ja)
Other versions
JPS55114042A (en
Inventor
Tsutomu Hosokawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP2114679A priority Critical patent/JPS55114042A/ja
Publication of JPS55114042A publication Critical patent/JPS55114042A/ja
Publication of JPS6141459B2 publication Critical patent/JPS6141459B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/227—Demodulator circuits; Receiver circuits using coherent demodulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
JP2114679A 1979-02-23 1979-02-23 Training sequence discrimination circuit Granted JPS55114042A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2114679A JPS55114042A (en) 1979-02-23 1979-02-23 Training sequence discrimination circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2114679A JPS55114042A (en) 1979-02-23 1979-02-23 Training sequence discrimination circuit

Publications (2)

Publication Number Publication Date
JPS55114042A JPS55114042A (en) 1980-09-03
JPS6141459B2 true JPS6141459B2 (enrdf_load_stackoverflow) 1986-09-16

Family

ID=12046754

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2114679A Granted JPS55114042A (en) 1979-02-23 1979-02-23 Training sequence discrimination circuit

Country Status (1)

Country Link
JP (1) JPS55114042A (enrdf_load_stackoverflow)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59208948A (ja) * 1983-05-13 1984-11-27 Ricoh Co Ltd デ−タ伝送同期検出方式
US5309476A (en) * 1991-09-26 1994-05-03 International Business Machines Corp. Automode signal detection in full duplex modems
JP5239259B2 (ja) 2007-08-30 2013-07-17 富士通セミコンダクター株式会社 データ伝送回路

Also Published As

Publication number Publication date
JPS55114042A (en) 1980-09-03

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