JPS6141303B2 - - Google Patents
Info
- Publication number
- JPS6141303B2 JPS6141303B2 JP759381A JP759381A JPS6141303B2 JP S6141303 B2 JPS6141303 B2 JP S6141303B2 JP 759381 A JP759381 A JP 759381A JP 759381 A JP759381 A JP 759381A JP S6141303 B2 JPS6141303 B2 JP S6141303B2
- Authority
- JP
- Japan
- Prior art keywords
- nickel
- layer
- circuit
- copper
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 48
- 239000010410 layer Substances 0.000 claims description 35
- 229910052759 nickel Inorganic materials 0.000 claims description 24
- 238000000034 method Methods 0.000 claims description 21
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 19
- 229910052802 copper Inorganic materials 0.000 claims description 19
- 239000010949 copper Substances 0.000 claims description 19
- 238000005530 etching Methods 0.000 claims description 13
- 239000000758 substrate Substances 0.000 claims description 13
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- 239000012790 adhesive layer Substances 0.000 claims description 3
- 238000010030 laminating Methods 0.000 claims 1
- 238000007747 plating Methods 0.000 description 8
- 239000000463 material Substances 0.000 description 7
- 239000011347 resin Substances 0.000 description 7
- 229920005989 resin Polymers 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 238000007639 printing Methods 0.000 description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 4
- 239000002585 base Substances 0.000 description 4
- 239000004020 conductor Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 229910052709 silver Inorganic materials 0.000 description 4
- 239000004332 silver Substances 0.000 description 4
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 3
- 229910021578 Iron(III) chloride Inorganic materials 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- ROOXNKNUYICQNP-UHFFFAOYSA-N ammonium persulfate Chemical compound [NH4+].[NH4+].[O-]S(=O)(=O)OOS([O-])(=O)=O ROOXNKNUYICQNP-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000007654 immersion Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- RBTARNINKXHZNM-UHFFFAOYSA-K iron trichloride Chemical compound Cl[Fe](Cl)Cl RBTARNINKXHZNM-UHFFFAOYSA-K 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- 229910001870 ammonium persulfate Inorganic materials 0.000 description 1
- 239000010953 base metal Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 235000011118 potassium hydroxide Nutrition 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
Description
【発明の詳細な説明】
本発明はプリント配線基板等の基板材料として
使用するに好適な積層板に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a laminate suitable for use as a substrate material for printed wiring boards and the like.
導電部として単種類の金属層しか持たないプリ
ント配線基板の基板材料に公知のエツチング処理
のみにて回路パターンを形成させたとき、単種類
の金属回路パターン即ち一層回路パターンしか形
成できない。 When a circuit pattern is formed on a substrate material of a printed wiring board having only a single type of metal layer as a conductive part by a known etching process, only a single type of metal circuit pattern, that is, a single layer circuit pattern can be formed.
本発明はメツキ等の加工を行わずに公知のエツ
チング加工のみによつてニツケル回路と銅回路の
二種類の金属回路パターンを同時に得られる積層
板を提供するものであり、従来方法に比しコスト
ダウンが可能となり、回路メツキ法による剥離、
表面凹凸、組成、等の回路形成後に発生するトラ
ブルが、全くないため、性能品質が大巾に向上す
るものである。また従来の回路メツキ法によるニ
ツケルメツキでは所望の回路パターン間を全てメ
ツキリード線によつて接続する必要があり、回路
設計的に制約を受けたり、メツキ後パンチング或
いはドリリングによつて不要なメツキリード線を
切断するデメリツトがあつたが本発明による積層
板によればこれらのデメリツトは全くない。 The present invention provides a laminate that can simultaneously obtain two types of metal circuit patterns, a nickel circuit and a copper circuit, by only a known etching process without plating or other processes, and is less expensive than conventional methods. It is now possible to remove the film using the circuit plating method.
Since there are no problems such as surface irregularities, composition, etc. that occur after circuit formation, the performance quality is greatly improved. In addition, in nickel plating using the conventional circuit plating method, it is necessary to connect all desired circuit patterns with plating lead wires, which may be subject to restrictions in circuit design, or cutting unnecessary plating lead wires by punching or drilling after plating. However, the laminate according to the present invention does not have these disadvantages at all.
さらに、金属ベース基板にメツキリード線を配
した場合パンチングで発生するかえりによつて回
路パターンとベース金属とが導通することが考え
られ、ひいては短絡に到る不安があつたが本発明
によればこの不安もない。 Furthermore, when a mated lead wire is placed on a metal base board, there is a possibility that burrs caused by punching may cause electrical continuity between the circuit pattern and the base metal, which could lead to a short circuit. I have no worries.
以下、本発明の実施例を図面を参照して詳細に
説明する。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
第1図は本発明の実施例に係る積層板の断面
図、第2図イ〜ニはこの積層板を使用してプリン
ト配線基板を製造する過程を説明するための図で
ある。 FIG. 1 is a sectional view of a laminate according to an embodiment of the present invention, and FIGS. 2A to 2D are diagrams for explaining the process of manufacturing a printed wiring board using this laminate.
第1図において、積層板はニツケル層11,1
3、銅層12、接着剤層14、およびベース(基
板)15の各層からなる。このような積層板につ
いて、公知の印刷法または写真法によつてレジス
ト16を形成した後所望の回路パターンを得るた
めエツチング処理する〔第2図イ〕。このエツチ
ング処理に使用する溶液の例として銅とニツケル
とを腐食できる塩化第2鉄がある。 In FIG. 1, the laminate is made of nickel layers 11, 1
3, a copper layer 12, an adhesive layer 14, and a base (substrate) 15. After a resist 16 is formed on such a laminate by a known printing method or photographic method, it is etched to obtain a desired circuit pattern (FIG. 2A). An example of a solution used in this etching process is ferric chloride, which can corrode copper and nickel.
銅の層を利用して前記の回路パターンとは異な
る回路パターンを得るには前塗済レジストにその
パターンに対応するように剥膜処理を施こす〔同
図ロ〕。この処理方法としてポジーポジ型感光膜
レジストであれば二次露光、二次現象等がある。
このような剥膜処理後、最上ニツケル層11のみ
をエツチング処理する〔同図ハ〕。このエツチン
グ処理の方法としては上述した塩化第2鉄溶液へ
の浸漬時間コントロールによるか、またはニツケ
ルを腐食できるが銅を腐食できない他の溶液への
浸漬がある。 In order to obtain a circuit pattern different from the above-mentioned circuit pattern by using a copper layer, the pre-coated resist is subjected to a film peeling process corresponding to the pattern (FIG. 2B). This processing method includes secondary exposure, secondary phenomenon, etc. in the case of a positive type photosensitive film resist.
After such film peeling, only the uppermost nickel layer 11 is etched (FIG. 3C). Methods for this etching treatment include controlling the immersion time in the ferric chloride solution mentioned above, or immersion in other solutions that can corrode nickel but not copper.
エツチング処理完了後は、形成されたレジスト
の剥離を行えば、所望の回路パターンを銅層にも
有するプリント配線基板を得る〔同図ニ〕。即
ち、このようにして、銅層に半田接続される回路
端子用の回路パターンが、また、ニツケル層にボ
ンデイング接続される回路端子用の回路パターン
がそれぞれ形成された配線基板が得られる。 After the etching process is completed, the formed resist is peeled off to obtain a printed wiring board having the desired circuit pattern also on the copper layer (FIG. 2). That is, in this way, a wiring board is obtained in which a circuit pattern for a circuit terminal to be soldered to the copper layer and a circuit pattern for a circuit terminal to be bonded to the nickel layer are formed.
このような三層金属張基板は次に述べる二段平
滑基板を得るのに好都合である。 Such a three-layer metal-clad substrate is convenient for obtaining a two-stage smooth substrate as described below.
第3図は二段平滑基板の製造工程の説明に供す
る図である。 FIG. 3 is a diagram for explaining the manufacturing process of the two-stage smooth substrate.
第2図ロにおける一定のエツチング処理された
積層板について最下のニツケル層13を残して、
最上のニツケル11と銅層12とをエツチング処
理すると第3図イのような断面を有する基板が得
られる。このエツチング処理に用いる溶液として
は最上のニツケル層11をエツチングできるが、
銅層12をエツチングできないもの、または銅、
ニツケル層のいずれも腐食できるが少なくとも最
上ニツケル層は完全にエツチングし銅層は中程度
にエツチングするように時間コントロールし得る
ものを用いれば良い。 For certain etched laminates in FIG. 2B, leaving the bottom nickel layer 13,
When the uppermost nickel layer 11 and copper layer 12 are etched, a substrate having a cross section as shown in FIG. 3A is obtained. The solution used in this etching process can etch the uppermost nickel layer 11, but
Copper layer 12 cannot be etched, or copper,
Although any of the nickel layers can be etched, it is preferable to use a material that can control the time so that at least the uppermost nickel layer is etched completely and the copper layer is etched moderately.
更に、銅層をエツチング処理するには銅層を腐
食できるがニツケル層を腐食できない、例へば過
硫酸アンモン、カセイカリ、等を主成分とするア
ルカリエツチセントを使用する。このようなエツ
チング処理溶液を使用するならば、エツチング処
理時間を多少長く設定しても予め材料的に決定さ
れた最下のニツケル層の厚さだけは確保できる。 Further, to etch the copper layer, an alkali etchant which can corrode the copper layer but cannot corrode the nickel layer, such as ammonium persulfate, caustic potash, etc. as a main component, is used. If such an etching treatment solution is used, even if the etching treatment time is set to be somewhat longer, the thickness of the lowermost nickel layer determined in advance based on the material can be ensured.
この点、従来の単一金属層基板になされるこの
ようなハーフエツチング処理はエツチング深さの
正確な精度の観点から望ましいエツチング処理時
間コントロールを容易にできなかつた。次に、第
3図ロに示すように、レジストの剥膜処理をす
る。その処理後、平滑とされるべきところにスキ
ージング、印刷、等の公知の方法で絶縁樹脂17
を埋め込み〔同図ハ〕、次いで研磨、等によつて
平滑処理する〔同図ニ〕。このような処理工程の
結果、ハーフエツチング工程の管理が容易にな
り、平滑面の導体部分にニツケル面が得られ、ス
ライドスイツチ、ロータリースイツチ、等のスイ
ツチ接点材料にそのまま利用できるという効果を
奏する他に、極く薄い金、パラジウム、銀、等の
貴金属類のメツキーこの場合、ニツケルはメツキ
の下地として利用できる−によつて接点材料とも
なるために高い平滑度のものを得ることができる
という非常に大きい効果、利点を得ることができ
る。 In this respect, in the conventional half-etching process performed on a single metal layer substrate, it is not possible to easily control the etching process time as desired from the viewpoint of accurate etching depth. Next, as shown in FIG. 3B, a resist film removal process is performed. After the treatment, the insulating resin 17 is applied to the areas to be smoothed by a known method such as squeezing, printing, etc.
Embedded [Figure C], and then smoothed by polishing, etc. [Figure D]. As a result of this treatment process, the half-etching process can be easily managed, and a nickel surface can be obtained on the smooth conductor part, which has the effect of being able to be used as is as a switch contact material for slide switches, rotary switches, etc. In this case, nickel can be used as a base material for metal plating such as extremely thin gold, palladium, silver, etc. In this case, nickel can also be used as a contact material, making it possible to obtain a highly smooth surface. You can get great effects and benefits.
第4図は本発明よる積層板を利用する他の用途
の説明に供する図である。 FIG. 4 is a diagram for explaining another use of the laminate according to the present invention.
即ち、同図イはプリントクロスオーバージヤン
パー線用配線基板を示すものであつて、この基板
の回路面には銀、銅、カーボン、等あるいはこれ
らの混合体からなる導電ペースト18′を公知の
スクリーン印刷によつて形成する場合に、前述し
た平滑板から容易に行える。この導電ペーストが
ジヤンパー線として利用される。一般に、基板上
にクロスオーバージヤンパー線を設けるには、ジ
ヤンパー線が基板の回路部と交差する場合、その
交差点には絶縁樹脂層が必要である。しかし、こ
の樹脂層の厚さは1回のスクリーン印刷によれば
通常8〜15ミクロン程度の厚さのものしか得るこ
とができず、その結果ピンホールの存在、厚さ不
足に起因する耐電圧または絶縁抵抗の不良が発生
するおそれがあり、吸湿すれば更にこのおそれが
増加する。従つて、絶縁樹脂層の印刷、硬化を数
回繰返し層厚を増加させることが必要となり、更
にジヤンパー導体が銀系のものであれば銀のマイ
グレーシヨン対策としてその層厚の確保は特に重
要となる。 That is, Figure A shows a wiring board for printed crossover jumper wires, and the circuit surface of this board is coated with a conductive paste 18' made of silver, copper, carbon, etc. or a mixture thereof. When forming by screen printing, it can be easily done from the above-mentioned smooth plate. This conductive paste is used as a jumper wire. Generally, in order to provide a crossover jumper wire on a board, when the jumper wire intersects with a circuit section of the board, an insulating resin layer is required at the intersection. However, the thickness of this resin layer can only be obtained with a thickness of about 8 to 15 microns by one screen printing, and as a result, the presence of pinholes and the withstand voltage due to insufficient thickness. Alternatively, there is a risk of poor insulation resistance occurring, and this risk will further increase if moisture is absorbed. Therefore, it is necessary to increase the layer thickness by repeating printing and curing of the insulating resin layer several times, and if the jumper conductor is silver-based, securing the layer thickness is especially important as a countermeasure against silver migration. Become.
本発明による三層金属基板によれば、このよう
な場合に非常に有用なものであり、中間層の銅と
最上層のニツケルの厚みを材料的に確保すること
によつて絶縁樹脂層の厚みも決定されるため、絶
縁の信頼性の向上を充分に図ることができる。ま
た通常基板へのクロスオーバージヤンパー線印刷
の場合、基板導体部の段差のある部分で付加導体
(ジヤンパー線)の断線を生じがちである。しか
し平滑基板では段差はないため、クロスオーバー
ジヤンパー線印刷の安定性を飛躍的に向上させる
ことができるものである。 The three-layer metal substrate according to the present invention is extremely useful in such cases, and by ensuring the thickness of the intermediate layer copper and the top layer nickel, the thickness of the insulating resin layer can be reduced. is also determined, so that the reliability of insulation can be sufficiently improved. Furthermore, when printing crossover jumper lines on a normal board, the additional conductor (jumper line) tends to break at a stepped portion of the board conductor. However, since there are no steps on a smooth substrate, the stability of crossover jumper line printing can be dramatically improved.
また第4図ロの如く平滑内部にジヤンパー線1
8を設定する事も可能である。この方法によれば
平滑面を得られる上内部の回路構成をより高度に
する事ができる。もちろんこの平滑面上に同図イ
のクロスオーバージヤンパーを設定することもで
きる。 Also, as shown in Figure 4 (b), there is a jumper wire 1 inside the smooth interior.
It is also possible to set 8. According to this method, a smooth surface can be obtained and the internal circuit configuration can be made more sophisticated. Of course, the crossover jumper shown in Figure A can also be set on this smooth surface.
同図ハはエツチング部である凹部に樹脂を埋め
込むとともにその樹脂内に電子部品或いは他の部
品19を搭載した基板を示している。 3C shows a board in which resin is embedded in the recessed portion, which is an etched portion, and electronic components or other components 19 are mounted within the resin.
上述のように、本発明によれば、既述の目的を
達成することができるものである。 As described above, according to the present invention, the above-mentioned objects can be achieved.
第1図は本発明の実施例に係る積層板の断面
図、第2図イ〜ニは前記積層板によるプリント配
線基板の製造過程の説明に供する図、第3図イ〜
ニは前記積層板による平滑基板の製造過程の説明
に供する図、第4図イ〜ハは前記積層板によるプ
リントクロスオーバージヤンパー線基板の製造過
程の説明に供する図である。
11,13…ニツケル層、12…銅層、14…
接着剤層、15…ベース。
FIG. 1 is a cross-sectional view of a laminate according to an embodiment of the present invention, FIGS.
D is a diagram for explaining the manufacturing process of a smooth substrate using the laminate, and FIGS. 4A to 4C are diagrams for explaining the manufacturing process of a printed crossover jumper wire board using the laminate. 11, 13...Nickel layer, 12...Copper layer, 14...
Adhesive layer, 15...base.
Claims (1)
または両面にニツケル、銅、ニツケルの順序で金
属層を積層形成し、 斯る金属層にエツチング加工を施すことにより
上記基板上にニツケル回路と銅回路の二種類の金
属回路パターンを形成した事を特徴とする積層
板。[Claims] 1. The above method is achieved by laminating a metal layer of nickel, copper, and nickel in the order of nickel, copper, and nickel on one or both sides of the substrate via an insulating adhesive layer, and etching the metal layer. A laminate board characterized by having two types of metal circuit patterns, a nickel circuit and a copper circuit, formed on a substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP759381A JPS57120433A (en) | 1981-01-20 | 1981-01-20 | Laminated board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP759381A JPS57120433A (en) | 1981-01-20 | 1981-01-20 | Laminated board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57120433A JPS57120433A (en) | 1982-07-27 |
JPS6141303B2 true JPS6141303B2 (en) | 1986-09-13 |
Family
ID=11670095
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP759381A Granted JPS57120433A (en) | 1981-01-20 | 1981-01-20 | Laminated board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57120433A (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61128593A (en) * | 1984-11-27 | 1986-06-16 | 株式会社 麗光 | Evaporation film for printed circuit |
JPS61284991A (en) * | 1985-06-11 | 1986-12-15 | 電気化学工業株式会社 | Circuit formation for aluminum/copper composite lined board |
JPS62181488A (en) * | 1986-02-05 | 1987-08-08 | 尾池工業株式会社 | Film material for flexible printed circuit |
CN115243977A (en) * | 2020-03-26 | 2022-10-25 | 东洋制罐株式会社 | Container with a lid |
-
1981
- 1981-01-20 JP JP759381A patent/JPS57120433A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS57120433A (en) | 1982-07-27 |
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