JPS6141249Y2 - - Google Patents
Info
- Publication number
- JPS6141249Y2 JPS6141249Y2 JP221680U JP221680U JPS6141249Y2 JP S6141249 Y2 JPS6141249 Y2 JP S6141249Y2 JP 221680 U JP221680 U JP 221680U JP 221680 U JP221680 U JP 221680U JP S6141249 Y2 JPS6141249 Y2 JP S6141249Y2
- Authority
- JP
- Japan
- Prior art keywords
- bonding
- electrode
- current
- semiconductor device
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 30
- 239000002184 metal Substances 0.000 description 7
- 239000003990 capacitor Substances 0.000 description 5
- 230000003321 amplification Effects 0.000 description 2
- 239000012141 concentrate Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP221680U JPS6141249Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1980-01-11 | 1980-01-11 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP221680U JPS6141249Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1980-01-11 | 1980-01-11 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56104148U JPS56104148U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1981-08-14 |
JPS6141249Y2 true JPS6141249Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1986-11-25 |
Family
ID=29599073
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP221680U Expired JPS6141249Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1980-01-11 | 1980-01-11 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6141249Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
-
1980
- 1980-01-11 JP JP221680U patent/JPS6141249Y2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS56104148U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1981-08-14 |