JPS6135578A - Connection of superconductive circuit - Google Patents

Abstract

PURPOSE:To enable high-packing density superconductive integrated circuits to be wired to each other, by forming independent superconductive integrated circuits on the same substrate, and effecting connection between these integrated circuits by means of superconductive film wirings formed on the substrate. CONSTITUTION:Wirings 2, 3 are arrayed in a lattice by employing one or two superconductive layers which are the same as those used in the integrated circuits. In the case of two or more layers, the wirings are insulated from each other through an interlayer insulating film 10. As a material for the superconductive wiring, Nb or a superconductive material which contains Nb as a principal component, such as Nb3Sn, may be employed. At the intersections in the lattice wiring array, the wirings 2, 3, which need to be connected to each other, are connected by an alloy film 4 containing Pb as a principal components. In the case where the wirings 2, 3 are connected at two positions at an intersection, a Pb alloy 9 as a first layer is first formed to connect the wirings 3, and the interlayer insulating film 10 is formed, and then, a Pb alloy film 11 as a second layer is formed.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a calculation circuit that utilizes superconductivity, and in particular to a mounting method and method for integrated circuits suitable for high-density packaging of integrated circuits. It relates to wiring methods between integrated circuits.

[Background of the invention]

Regarding the conventional mounting method of superconducting integrated circuit chips, an integrated circuit chip cut to predetermined dimensions is mounted on a chip carrier, and electrical connections between the chip and the chip carrier are made using a thick film of superconducting Pb alloy. CH, C, Jones and D, J, H.
errell, I BM J.

of Res, and Dcv, Vol, 2
4. P 172+1980), the problem with this superconducting circuit mounting method is the reliability of the connection at the pad portion. In highly integrated logic circuits of hundreds to thousands of games, approximately 100 pads are required per chip. In such a wiring connection method, it is extremely difficult to electrically connect a large number of pads without defects. Furthermore, in this connection method,
One impedance mismatch problem at the connection,
Moreover, the overall high density! , there are constraints on IS integration.

[Purpose of the invention]

The present invention relates to mounting technology for superconducting integrated circuits, and provides a method for interconnecting high-density integrated circuits and providing a highly reliable connection between integrated circuits.

[Summary of the invention]

In the present invention, regarding a method for connecting superconducting integrated circuits, each independent integrated circuit is formed on the same substrate, and connections between these integrated circuits are made by superconducting film wiring formed on the substrate. The method uses 15 or 2 superconducting layers, which are the same as those used in integrated circuits, and is arranged in a grid pattern.

In the case of two or more layers, the wirings are insulated from each other via an interlayer insulating film. The material for superconducting wiring is Nb or Nb3Sn
A superconducting material containing Nb as a main component. Wiring connections at the intersections of the grid-like wiring arrays are performed as follows. In other words, interconnects that require connection are connected by an alloy film containing Pb as a main component. If there are two interconnections to be connected at the intersection, an interlayer insulating film is formed after the first WI Pb alloy connection, and from above, the 25th Pb alloy is connected.
b Connection is made by forming an alloy film.

[Embodiments of the invention]

Hereinafter, the present invention will be explained in detail with reference to Examples. The superconducting circuit uses a Josephson junction as a switching element and performs a switching operation by directly injecting current into the gate.The logic circuit is a so-called current injection direct coupling circuit as a basic gate. The type of circuit was a chain circuit in which directly coupled logic gates were arranged in series. The area occupied by one circuit was 2.51 squares. The area of one circuit is 100 μm x 100 around the periphery, same as conventional circuit chips.
It is determined by arranging pad electrodes having an area of μm. The wiring within the circuit is formed by two layers of superconducting films, and at the same time two-dimensional wiring is provided in a lattice pattern between the circuits. The ends of the wires in one direction are connected to circuit pads. On a 2-inch silicon wafer, the circuits containing one chain circuit for 1.0 stages of logic gates are lined up. There are 2 lines parallel to the pad rows between these circuits. It's a book. The superconducting circuit is composed of a ground plane film that also serves as a magnetic shield, a resistive film, two superconducting wiring films, a Josephson junction, and an interlayer insulating film.

The same superconducting layer as the wiring is used for the superconducting film forming the electrode of the Josephson junction. The ground plane film is Nb
The resistive film is an MO film, the lower electrode film of the Josephson junction is a Nb film, and the upper fI! The pole film was a Pb-In alloy film, and the interlayer insulating film was a SiO film. Once each integrated circuit is completed,
There is a wiring grid that intersects between the circuits, but this wiring grid is therefore
b1 is vague.

In order to match the impedance, a ground plane film is also laid in the wiring area between the circuits.
iOl14. Adjacent chain circuits were connected in series to form 40 stages of chain circuits on one wafer, and this was done in the following manner. As shown in FIG. 1, a rectangular window 1 is opened in the interlayer insulating film at the intersection of the wiring lines. Insert a portion of each part m2゜3 into the window, but keep it within a range where they do not touch each other. Next, through a resist film pattern formation process, a Pb-In film formation process, and a lift-off process, a connecting film 4 between wirings as shown in FIG. 1 is formed.
form. Through this kind of process.

As shown in FIG. 2, the series connection between the direct-coupled chain circuits 5 was completed by using the wires 2 and 3 and the wire connection 6. In the figure, an input signal is input through a wiring 7, and an output signal is taken out through a wiring 8.

Note that this was not necessary in this circuit connection.

In orthogonal wiring rows, the wiring of each sheep may be connected in a straight line, and these wirings may need to be insulated. This binding was done as follows. Third
As shown in the figure, an interlayer insulating film is formed. The film pattern was formed using the riff 1-off method and J2. Next, the Pb.In superconducting film 9 is covered with a SiO insulating film 10. The formation of the high-rise film pattern was also carried out by the lift-off method. Next, the upper superconducting film 2 was also connected using the Pb.In alloy film 11. [Effects of the Invention] As explained above, in the present invention, a large number of circuits are arrayed on one wafer, and these This method provides a method for wiring and connecting circuits, and this method produces the following effects.

(1) Production of chip pieces, production of chip carriers, and
Since the process of mounting the chip onto the chip carrier is not necessary, the process for the entire circuit system can be shortened.

(2) Since all wiring is done on one wafer, defects in wiring and connections can be reduced.

(3) By removing the connection portion by etching and using a necessary connection mask, it is possible to change the connection.

(4) Different types of crystals such as memory circuits, arithmetic circuits, etc.
By forming it on the web, it is possible to implant a calculation circuit having a set of functions.

[Brief explanation of drawings]

Fig. 1 is a plan view showing the connection parts in the circuit wiring, Fig. 2 is an overall view of four circuits interconnected, and Fig. 9 is a plan view showing the mutually orthogonal connection parts in the circuit wiring. . 1...Window, 2,3...Wiring, 4...Connection film, Crane 5...Direct-type chain circuit, 9...Superconducting film. 10...Insulating film.

Claims (1)

[Claims] 1) In a superconducting integrated circuit composed of superconducting elements, superconducting wiring, etc., individual independent integrated circuits are formed on the same substrate, and connections between these integrated circuits are formed on the substrate. 1. A method for connecting a superconducting circuit, characterized in that a calculation circuit having a predetermined function is constructed on a single substrate by using a superconducting film made of a superconducting film. 2) In the method for connecting a superconducting circuit according to claim 1, the circuits are connected at right angles to each other at the same time as the circuit forming step,
A method for connecting a superconducting circuit, characterized in that wiring grid rows separated by an interlayer insulating film are formed, and after the circuit is formed, connections between the circuits are made by connecting intersections of the wiring grid rows with a superconducting film. 3) In the method for connecting a superconducting circuit according to claim 2, the wiring grid rows are made of a Nb film or a superconducting compound or superconducting alloy film containing Nb as a main component, and the connections between the wiring grids are made of Pb as a main component. A method for connecting a superconducting circuit characterized by using an alloy film as a component.