JPS6135525A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6135525A
JPS6135525A JP59157017A JP15701784A JPS6135525A JP S6135525 A JPS6135525 A JP S6135525A JP 59157017 A JP59157017 A JP 59157017A JP 15701784 A JP15701784 A JP 15701784A JP S6135525 A JPS6135525 A JP S6135525A
Authority
JP
Japan
Prior art keywords
sio2 film
gas
hydrogen
levels
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59157017A
Other languages
Japanese (ja)
Inventor
Seiichi Iwamatsu
誠一 岩松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP59157017A priority Critical patent/JPS6135525A/en
Publication of JPS6135525A publication Critical patent/JPS6135525A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate

Abstract

PURPOSE:To reduce the level within SiO2 film by annealing at a high temperature an oxide film on Si substrate under the ambient where hydrogen gas is included to hydrogen gas or argon gas. CONSTITUTION:A wafer forming SiO2 film on Si is placed under the argon gas ambient including hydrogen gas and is subjectd to the annealing process at 1,000 deg.C. Thereby, the levels in the SiO2 film is filled with hydrogen atom, reducing the level density. Moreover, a wafer forming SiO2 film on Si is placed under the ambient where hydrogen gas is included to the nitrogen gas and is subjected to the annealing process at 1,000 deg.C. Thereby, the levels in the SiO2 film are fillted with nitrogen atom, reducing the level density. In this case, the hydrogen causes the nitrogen atom to effectively penetrate into the SiO2 film and buries a part of levels.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は半導体装置の製造方法に係り、Si半導体装置
のそのアニール処理方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of annealing a Si semiconductor device.

〔従来技術〕[Prior art]

従来、Si半導体装置の製造方法における5l−3in
、系のアニール処理方法としては、4F・0℃での水素
アニールあるいは1000℃程度の窒素アニールにより
界面準位密度が減少できることは公知であった。
Conventionally, 5l-3in in the manufacturing method of Si semiconductor device
As an annealing treatment method for the system, it has been known that the interface state density can be reduced by hydrogen annealing at 4F/0°C or nitrogen annealing at about 1000°C.

しかし、上記従来技術によると5i−8in。However, according to the above prior art, the size is 5i-8in.

界面準位密度の減少は計れても、Si上のS10゜膜内
に形成される準位の減少には有効に作用しないことがあ
った。
Even if it was possible to reduce the interface state density, it sometimes did not effectively reduce the levels formed in the S10° film on Si.

〔目的〕〔the purpose〕

本発明は、かかる従来技術の欠点をなくし、5i−8i
O,系の810.膜内の準位を減少うせる方法を提供す
ることを目的とする。
The present invention eliminates the drawbacks of the prior art and provides a 5i-8i
O, system 810. The object of the present invention is to provide a method for reducing the levels within a film.

〔実施例〕〔Example〕

以下、実施例により本発明を詳述する。 Hereinafter, the present invention will be explained in detail with reference to Examples.

いま、1%水素ガスを含有するアルゴン、ガス雰囲気中
にSi上にSin、膜を形成したウェーハを挿入し、1
000℃にて30分のアニール処理を施すと、Sin、
膜中の準位部を水素原子が埋め、準位密度を減少させる
ことができる。
Now, a wafer with a Si film formed on Si is inserted into an argon gas atmosphere containing 1% hydrogen gas.
After annealing at 000°C for 30 minutes, Sin,
Hydrogen atoms fill the level portions in the film, making it possible to reduce the level density.

更に、窒素ガス中に水素ガスを1%程度含有させた雰囲
気中にSi上にSin、膜を形成したウェーハを挿入し
、1000℃にて60分のアニール処理を施すと、Si
n、膜中の準位部を窒素原子が埋め、準位密度を減少さ
せることができる。
Furthermore, when a wafer with a Si film formed on Si is inserted into an atmosphere containing about 1% hydrogen gas in nitrogen gas and annealed at 1000°C for 60 minutes, Si
n.Nitrogen atoms fill the level portions in the film, making it possible to reduce the level density.

この場合木葉は窒素原子をSin、膜中に効率よく侵入
させる働きをすると共に、準位の一部を埋める働きもす
る。
In this case, the leaves function to efficiently infiltrate nitrogen atoms into the Sin film, and also function to fill part of the levels.

〔効果〕〔effect〕

上記の如く、水素原子あるいは窒素原子を810、膜中
の準位を埋めさせる処理として、高温での水素アニール
あるいは窒素ガスと水素ガスを含有せる雰囲気でのアニ
ールを施すと、Sin。
As mentioned above, when hydrogen atoms or nitrogen atoms are added to 810 and hydrogen annealing at high temperature or annealing in an atmosphere containing nitrogen gas and hydrogen gas is performed as a treatment for filling the levels in the film, the film becomes Sin.

膜内準位密度が減少し、例えばフローティング・ゲー)
MOS型半導体記憶装置の記憶保持時間の延長や書き込
み回数の増大を計ることができる効果がある。
The level density in the membrane decreases, e.g. floating gate)
This has the effect of extending the memory retention time of the MOS type semiconductor memory device and increasing the number of writes.

Claims (2)

【特許請求の範囲】[Claims] (1)Si基板上のシリコン酸化膜を水素ガスまたはア
ルゴン、ガス中に水素ガスを含有させた雰囲気中で80
0℃以上1000℃程度でアニールする事を特徴とする
半導体装置の製造方法。
(1) The silicon oxide film on the Si substrate was heated to 80°C in an atmosphere containing hydrogen gas or argon gas.
A method for manufacturing a semiconductor device characterized by annealing at a temperature of 0°C or higher and about 1000°C.
(2)Si基板上のシリコン酸化膜を窒素ガス中に水素
ガスを含有させた雰囲気中で800℃以上1000℃程
度でアニールする事を特徴とする半導体装置の製造方法
(2) A method for manufacturing a semiconductor device, which comprises annealing a silicon oxide film on a Si substrate at a temperature of 800° C. or higher and about 1000° C. in an atmosphere containing hydrogen gas in nitrogen gas.
JP59157017A 1984-07-27 1984-07-27 Manufacture of semiconductor device Pending JPS6135525A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59157017A JPS6135525A (en) 1984-07-27 1984-07-27 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59157017A JPS6135525A (en) 1984-07-27 1984-07-27 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6135525A true JPS6135525A (en) 1986-02-20

Family

ID=15640358

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59157017A Pending JPS6135525A (en) 1984-07-27 1984-07-27 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6135525A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62239548A (en) * 1986-04-10 1987-10-20 Seiko Epson Corp Manufacture of semiconductor device
US5543336A (en) * 1993-11-30 1996-08-06 Hitachi, Ltd. Removing damage caused by plasma etching and high energy implantation using hydrogen
JP2004152920A (en) * 2002-10-30 2004-05-27 Fujitsu Ltd Method of manufacturing semiconductor device and method of managing semiconductor manufacturing process

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62239548A (en) * 1986-04-10 1987-10-20 Seiko Epson Corp Manufacture of semiconductor device
US5543336A (en) * 1993-11-30 1996-08-06 Hitachi, Ltd. Removing damage caused by plasma etching and high energy implantation using hydrogen
JP2004152920A (en) * 2002-10-30 2004-05-27 Fujitsu Ltd Method of manufacturing semiconductor device and method of managing semiconductor manufacturing process

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