JPS6130224B2 - - Google Patents

Info

Publication number
JPS6130224B2
JPS6130224B2 JP9640576A JP9640576A JPS6130224B2 JP S6130224 B2 JPS6130224 B2 JP S6130224B2 JP 9640576 A JP9640576 A JP 9640576A JP 9640576 A JP9640576 A JP 9640576A JP S6130224 B2 JPS6130224 B2 JP S6130224B2
Authority
JP
Japan
Prior art keywords
pulse
circuit
drive
output
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP9640576A
Other languages
Japanese (ja)
Other versions
JPS5321966A (en
Inventor
Akio Nakajima
Tadayasu Machida
Kenji Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP9640576A priority Critical patent/JPS5321966A/en
Priority to US05/821,433 priority patent/US4158287A/en
Priority to GB32986/77A priority patent/GB1580580A/en
Publication of JPS5321966A publication Critical patent/JPS5321966A/en
Priority to HK347/82A priority patent/HK34782A/en
Priority to SG393/83A priority patent/SG39383G/en
Priority to MY296/84A priority patent/MY8400296A/en
Publication of JPS6130224B2 publication Critical patent/JPS6130224B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G04HOROLOGY
    • G04CELECTROMECHANICAL CLOCKS OR WATCHES
    • G04C3/00Electromechanical clocks or watches independent of other time-pieces and in which the movement is maintained by electric means
    • G04C3/14Electromechanical clocks or watches independent of other time-pieces and in which the movement is maintained by electric means incorporating a stepping motor
    • G04C3/143Means to reduce power consumption by reducing pulse width or amplitude and related problems, e.g. detection of unwanted or missing step

Description

【発明の詳細な説明】 本発明は電子時計に関し、特にその電気機械変
換機であるパルスモーターの駆動方式に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic timepiece, and more particularly to a drive system for a pulse motor, which is an electromechanical converter thereof.

電子時計用として使用されている電気機械変換
機には、水晶発振器からの分周信号により強制駆
動されるテンプ及び1ステツプづつ定方向に回転
するパルスモーター等が実用化されている。
BACKGROUND ART Electromechanical converters used in electronic watches include a balance that is forcibly driven by a frequency-divided signal from a crystal oscillator, a pulse motor that rotates one step at a time in a fixed direction, and the like.

一般に腕時計に用いられる電気機械変換機は衝
撃負荷に対する安定度が問題となるが一相パルス
によるテンプの駆動方式については耐衝撃性を向
上させるために、駆動コイルの誘起電圧により駆
動パルスのパルス巾を制御する方式が提案されて
おり一部実用化されている。
Generally, electromechanical transducers used in wristwatches have a problem with stability against shock loads. However, in order to improve the shock resistance of the balance drive system using single-phase pulses, the pulse width of the drive pulse is increased by the induced voltage in the drive coil. Methods for controlling this have been proposed and some have been put into practical use.

しかるに一相駆動方式の場合、テンプの場合は
往復運動のうちの片側のみに駆動パルスが印加さ
れるだけであるため、衝撃的にパルス巾が広くな
つても誤動作を起しやすく、多相パルスモーター
の場合は構造上多極化されて1ステツプの回転角
度が小さくなるため誘起電圧が小さくなり充分な
制御作用が行なうことができず安定度はあまり良
くなかつた。これらの観点から最大限パルス巾を
拡げたパルスを供給して安定度を得ているため消
費電力も大きくなる欠点を有していた。
However, in the case of a single-phase drive system, in the case of a balance wheel, the drive pulse is only applied to one side of the reciprocating motion, so even if the pulse width becomes shockingly wide, malfunctions are likely to occur, and multi-phase pulses In the case of a motor, the motor has a multipolar structure and the rotation angle of one step becomes small, so the induced voltage becomes small and a sufficient control action cannot be performed, resulting in poor stability. From these points of view, stability is obtained by supplying pulses with the maximum pulse width, which has the disadvantage of increasing power consumption.

本発明は上述の欠点のない耐衝撃性の良い高安
定な変換機の駆動回路を提供するものである。
The present invention provides a highly stable converter drive circuit with good shock resistance and without the above-mentioned drawbacks.

本発明は二相の駆動パルスによつて駆動される
電気機械変換機の駆動パルスのパルス巾が駆動コ
イルの誘起電圧によつてステツプ状に制御される
ことを特徴とする高安定な時計用電気機械変換機
の駆動回路を提供することを目的とする。
The present invention provides a highly stable electric watch characterized in that the pulse width of the drive pulse of an electromechanical converter driven by two-phase drive pulses is controlled in a stepwise manner by the induced voltage of the drive coil. The purpose of this invention is to provide a drive circuit for a mechanical converter.

本発明はまた駆動コイルの一端を入力とするイ
ンバーター、及び他の一端を入力とするインバー
ターを有することを特徴とする時計用電気機械変
換機駆動回路を提供することを目的とする。
Another object of the present invention is to provide an electromechanical converter drive circuit for a watch, which is characterized by having an inverter having one end of the drive coil as an input, and an inverter having the other end as an input.

以下実施例について説明する。 Examples will be described below.

第1図a及びbは電気機械変換機の一実施例
で、101はテンワ、102は磁石、103,1
04は駆動コイル、105はヒゲゼンマイ、a,
bは駆動コイル端子であり、a,bに印加される
二相のパルス電圧による電流のため駆動コイルに
発生する磁場によつてテンワに固着された磁石が
力を受けヒゲゼンマイとテンワよりなるテンプは
往復運動を行う。第2図は電気機械変換機の他の
一実施例で、106は少なくとも2極の磁極を有
する磁石よりなる回転子、107,108は磁性
材よりなる固定子、109は駆動コイル、a,b
は駆動コイル端子であり、a,bに印加される二
相のパルス電圧による電流のため駆動コイルに発
生する磁束を固定子に導いて回転子を定方向にス
テツプ状に回転させるパルスモーターである。
Figures 1a and 1b show an embodiment of an electromechanical converter, in which 101 is a balance wheel, 102 is a magnet, 103, 1
04 is a drive coil, 105 is a balance spring, a,
b is a drive coil terminal, and the magnet fixed to the balance wheel receives a force due to the magnetic field generated in the drive coil due to the current caused by the two-phase pulse voltage applied to a and b, and the balance consisting of the hairspring and balance wheel is performs a reciprocating motion. FIG. 2 shows another embodiment of the electromechanical converter, in which 106 is a rotor made of a magnet having at least two magnetic poles, 107 and 108 are stators made of magnetic material, and 109 is a driving coil, a, b.
is a drive coil terminal, and it is a pulse motor that rotates the rotor in a fixed direction in a step manner by guiding the magnetic flux generated in the drive coil to the stator due to the current caused by the two-phase pulse voltage applied to a and b. .

第3図は本発明の電子時計の一実施例で、20
1は水晶発振回路、202は分周回路、203は
パルス選択回路206、パルス変換回路207、
制御回路208を含むパルス巾切換回路、204
は駆動回路、205は検出回路209、復帰手段
210を含む検出記憶回路である。
FIG. 3 shows an embodiment of the electronic watch of the present invention, with 20
1 is a crystal oscillation circuit, 202 is a frequency dividing circuit, 203 is a pulse selection circuit 206, a pulse conversion circuit 207,
Pulse width switching circuit 204 including control circuit 208
205 is a detection storage circuit including a detection circuit 209 and a recovery means 210.

第4図は駆動コイルの状態説明図、第5図、第
6図は電気機械変換機としてテンプを用いた場合
の各部の波形図であり、第5図は定常時、第6図
は衝撃時の状態を示す。第7図、第8図は電気機
械変換機としてパルスモーターを用いた場合の各
部の波形図であり、第7図は定常時、第8図は衝
撃時の状態を示す。
Figure 4 is an explanatory diagram of the state of the drive coil, Figures 5 and 6 are waveform diagrams of various parts when a balance wheel is used as an electromechanical converter, Figure 5 is at steady state, and Figure 6 is at impact. Indicates the status of 7 and 8 are waveform diagrams of various parts when a pulse motor is used as an electromechanical converter, with FIG. 7 showing a steady state and FIG. 8 showing a state at an impact.

第3図に於て分周回路202のフリツプフロツ
プ(以下FFと称する)117,FF118の出力
はパルス選択回路206の切換回路124,12
5の各入力となつており、定常時はFF117の
出力がパルス変換回路207のFF120,12
1のリセツト端子に印加されて各出力F1,F2
は短かいパルス巾のパルスφ,φが交互に発
生する。F1はリセツト、セツトフリツプフロツ
プ126(以下RS−FFと称する)のR4端子、復
帰手段210を構成するRS−FF127のS6
子、F2は前記RS−FF126のS4端子、復帰手段
210であるRS−FF128のS5端子に接続され
ている。パルス変換回路207のFF120の他
の出力は制御回路208のFF123の入力
及び駆動回路204のPチヤンネルMOSトラン
ジスタ133(以下P−Ch MOSトランジスタ
と称する)、FF121の他の出力はFF12
3の他の入力及びP−Ch MOSトランジスタ1
35の各ゲートに接続され、FF123の出力F3
はNチヤンネルMOSトランジスタ136、(以下
N−Ch MOSトランジスタと称する)はN
−Ch MOSトランジスタ134の各ゲートに接
続されている。駆動コイル137はMOSトラン
ジスタの共通ドレインa,b間に接続され、a端
子は検出回路209の誘起電圧検出インバーター
130、b端子は誘起電圧検出インバーター12
9の各入力ゲートに接続され、インバーター12
9出力はゲート回路131を介して前記復帰手段
210のFF127のR6端子、インバーター13
0出力はゲート回路132を介してFF128の
R5端子に接続されている。前記FF127出力F6
はパルス選択回路206の切換回路125、FF
128出力F5は切換回路124の各入力に接続
されている。
In FIG. 3, the outputs of flip-flops (hereinafter referred to as FF) 117 and FF 118 of the frequency dividing circuit 202 are connected to the switching circuits 124 and 12 of the pulse selection circuit 206.
During normal operation, the output of FF117 is input to FF120, 12 of pulse conversion circuit 207.
Short pulse width pulses φ 1 and φ 2 are alternately generated at the respective outputs F 1 and F 2 . F1 is the reset, R4 terminal of the set flip-flop 126 (hereinafter referred to as RS-FF), S6 terminal of the RS-FF127 constituting the return means 210, F2 is the S4 terminal of the RS-FF126, It is connected to the S 5 terminal of the RS-FF 128, which is the return means 210. The other output 1 of the FF 120 of the pulse conversion circuit 207 is the input of the FF 123 of the control circuit 208 and the P channel MOS transistor 133 (hereinafter referred to as P-Ch MOS transistor) of the drive circuit 204, and the other output 2 of the FF 121 is the FF 12
3 other inputs and P-Ch MOS transistor 1
35, and the output F 3 of FF123
is N-channel MOS transistor 136 (hereinafter referred to as N-Ch MOS transistor) 3 is N
-Ch Connected to each gate of the MOS transistor 134. The drive coil 137 is connected between the common drains a and b of the MOS transistors, the a terminal is connected to the induced voltage detection inverter 130 of the detection circuit 209, and the b terminal is connected to the induced voltage detection inverter 12.
9 and connected to each input gate of the inverter 12.
9 output is connected to the R 6 terminal of the FF 127 of the return means 210 via the gate circuit 131 and the inverter 13.
The 0 output is sent to the FF128 via the gate circuit 132.
Connected to R5 terminal. Said FF127 output F6
is the switching circuit 125 of the pulse selection circuit 206, FF
128 output F 5 is connected to each input of switching circuit 124 .

まずテンプの場合を考えてみると第5図に於て
まずt=t1でφパルスが発生しP−Ch MOSト
ランジスタ133はオンとなる。このときF3
1であるからN−Ch MOSトランジスタ136
はオンであり、駆動回路は第4図1の状態とな
り、a端子に駆動電圧が印加されa→bに電流が
流れテンプは駆動力を受ける。一方、φパルス
は復帰手段210のFF127のセツト端子S6
印加されてFF出力は=1に復帰する。t=t2
でパルスが切れるとF3=0、=1となりP
−Ch MOSトランジスタ133N−Ch MOSト
ランジスタ136はオフ、134はオンとなり、
第4図2のようになる。a端子はトランジスタ1
34を介して接地され第5図aの如くになるた
め、検出回路209の誘起電圧検出用インバータ
ー130は動作しない。一方b端子はφパルス
印加時は接地されているが、パルスが切れた直後
に接地が解除され誘起電圧がインバーター129
に印加され、t=t3〜t4で誘起電圧が、インバー
ターのしきい値電圧以上となりゲート回路131
の出力dが発生する。ゲート回路131,132
は前記検出回路209の誘起電圧検出インバータ
ー129,130が検出する駆動パルスを除いて
誘起電圧のみを復帰手段210のFF127,1
28のリセツト入力とするためのものである。
First, considering the case of a balance wheel, in FIG. 5, a φ1 pulse is generated at t= t1 , and the P-Ch MOS transistor 133 is turned on. At this time F 3 =
1, so N-Ch MOS transistor 136
is on, the drive circuit is in the state shown in FIG. 4, a drive voltage is applied to the a terminal, a current flows from a to b, and the balance receives a drive force. On the other hand, the φ1 pulse is applied to the set terminal S6 of the FF 127 of the return means 210, and the FF output returns to =1. t= t2
When the pulse is cut off, F 3 = 0, 3 = 1, and P
-Ch MOS transistor 133N-Ch MOS transistor 136 is turned off, 134 is turned on,
It will look like Figure 4 2. A terminal is transistor 1
34, as shown in FIG. 5a, the induced voltage detection inverter 130 of the detection circuit 209 does not operate. On the other hand, the b terminal is grounded when the φ 1 pulse is applied, but it is ungrounded immediately after the pulse ends, and the induced voltage is transferred to the inverter 129.
The induced voltage becomes higher than the threshold voltage of the inverter at t= t3 to t4 , and the gate circuit 131
An output d is generated. Gate circuits 131, 132
The FFs 127 and 1 of the recovery means 210 detect only the induced voltage, excluding the drive pulses detected by the induced voltage detection inverters 129 and 130 of the detection circuit 209.
This is used as a reset input for 28.

この出力dは、復帰手段210のFF127の
リセツト端子R6に印加され、FF127出力=
0となる。従つてパルス選択回路206の選択ゲ
ート125出力はFF118の出力となるから、
次のφパルスもφパルスと同じ短いパルス巾
のパルスとなる。
This output d is applied to the reset terminal R6 of the FF127 of the recovery means 210, and the FF127 output=
It becomes 0. Therefore, since the selection gate 125 output of the pulse selection circuit 206 becomes the output of the FF 118,
The next φ 2 pulse also has the same short pulse width as the φ 1 pulse.

次にt=t5でφパルスが発生し、P−Ch
MOSトランジスタ135はオンとなる。N−Ch
MOSトランジスタ134はオンのままであるか
ら、駆動回路204は第4図3の状態となり、b
端子に駆動電圧が印加され、b→aに電流が流
れ、テンプは前とは逆方向に駆動力を受ける。一
方φパルスは、復帰手段210のFF128の
セツト端子S5に印加されてFF出力はe=1に復
帰する。t=t6でパルスが切れるとF3=1、
=0となり、P−Ch MOSトランジスタ134
はオフ、136はオンとなり、第4図4のように
なる。b端子はトランジスタ136を介して接地
され、第5図bの如くになるため、誘起電圧検出
インバーター129は動作しない。一方a端子は
φパルス印加時は接地されているが、パルスが切
れた直後に接地が解除され誘起電圧がインバータ
ー130に印加され、t=t7〜t8で誘起電圧がイ
ンバーターのしきい値電圧以上となり、ゲート回
路出力Cが発生する。FF128はCでリセツト
されてe=0となり切換回路124出力はFF1
17出力となり、次のφは短いパルス巾のパル
スとなりまたFF127はφでセツト、dでリ
セツトされて=0となり切換回路125出力は
FF117出力となり、さらに次のφは短いパ
ルス巾のパルスとなつている。
Next, at t=t 5 , a φ 2 pulse is generated, and P-Ch
MOS transistor 135 is turned on. N-Ch
Since the MOS transistor 134 remains on, the drive circuit 204 is in the state shown in FIG.
A driving voltage is applied to the terminal, a current flows from b to a, and the balance receives a driving force in the opposite direction. On the other hand, the φ2 pulse is applied to the set terminal S5 of the FF 128 of the return means 210, and the FF output returns to e=1. When the pulse ends at t=t 6 , F 3 = 1, 3
= 0, P-Ch MOS transistor 134
is off and 136 is on, as shown in FIG. Since the b terminal is grounded through the transistor 136, as shown in FIG. 5b, the induced voltage detection inverter 129 does not operate. On the other hand, the a terminal is grounded when the φ pulse is applied, but immediately after the pulse ends, the grounding is released and an induced voltage is applied to the inverter 130, and at t= t7 to t8 , the induced voltage reaches the threshold of the inverter. The voltage exceeds the voltage, and gate circuit output C is generated. FF128 is reset by C and e=0, and the switching circuit 124 output becomes FF1.
17 output, and the next φ 1 becomes a short pulse width pulse, and FF127 is set at φ 1 , reset at d, and becomes = 0, and the output of the switching circuit 125 becomes
The output is FF117, and the next φ2 is a pulse with a short pulse width.

次に衝撃負荷を受けた場合第6図の如くにな
る。すなわち、FF127出力はφで1にセ
ツトされるが、誘起電圧が減少してしきい値電圧
以下となりリセツトパルスが発生しないため=
1のままであり、切換回路125が切換りFF1
21のR2端子にはFF118出力が印加され、φ
は2倍のパルス巾(t13〜t14)となる。さらに
FF128はφにより1にセツトされるがリセ
ツトパルスが発生しないためe=1のままであ
り、切換回路124が切換りFF120のR1端子
にはFF118出力が印加され、次のφは2倍
のパルス巾(t15〜t16)となる。パルス巾が2倍と
なり駆動力が増加して誘起電圧が前の状態にもど
るとt=t17〜t18でdにリセツトパルスが発生
し、=0となり、次のφは前の状態にもど
り、さらにφパルスも前の状態にもどる。
Next, when an impact load is applied, the result will be as shown in FIG. In other words, the FF127 output is set to 1 at φ 1 , but the induced voltage decreases and becomes below the threshold voltage, so no reset pulse is generated =
remains at FF1, and the switching circuit 125 switches to FF1.
The FF118 output is applied to the R2 terminal of 21, and φ
2 is twice the pulse width (t 13 to t 14 ). moreover
FF128 is set to 1 by φ2 , but since a reset pulse is not generated, e=1 remains, the switching circuit 124 switches, and the FF118 output is applied to the R1 terminal of FF120, and the next φ1 is set to 2. The pulse width (t 15 to t 16 ) is doubled. When the pulse width doubles, the driving force increases, and the induced voltage returns to the previous state, a reset pulse is generated at d at t = t 17 to t 18 , which becomes = 0, and the next φ 2 returns to the previous state. Then, the φ1 pulse also returns to the previous state.

次にパルスモーターの場合を考えてみる。誘起
電圧波形がいく分異なるのみで他はほとんどテン
プの場合と同じであるが、第7図に於てt=t31
でφパルスが発生し、駆動コイルのa端子に駆
動電圧が印加されa→bに電流が流れ固定子10
7,108は励磁され、回転子106は右方向に
180゜回転し一定時間自由減衰振動して停止す
る。一方、φパルスは、復帰手段210のFF
127のセツト端子S6に印加されてFF出力は
=1に復帰する。φが切れた直後にa端子は接
地され、b端子は接地解除され、回転子の自由減
衰振動にともなう誘起電圧が検出回路209の検
出インバーター129に印加され、t=t33〜t34
で誘起電圧が、検出インバーターのしきい値電圧
以上となりゲート回路出力dが発生する。FF1
27出力は0にリセツトされ次のφは短かい
パルス巾となる。回転子はt=t35でほゞ静止安
定する。次にt=t36でφパルスが発生し、駆
動コイルのb端子に駆動電圧が印加されb→aに
電流が流れ前と逆励磁されて同方向に180゜回転
する。一方、φパルスは復帰手段210のFF
128のセツト端子S5に印加されてFF出力はe
=1に復帰する。t=t37でパルスが切れるとb
端子は接地され、a端子は接地解除され、誘起電
圧が検出インバーター130に印加され、t=
t38〜t39で誘起電圧が検出インバーターのしきい
値電圧以上となり、ゲート回路出力cが発生す
る。FF128はcでリセツトされてe=0とな
り切換回路124出力はFF117出力となり次
のφは短いパルス巾のパルスとなり、FF12
7はφでセツト、dでリセツトされて=0と
なり切換回路125出力はFF117出力とな
り、次のφは短いパルス巾のパルスとなつてい
る。
Next, consider the case of a pulse motor. The induced voltage waveform is slightly different, and everything else is almost the same as in the case of the balance wheel, but in Fig. 7, t=t 31
A φ1 pulse is generated, a driving voltage is applied to the a terminal of the driving coil, and a current flows from a to b, and the stator 10
7 and 108 are excited, and the rotor 106 moves to the right.
It rotates 180°, oscillates with free damping for a certain period of time, and then stops. On the other hand, the φ1 pulse is the FF of the return means 210.
127's set terminal S6 , the FF output returns to =1. Immediately after φ1 is disconnected, the a terminal is grounded, the b terminal is ungrounded, and the induced voltage accompanying the free damping vibration of the rotor is applied to the detection inverter 129 of the detection circuit 209, and t=t 33 to t 34
At this point, the induced voltage exceeds the threshold voltage of the detection inverter, and gate circuit output d is generated. FF1
The 27 output is reset to 0 and the next φ2 has a short pulse width. The rotor becomes almost stationary and stable at t=t 35 . Next, at t=t 36 , a φ 2 pulse is generated, a driving voltage is applied to the b terminal of the driving coil, and a current flows from b to a, and the coil is reversely excited and rotated 180° in the same direction. On the other hand, the φ2 pulse is the FF of the return means 210.
It is applied to the set terminal S5 of 128, and the FF output is e.
= returns to 1. When the pulse breaks at t=t 37 , b
The terminal is grounded, the a terminal is ungrounded, the induced voltage is applied to the detection inverter 130, and t=
From t38 to t39 , the induced voltage becomes equal to or higher than the threshold voltage of the detection inverter, and the gate circuit output c is generated. FF128 is reset at c, e=0, and the switching circuit 124 output becomes the FF117 output, and the next φ1 becomes a pulse with a short pulse width, and the FF12
7 is set at φ1 , reset at d, becomes 0, and the output of the switching circuit 125 becomes the FF117 output, and the next φ2 becomes a pulse with a short pulse width.

次に衝撃負荷を受けた場合第8図の如く、FF
127出力はφで1にセツトされるが、誘起
電圧が減少して検出回路209の検出用インバー
ターのしきい値電圧以下となり、リセツトパルス
dが発生しなくなるため=1にセツトされたま
まとなり、切換回路125は切換りFF121の
R2端子にはFF118出力が印加され、φは2
倍のパルス巾(t43〜t44)となる。さらにFF12
8はφによりセツトされe=1となり、誘起電
圧が減少して検出用インバーター130のしきい
値電圧以下となつてリセツトパルスcが発生しな
くなるためe=1にセツトされたままとなり切換
回路124が切換りFF120のR1端子はFF11
8出力が印加されてφは2倍のパルス巾となり
駆動力が増加するため誤差動を防止できる。負荷
が0になれば誘起電圧は前の状態にもどりdにリ
セツトパルスが発生し、=0となりφパルス
は前の状態にもどり、φパルスも前の状態にも
どる。テンプの場合は駆動パルスの直前と直後に
誘起電圧が発生するためパルス巾制御にどちらを
用いても良いが、パルスモーターの場合は駆動パ
ルスの直後に誘起電圧が発生するのみであるため
この実施例が適している。
Next, when subjected to impact load, as shown in Figure 8, FF
The 127 output is set to 1 at φ 1 , but the induced voltage decreases to below the threshold voltage of the detection inverter of the detection circuit 209, and the reset pulse d is no longer generated, so it remains set to 1. , the switching circuit 125 is connected to the switching FF 121.
The FF118 output is applied to the R2 terminal, and φ2 is 2
The pulse width (t 43 to t 44 ) is doubled. Furthermore FF12
8 is set by φ2 and becomes e=1, and as the induced voltage decreases and becomes below the threshold voltage of the detection inverter 130 and the reset pulse c is no longer generated, e=1 remains set and the switching circuit changes. 124 is switched and the R 1 terminal of FF120 is FF11.
Since 8 outputs are applied, the pulse width of φ1 is doubled, and the driving force is increased, so that error movement can be prevented. When the load becomes 0, the induced voltage returns to the previous state and a reset pulse is generated at d, which becomes 0, the φ2 pulse returns to the previous state, and the φ1 pulse also returns to the previous state. In the case of a balance wheel, the induced voltage is generated just before and after the drive pulse, so either can be used for pulse width control, but in the case of a pulse motor, the induced voltage is only generated immediately after the drive pulse, so this method is not recommended. An example is appropriate.

本願の如く構成すれば、負荷の状態を検出する
のにパルスモータへの駆動パルス印加終了後の回
転子の自由減衰振動にともなつて駆動コイルに発
生する純粋に回転子の運動のみに関係する誘起電
圧だけを測定できるため検出精度が向上し、従来
困難とされていたパルスモータの負荷状態を適確
に検出できる。定常時は変換機の駆動に必要な最
少限のパルス巾5ミリsec以下の駆動パルスで駆
動し、衝撃負荷が加わつた時に5ミリsec以上の
パルス巾にすることにより、衝撃に打勝つ駆動力
を変換機に与えて誤動作を防止し、衝撃負荷がな
くなれば、又もとの5ミリsec以下のパルス巾に
することにより、平均消費電流1μA以下にする
ことが可能である。
If configured as in the present application, detecting the load state is purely related to the motion of the rotor that occurs in the drive coil due to the free damping vibration of the rotor after the application of drive pulses to the pulse motor ends. Since only the induced voltage can be measured, detection accuracy is improved, making it possible to accurately detect the load condition of a pulse motor, which was previously considered difficult. During normal operation, the converter is driven with a minimum pulse width of 5 milliseconds or less, and when an impact load is applied, the pulse width is increased to 5 milliseconds or more to provide driving force that overcomes shock. is applied to the converter to prevent malfunction, and if the shock load is eliminated, the average current consumption can be reduced to 1 μA or less by reducing the pulse width to the original 5 milliseconds or less.

また駆動コイルの誘起電圧をCMOSインバータ
ーで検出するため、特に変換機に検出コイルを設
けるとか、変換機に接続した輪列に接点又は半導
体を設けるとかの検出機構を必要とせず、駆動電
流検出ではないため増巾回路は不要であり、消費
電流は無視しうる。このため発振回路、分周回路
を含めた全消費電流を2μA以下とすることが可
能である。
In addition, since the induced voltage of the drive coil is detected by a CMOS inverter, there is no need for any detection mechanism such as installing a detection coil in the converter or providing contacts or semiconductors in the wheel train connected to the converter. Since there is no amplification circuit, the current consumption can be ignored. Therefore, it is possible to reduce the total current consumption including the oscillation circuit and the frequency dividing circuit to 2 μA or less.

本実施例では衝撃時に駆動パルス巾が定常時の
2倍になるように設定したが、ステツプ状に任意
のパルス巾に設定することも可能である。
In this embodiment, the drive pulse width is set to be twice as long as during normal operation when an impact occurs, but it is also possible to set the drive pulse width to an arbitrary pulse width in steps.

また本実施例では衝撃時の駆動パルス巾につい
て記述したが、例えばカレンダー表示駆動等のよ
うに負荷変動があつた場合にも適用できることは
自明である。
Further, in this embodiment, the driving pulse width at the time of impact has been described, but it is obvious that the invention can also be applied to cases where load fluctuation occurs, such as when driving a calendar display, for example.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図a及びbは電気機械変換機であるテンプ
の一実施例を示す平面図及び側面図、第2図は電
気機械変換機であるパルスモーターの一実施例を
示す平面図、第3図は本発明の電子時計の一実施
例を示す回路図、第4図は駆動コイルの状態説明
図、第5図、第6図は電気機械変換機としてテン
プを用いた場合の各部の波形図、第7図、第8図
はパルスモーターを用いた場合の各部の波形図で
ある。 101……テンワ、102……磁石、103,
104,109……駆動コイル、105……ヒゲ
ゼンマイ、106……回転子、107,108…
…固定子、201……発振回路、110……イン
バーター、111……水晶振動子、112……帰
還低抗、113,114……外付容量、202…
…分周回路、115……インバーター、116,
117,118,119……フリツプフロツプ、
203……パルス巾切換回路、206……パルス
選択回路、207……パルス変換回路、208…
…制御回路、124,125……切換回路、20
4……駆動回路、133,135……P−Ch
MOSトランジスタ、134,136……N−Ch
MOSトランジスタ、137……駆動コイル、2
05……検出記憶回路、209……検出回路、2
10……復帰回路、129,130……検出用イ
ンバーター、131,132……ゲート回路。
1A and 1B are a plan view and a side view showing an embodiment of a balance wheel which is an electromechanical converter, FIG. 2 is a plan view showing an embodiment of a pulse motor which is an electromechanical converter, and FIG. is a circuit diagram showing one embodiment of the electronic timepiece of the present invention, FIG. 4 is a state explanatory diagram of a drive coil, FIGS. 5 and 6 are waveform diagrams of various parts when a balance wheel is used as an electromechanical converter, FIGS. 7 and 8 are waveform diagrams of various parts when a pulse motor is used. 101... Balance wheel, 102... Magnet, 103,
104, 109... Drive coil, 105... Balance spring, 106... Rotor, 107, 108...
... Stator, 201 ... Oscillation circuit, 110 ... Inverter, 111 ... Crystal resonator, 112 ... Feedback resistor, 113, 114 ... External capacitor, 202 ...
...Frequency dividing circuit, 115...Inverter, 116,
117, 118, 119...flip flop,
203...Pulse width switching circuit, 206...Pulse selection circuit, 207...Pulse conversion circuit, 208...
...Control circuit, 124, 125...Switching circuit, 20
4...Drive circuit, 133, 135...P-Ch
MOS transistor, 134, 136...N-Ch
MOS transistor, 137... Drive coil, 2
05...Detection storage circuit, 209...Detection circuit, 2
10... Recovery circuit, 129, 130... Detection inverter, 131, 132... Gate circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 発振回路、分周回路、パルスモータ駆動回
路、駆動コイル及び回転子を含むパルスモータを
備えた電子時計に於いて、前記パルスモータへの
駆動パルス印加終了後の前記回転子の自由減衰振
動にともなつて前記駆動コイルに発生する誘起電
圧を検出する検出回路と駆動力の異なる複数の駆
動パルスを発生するパルス変換回路と、前記検出
回路によつて制御され、パルス変換回路の出力パ
ルスをパルスモータ駆動回路に選択供給するため
のパルス選択回路を具備したことを特徴とする電
子時計。
1. In an electronic watch equipped with a pulse motor including an oscillation circuit, a frequency dividing circuit, a pulse motor drive circuit, a drive coil, and a rotor, the free damping vibration of the rotor after the application of drive pulses to the pulse motor is completed. a detection circuit that detects the induced voltage generated in the drive coil; a pulse conversion circuit that generates a plurality of drive pulses with different driving forces; and a pulse conversion circuit that is controlled by the detection circuit to convert the output pulses of the pulse conversion circuit into pulses. An electronic timepiece characterized by comprising a pulse selection circuit for selectively supplying pulses to a motor drive circuit.
JP9640576A 1976-08-12 1976-08-12 Electric-mechanical converter driving circuit for timepiece Granted JPS5321966A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP9640576A JPS5321966A (en) 1976-08-12 1976-08-12 Electric-mechanical converter driving circuit for timepiece
US05/821,433 US4158287A (en) 1976-08-12 1977-08-03 Driver circuit for electro-mechanical transducer
GB32986/77A GB1580580A (en) 1976-08-12 1977-08-05 Electronic timepiece
HK347/82A HK34782A (en) 1976-08-12 1982-07-29 An electronic timepiece
SG393/83A SG39383G (en) 1976-08-12 1983-07-06 An electronic timepiece
MY296/84A MY8400296A (en) 1976-08-12 1984-12-30 An electronic timepiece

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9640576A JPS5321966A (en) 1976-08-12 1976-08-12 Electric-mechanical converter driving circuit for timepiece

Related Child Applications (4)

Application Number Title Priority Date Filing Date
JP15558380A Division JPS5696270A (en) 1980-11-05 1980-11-05 Electronic timepiece
JP15558280A Division JPS5696269A (en) 1980-11-05 1980-11-05 Electromechanical converter driving circuit for timepiece
JP11999385A Division JPS60259982A (en) 1985-06-03 1985-06-03 Load detection circuit of pulse motor for electronic timepiece
JP29128185A Division JPS61172088A (en) 1985-12-24 1985-12-24 Electronic timepiece

Publications (2)

Publication Number Publication Date
JPS5321966A JPS5321966A (en) 1978-02-28
JPS6130224B2 true JPS6130224B2 (en) 1986-07-11

Family

ID=14164043

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9640576A Granted JPS5321966A (en) 1976-08-12 1976-08-12 Electric-mechanical converter driving circuit for timepiece

Country Status (1)

Country Link
JP (1) JPS5321966A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5515054A (en) * 1978-07-19 1980-02-01 Seiko Instr & Electronics Ltd Electronic watch
JPS56158978A (en) * 1980-05-13 1981-12-08 Citizen Watch Co Ltd Electronic watch
JPS61116681A (en) * 1985-11-01 1986-06-04 Seiko Epson Corp Electronic timepiece
JPS61221692A (en) * 1986-03-20 1986-10-02 Seiko Epson Corp Electronic timepiece
JP5646846B2 (en) * 2009-01-28 2014-12-24 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー Driver circuit

Also Published As

Publication number Publication date
JPS5321966A (en) 1978-02-28

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