JPS6130225B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a drive circuit for a pulse motor in an electronic timepiece, and an object of the present invention is to reduce the power consumption of the pulse motor and also to achieve high reliability.

Regarding drive circuits for pulse motors used for electronic watches, since low output is sufficient during normal operation, current consumption is reduced by using drive pulses with a relatively narrow pulse width, and during abnormal conditions such as day-of-the-week loading or shock loading. A method has been proposed in which the pulse width is controlled by the induced voltage of the drive coil and set widely in steps to achieve high output.

However, in the above method, in order to detect the induced voltage in the drive coil, the drive coil is opened immediately after the drive pulse is cut off, so the braking force due to the induced voltage does not work on the rotor of the pulse motor. As a result, rotation becomes unstable and malfunctions such as step feeding are likely to occur, and the induced voltage is directly applied to the detection inverter input, so it is necessary to set the number of turns of the drive coil according to the inverter threshold voltage. There is a drawback.

Furthermore, since the pulse width of one pulse of the next phase is controlled by the induced voltage immediately after the driving pulse of one phase of the two-phase alternating driving pulse is cut off, when the induced voltage is near the threshold voltage, the pulse width is Another drawback was that malfunctions could occur because the required output could not be obtained due to switching every pulse.

The present invention provides a pulse motor drive circuit that does not have the above-mentioned drawbacks and has good load-bearing characteristics, good shock resistance, and high stability.

The present invention provides a pulse motor for a watch that is driven by drive pulses with a constant pulse width that are different during normal and abnormal times, and when the drive pulse is not applied, one end of the drive coil is connected to a transistor with low output resistance, etc. It is an object of the present invention to provide a pulse motor drive circuit for a watch whose end is grounded via a transistor with high output resistance.

Further, the present invention provides a pulse motor for a timepiece that is driven by driving pulses with a constant pulse width that are different during normal and abnormal times, and which supplies a pulse with a constant pulse width that lasts for a certain period of time during abnormal times and is different from that during normal times. An object of the present invention is to provide a pulse motor drive circuit characterized by:

Examples will be described below.

Figure 1 shows an example of a pulse motor for a watch.
01 is a rotor made of a magnet having at least two magnetic poles, 102 and 103 are stators made of a magnetic material, 104 is a drive coil, a and b are drive coil terminals, and two phases are applied to a and b. The magnetic flux generated in the drive coil due to the current generated by the pulse voltage is guided to the stator to rotate the rotor in a fixed direction in a stepwise manner. Moreover, FIG. 2 shows another embodiment of the pulse motor for a watch.

FIG. 3 is a block diagram of an embodiment of a conventional pulse motor drive circuit for a watch, in which 110 is an oscillation circuit;
1 is a frequency dividing circuit, 112 is a pulse generation circuit, 113
114 represents a drive circuit, and 114 represents a detection control circuit. Fourth
The figure is a block diagram of an embodiment of the pulse motor drive circuit for a watch according to the present invention, where 115 is an oscillation circuit, 116 is a frequency dividing circuit, 117 is a pulse generation circuit, 118 is a drive circuit, 119 is a detection control circuit, and 120 is a counter. Shows the circuit. FIG. 5 shows a specific embodiment of the drive circuit of the present invention, FIG. 6 is an explanatory diagram of the state of the drive coil, FIGS. 7 and 8 are waveform diagrams of each part,
Figure 8 shows the state under steady state, Figure 8 shows the state under load, and Figure 9 shows the state under load.
The figure shows another specific embodiment of the drive circuit.

In FIG. 5, the flip
The outputs of the flops (hereinafter referred to as FF) 208 and 209 are sent to the gate circuit 211 of the pulse generation circuit 117.
During normal operation, the output of FF 208 is applied to the reset terminals R ₁ and R ₂ of FF 214 and 215 of the pulse generation circuit 117, and the outputs F ₁ and F _{2 are}
Pulses φ ₁ and φ ₂ with short pulse widths are generated alternately. In addition, each output F ₁ and F ₂ is the detection control circuit 1
19 is connected to the input of the OR circuit 227, and its output is connected to the input of the reset-set flip-flop (hereinafter referred to as
(referred to as RS- _FF ).
Other output ₁ of FF214 is FF216 and AND
Control circuit 232 composed of circuits 212 and 213
Input of FF 216 and P- of drive circuit 118
FF215 is connected to the input of chMOS transistor 218.
Output ₂ is connected to the other input of the FF 216 and the input of the P-ch MOS transistor 219 of the drive circuit 118, the output F ₃ of the FF 216 is connected to each input of the N-ch MOS transistor 220 and the AND circuit 212, and the output ₃ is connected to the N- chMOS transistor 22
1, connected to each input of the AND circuit 213.

The output F ₀ of the FF 210 is connected to the other input of the AND circuit 212 of the control circuit 232, and the output ₀ is connected to the other input of the AND circuit 213.
2 output is N-chMOS transistor 223,
The output of the AND circuit 213 is connected to each input of the N-ch MOS transistor 222 . Drive coil 2
17 is a common drain a of the MOS transistors,
The a terminal is connected to the induced voltage detection inverter 225 of the detection circuit 233 composed of the induced voltage detection inverter 224, the b terminal is connected to each input gate of the induced voltage detection inverter 224, and each output is connected to the gate circuit. 226, and the output F ₀ , ₀ of FF210 is connected to the other input of the gate circuit 226, and the output n is connected to the RS-FF228 input.
is connected to the reset terminal _R4 . Further, instead of the transistors 222 and 223 having high output resistance, as shown in FIG. 9, a series connection of low resistance transistors 303 and 304 operating as a switch element and high resistance 301 and 302 may be used.
The AND circuit 229 has two inputs: the output F ₄ of the RS-FF 228 and the input ₀ of the FF 210, and its output j is connected to the reset terminal R ₅ of the RS-FF 230, and j is set to 0 during normal operation. . RS−FF
The output of the counting circuit 120 is connected to the set terminal S ₅ of the RS-FF 230, the reset terminal R ₆ is connected to the output F ₅ , and each output F ₅ and ₅ of the RS-FF 230 is connected to the input of the gate circuit 211. This gate circuit 2
The pulse generating circuit 117 generates output pulses having different pulse widths in accordance with the 11 outputs.

In FIG. 7, _one pulse is generated at t=t ₁ , the P-ch MOS transistor 218 in the drive circuit 118 in FIG. 5 is turned on, and the N-ch MOS transistor 221 is turned on, so that The driving voltage is applied to the drive coil terminal a, and current flows from a to b, stators 102 and 103.
is excited, the rotor 101 rotates 180 degrees clockwise, vibrates for a certain period of time, and then stops. Immediately after the drive pulse ends at t= _t2 , the N-chMOS transistor 221
is turned off, and the N-chMOS transistor 22
0, and the N-ch MOS transistor 223 with high output resistance (equivalent resistance is r) is turned on,
The a terminal is grounded almost directly, and the b terminal is grounded through a resistor r, as shown in FIG. 62. The induced voltage accompanying the rotation of the rotor is divided and applied to the detection inverter 224 of the detection circuit 233, and at t= _t3 to _t4 , the induced voltage exceeds the threshold voltage of the inverter and a gate circuit output n is generated. . At t=t ₁ by φ ₁
The output of the RS-FF 288, i=1, is reset to i=0 at t= _t3 by the gate circuit output n. Therefore, the AND circuit output j = 0, the outputs of the RS-FF 230 F ₅ = 1, ₅ = 0, and the gate circuit 211 sends the high frequency divided output to the FF 214, 2 of the pulse generation circuit 117.
Since the driving pulse width is applied to each of the 15 reset terminals R ₁ and R ₂ , the width of the driving pulse is set narrow.

Next, _two pulses are generated at t= _t5 , and P-
chMOS transistor 219 is turned on and N-
Since the chMOS transistor 220 is on, it becomes as shown in Fig. 6 3, and a driving voltage is applied to the b terminal of the driving coil, and a current flows from b to a, and the stators 102 and 103 are excited in the opposite direction. The rotor rotates 180 degrees clockwise again, vibrates for a certain period of time, and then stops. Immediately after the drive pulse ends at t=t ₆ , N-
chMOS transistor 220 is turned off and N-
The chMOS transistor 221 and the N-chMOS transistor 222 with high output resistance (r is the equivalent resistance) are turned on, and the b terminal is almost directly connected to the a
The terminal is grounded through a resistor r, as shown in FIG. 64. The induced voltage accompanying the rotation of the rotor is divided and applied to the detection inverter 225 of the detection circuit 233, and at t= _t7 to _t8 , the induced voltage exceeds the threshold voltage of the inverter and a gate circuit output is generated. In the following, the driving pulse width is set narrowly in the same way as before. In other words, if the induced voltage in the drive coil is equal to or higher than the threshold voltage of the detection inverter in a steady state with no load, the pulse width is set narrow, and while no drive pulse is applied, the drive coil is Since the circuit becomes a closed circuit and the control current flows due to the induced voltage, the stability of the rotor operation is significantly improved. If the induced voltage in the drive coil immediately after the drive pulse ends is v, and the drive coil resistance is R, the voltage applied to the detection inverter is rv/
(R+r), and it is possible to match the threshold voltage of the detection inverter by changing the equivalent resistance r. Let us consider a case where the load becomes too high and an abnormal state occurs. In Figure 8, it is normal at first and t
A narrow drive pulse is applied to the drive coil between = t ₁₁ and _{t 12} and a detection inverter output is generated at t = t ₁₃ and t ₁₄ . When a load is applied in this state, the angular velocity of the rotor decreases, and the induced voltage after t= _t15 becomes less than the threshold voltage of the detection inverter.
j output occurs at t=t ₁₇ , F ₅ = of RS-FF230
0, ₅ = 1, and the gate circuit 211
is switched, a low frequency divided output is applied to R ₁ and R ₂ of the FFs 214 and 215 of the pulse generating circuit 117, and the drive pulse width is widened in a stepwise manner. On the other hand, the reset of the counting circuit 120 is released and starts counting the number of drive pulses. For example, if you set the pulse counting circuit to the number of pulses required to feed the day of the week,
As the day of the week feed starts, the drive pulse width becomes wider, and after the day of the week feed ends, a count output is generated and the RS-FF
A set pulse is applied to the S ₅ terminal of 230, and the F ₅
=1, ₅ =0, the counting circuit 120 is reset to 0, the gate circuit 211 returns to the state with no switching load, and a narrow pulse width can be achieved.

If configured as in the present application, during normal operation, the converter will be driven with a drive pulse with a minimum pulse width of 5 milliseconds or less, and for a certain period of time, including the time when the day of the week feed load is applied, it will be 5 milliseconds or more. By setting the pulse width to , it is possible to reduce the average current consumption to 1 μA or less by providing the converter with a driving force that can withstand the load and preventing malfunction.

Furthermore, when the application of the drive pulse ends, the drive coil becomes a closed circuit via a low resistance transistor and a high resistance transistor, or a low resistance transistor and a high resistance as shown in Figure 9, and a braking current due to the induced voltage flows. The operation of the rotor is extremely stable, and malfunctions such as two-step feeding can be prevented.

The voltage applied to the detection inverter can be easily matched to the threshold voltage of the inverter by changing the equivalent resistance r of the transistor with high output resistance or the values of the high resistances 301 and 302 shown in FIG. magnetic moment of the rotor,
Another advantage is that there is no need to change basic specifications such as the number of turns of the drive coil.

In this embodiment, transistors with high output resistance are used, but transistors 303 and 304 with low resistance and high resistance 301 and 302 may be used as shown in FIG. It is also possible to use capacitors instead of resistors, in which case energy storage is possible.

Furthermore, since the induced voltage in the drive coil is detected by a CMOS inverter, it has the advantage of not requiring any detection mechanism such as providing a detection coil in the converter or providing a contact or semiconductor in the wheel train connected to the converter. There is. In the present embodiment, the drive pulse width is set to be twice as long as in normal conditions during an abnormality, but it is also possible to set the drive pulse width to an arbitrary pulse width in steps.

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram of one embodiment of a pulse motor for a watch, Fig. 2 is an explanatory diagram of another embodiment, Fig. 3 is a block diagram of an embodiment of a conventional pulse motor drive circuit for a watch, and Fig. 4 is an explanatory diagram of an embodiment of a pulse motor for a watch. A block diagram of an embodiment of a pulse motor drive circuit for a watch according to the present invention, FIG. 5 is a circuit diagram showing a specific embodiment of the drive circuit of the present invention, and FIG. 6 shows drive coils 1, 2, 3, and 4. State explanatory diagram, 7th
8 are waveform diagrams of various parts, and FIG. 9 is a partial circuit diagram showing another specific embodiment of the drive circuit. 112, 117...Pulse generation circuit, 113...
...Drive circuit, 114, 119...Detection control circuit,
120... Counting circuit, 218, 219... P-
chMOS transistor, 220, 221, 22
2,223...N-chMOS transistor, 22
4,225...Detection inverter, 301,30
2...High resistance, 232...Control circuit, 233...
Detection circuit, 231...Pulse conversion circuit.

Claims (1)

[Claims] 1. In an electronic watch equipped with a pulse motor including an oscillation circuit, a frequency dividing circuit, a pulse motor drive circuit, a drive coil, and a rotor, the pulse motor drive circuit is composed of a plurality of MOS transistors each independently controlled, and each of the above a control circuit that controls the MOS transistor of the drive coil to substantially connect at least one end of the drive coil to a power supply line via a high resistance, and a CMOS inverter that detects the induced voltage generated in the drive coil after cutting off the drive pulse. a detection circuit that generates output pulses with different driving forces; a detection control circuit that outputs a counting start signal when the input voltage of the detection circuit is less than or equal to a threshold voltage; An electronic timepiece characterized by comprising a counting circuit for setting a supply time for supplying an output pulse with a large driving force to a pulse motor.