JP3029128B2 - Power control circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power control circuit for setting power supply to a load in a stepwise manner in accordance with the number of input pulses generated when a switch is operated.

[0002]

2. Description of the Related Art Conventionally, as shown in FIG. 4, each time a switch SW is turned on, a power control switching element Q connected in series to a motor M as a load can be turned on and off. A circuit for rotating and stopping M is provided. In this circuit, the switch SW
Is turned on, the voltage between both ends of the Zener diode ZD connected in series to the switch SW (see FIG. 5A) is input to the trigger pulse generation circuit 1, and H is applied for a certain period as shown in FIG. 5B. A trigger pulse having a level is output from the trigger pulse generation circuit unit 1. With this trigger pulse, the transistors TR ₁ , TR ₂ , TR ₃ are turned on only for a certain period. Transistor TR ₁ is started power supply to the respective circuit units from the power supply circuit unit 10 turned on, the transistor TR ₃ is limited during the operation of the timer circuit section 2 is started when turned on. Also, during the timed operation of the timer circuit unit 2,
As shown in FIG. 5 (d), the since the output from the output terminal OUT of the timer circuit section 2 becomes L level, the transistor TR ₁ is held in the ON state, as shown in FIG. 5 (c), the power supply circuit 10
Power supply to each part is continued. Thus, the power supply circuit unit 1
While the power supply from 0 is continued, the switching element Q is turned on and power is supplied to the motor M.
Since the timer circuit unit 2 and output limit operation is time-up ends to the H level, the transistor TR ₁ is turned off, the motor M switching element Q is turned off
Power supply to is stopped.

The timer circuit section 2 starts the timed operation when the input to the input terminal SET goes to the L level while the timed operation is stopped. During the timed operation, the input to the input terminal SET goes to the L level. , The time limit operation is stopped. Since the input terminal SET trigger pulse through a transistor TR ₃ is input to turn on the switching element Q to start the time limiting operation when the trigger pulse generated when stopping the time limit operation, during time limit operation When the trigger pulse is generated, the timed operation is stopped and the switching element Q is turned off.

As described above, when the switch SW is turned on while the motor M is stopped, the motor M rotates, and when the switch SW is turned on again while the motor M is rotating, the motor M stops. Further, when the time set by the timer circuit unit 2 has elapsed since the start of the rotation of the motor M, the motor M automatically stops. This circuit has an advantage that power is not supplied to the power supply circuit unit 2 from the power supply when the motor M is stopped, so that there is no wasteful power consumption while the motor M is stopped.

In the above configuration, the rotation and stop of the motor M are only instructed by operating the switch SW. Therefore, the rotation speed of the motor M cannot be changed by adjusting the power supplied to the motor M. Things. On the other hand, a circuit configuration as shown in FIG. 6 has been considered for controlling the power supplied to the motor M. In this circuit, configurations denoted by the same reference numerals as those in FIG. 4 are the same as those in FIG. In this circuit, the microcomputer 1
By using 1, each time the switch SW is turned on, the power supplied to the motor M changes stepwise. That is, when the switch SW is turned on while the motor M is stopped, a small amount of power is supplied to the motor M to rotate the motor M at a low speed. When the switch SW is turned on again, a larger amount of power is supplied to the motor M than before and the motor M is rotated at a high speed. When the switch SW is turned on again, the power supply to the motor M is stopped.

However, the microcomputer 11
When the program is used, it takes time and cost to develop the program, and it is necessary to review the entire program when the design is changed, so that there is a problem that the change is difficult.
Therefore, it is conceivable to provide a similar function by combining a general-purpose integrated circuit such as a counter instead of the microcomputer 11. That is, the trigger pulse output from the trigger pulse generation circuit unit 1 is counted by the counter, and the power supplied to the motor is set stepwise according to the count value of the counter. When the count value of the counter has reached the maximum countable value, the power supply to the load is stopped when the next trigger pulse is input.

[0007]

By the way, as in the circuit configuration shown in FIG. 4, if an attempt is made to prevent useless power consumption during a period in which the motor is stopped, the power supply circuit must be turned on after the switch is turned on. Power to the unit must be provided. Therefore, when the switch is turned on, it is necessary to start power supply from the power supply circuit unit and, at the same time, to count the number of times the switch has been turned on by a counter. Here, since the power is supplied from the power supply circuit unit to the counter, the counting operation by the counter is started during a period in which the operation immediately after the power supply to the counter is started is unstable. Also, since the output value is not guaranteed unless the counter is reset after the start of power supply, if the counting is started at the same time as the power supply from the power supply circuit unit is started, the output value is not guaranteed.

That is, in the configuration using the counter, there is a problem that it is difficult to achieve both the prevention of wasteful power consumption and the guarantee of the output value of the counter. SUMMARY OF THE INVENTION An object of the present invention is to solve the above-described problem, and it is possible to uselessly set power supply to a load by using a counter, while preventing wasteful power consumption and ensuring that the counter is used. It is an object of the present invention to provide a power control circuit which can be operated at a low speed.

[0009]

The present invention achieves the above object.
Power from the power supply during switch operation.
Trigger pulse generation circuit that generates a fixed width trigger pulse
Switch that is turned on by receiving the output of the trigger pulse generation circuit.
Power supply circuit provided with a switch element in a power supply path from the power supply
And power supply is started from the power supply through the power supply circuit unit.
And a reset circuit section for generating a reset signal .
The trigger pulse is delayed every time a trigger pulse is generated.
A delay circuit for generating a delayed pulse;
Counter that counts delayed pulses after being reset
And multiple power supplies to the load according to the count value of the counter.
Set to the stage and the output value of the counter reaches the specified value.
Then, a supply power setting unit that stops supplying power to the load,
Timed operation is started by the reset signal and timed operation is in progress
Keeps the switch element on before the expiration of the timed operation.
The output value of the counter stops the power supply to the load.
When the value is reached, the timed operation ends and the switch element is turned off.
A delay circuit section and a counter.
And a power supply setting unit and a timer circuit unit, wherein the switch element
Power is supplied from the power supply through the power supply circuit while the power supply is on.
Is to be charged .

[0010]

According to the above arrangement, when the switch is operated, the power is turned off.
The trigger pulse generator circuit is powered from the power
A gap pulse is generated, and the trigger pulse
Switch element is turned on, and the reset circuit
Power supply from the power supply through the
Occurs. The reset signal controls the timed operation of the timer circuit.
Start the timer, and during the timed operation of the timer circuit,
The switch element is kept on. On the other hand, the reset signal
Reset the counter and the counter
Since counting a delay pulse obtained by delaying pulse, operation of the counter Ki out to start the counting from the stable, Sui
Accurately count the number of switch operations with a counter
Can be. Moreover, the reset circuit, the delay circuit, and the
And the power supply setting section and the timer circuit section
Power is supplied from the power supply while the switch element is on.
And the trigger pulse generation circuit
Power is supplied from the power supply, so if the power supply to the load is stopped
Power from the power supply stops and no power is consumed
It is. In short, the switch will operate when the load is stopped.
Not only the load until it is created, the trigger pulse generation times
Circuit, reset circuit, counter, supply power setting, tie
Power supply to all of the power circuits is stopped to reduce power consumption
Is to start the power supply to each unit by operating the switch, after generating a reset signal by the power supply start, there than providing a delay pulse to the counter, electric through the power circuit unit
The unstable period of the voltage immediately after the power supply from the source is initiated so as not to perform the counting operation of the counter, Sui
The number of switch operations can be accurately counted.
You.

[0011]

In this embodiment, an example is shown in which the load is a motor and the power supplied to the motor is set in two stages. However, the type of load, the number of stages of the supplied power, and the like are not necessarily limited to this. Not something. As shown in FIG. 1, a switching element Q composed of a field effect transistor is connected in series to a motor M as a load, and this series circuit is connected to a power supply. The power supplied to the motor M is set in two levels, large and small, depending on whether the switching element Q is continuously turned on or intermittently turned on. When the switching element Q is turned off, the motor M stops. When the switching element Q is turned on intermittently, the power supplied to the motor M is small, so that the motor M rotates at a low speed. When the switching element Q is turned on continuously, compared to when it is turned on intermittently. Since the power supplied to the motor M increases, the motor M rotates at a high speed. The state in which the switching element Q is turned off, the state in which it is intermittently turned on, and the state in which it is continuously turned on are switched every time the switch SW is turned on.

A switch which is turned on only during operation, such as a push button switch, is used as the switch SW. Switch SW, the resistor R ₁ and a Zener diode connected ZD series, the series circuit is connected across the power supply. Connection point between the resistor R ₁ and the Zener diode ZD is connected to the input of the trigger pulse generating circuit 1, the trigger pulse generating circuit 1, generates a trigger pulse at the H level only for a certain period switch SW is turned on I do. That is, the period during which the switch SW is on is not constant,
Trigger pulse generating circuit 1, the switch SW is turned on, than it outputs a trigger pulse of constant width determined by the resistor R ₂ to R ₄ and the capacitor C _1. The trigger pulse generating circuit unit 1 is supplied with power from both ends of the zener diode ZD during a period when the switch SW is on, and is supplied to the trigger pulse generating circuit unit 1 during a period when the switch SW is off.
Power consumption is not caused. Thus, a trigger pulse is generated, and this trigger pulse becomes an input pulse.

When a trigger pulse is generated from the trigger pulse generation circuit 1, during a period when the trigger pulse is at the H level,
The transistors TR ₁ and TR ₂ that are switch elements are turned on. Transistor TR ₁ is inserted between the power supply and the power supply circuit section 10, power from the power supply circuit unit 10 when the transistor TR ₁ is turned on to each circuit section is started. When power supply from the power supply circuit unit 10 is started, a reset signal is output from the reset circuit unit 3. Reset circuit section 3 is constructed of a one of the two monostable multivibrator incorporated in the integrated circuit IC _1. Reset circuit section 3 is triggered by the start of power supply from the power supply circuit unit 10 outputs a pulse of a predetermined time width determined by the resistor R ₅ and capacitor C ₂ from the output terminal OA. This pulse becomes a reset signal and is input to the reset terminal NR of the counter 4 to reset the counter 4. Reset signal is also input to the set terminal SET of the timer circuit portion 2 via the transistor TR _3, timed operation of the timer circuit section 2 is started from the time when the reset signal is generated.

The timer circuit section 2 has the integrated circuit IC ₂ as a main component. When the timed operation is stopped, the timed operation is started when the input to the set terminal SET becomes L level. It is configured. Therefore, when the reset signal rises, the <br/> the input to the set terminal SET transistor TR ₃ is turned on becomes L level, it is the time limit operation is started. The time limit in the timer circuit 2 is determined by the resistors R ₆ and R ₇ and the capacitor C
Determined by ₃ . The output terminal OUT of the timer circuit section 2 is connected to the base of the transistor TR _1, during time limit operation because the output from the output terminal OUT of the timer circuit section 2 becomes L level, during the time limit operation of the timer circuit section 2 is the transistor TR ₁ is held in the oN state. That is, a trigger pulse is generated and the transistors TR ₁ and TR
_{After 2} is turned on, it decreases when the transistor TR ₂ Standing trigger pulse is turned off, while the timer circuit portion 2 continues the time limit operation transistor TR ₁ is the kept in the ON state. Therefore, when the power supply from the power supply circuit unit 10 to each circuit unit is started by the trigger pulse, the power supply is continued until the timer operation of the timer circuit unit 2 stops. Timer circuit section 2 turns off the transistor TR ₁ output from the output terminal OUT when the elapsed time limit time becomes the H level, the reset terminal
When the input to RES becomes L level, the output terminal OUT
The output from when the H-level to turn off the transistor TR _1.

The trigger pulse output from the trigger pulse generation circuit 1 is also input to the delay circuit 5. The delay circuit 5, which has been constructed using one of the two monostable multivibrator incorporated in the integrated circuit IC _1, only the time constant set by the resistor R ₈ and the capacitor C ₄ trigger pulse Is input to the input terminal IB, and the resistance R ₉
And for a certain time set by the capacitor C ₅ to the output of the non-inverting output terminal OB to H level. That is, the output from the non-inverting output terminal OB of the delay circuit unit 5 is a delay pulse obtained by delaying the trigger pulse by a certain time. The delay pulse is input to the inverting input terminal NCP of the counter 4.

The counter 4 comprises a Johnson counter, has three output terminals O1 to O3, and has an inverting input terminal.
Each time the input to the NCP rises, the output of each of the output terminals O1 to O3 is sequentially and selectively set to the H level. That is, when power is supplied from the power supply circuit unit 10 as shown in FIG. 3A by turning on the switch SW, the counter 4 outputs a signal from the reset circuit unit 3 as shown in FIG. 3B. Reset by the reset signal
Outputs of all output terminals O1 to O3 are temporarily set to L level. Thereafter, as shown in FIG. 3 (d), the delayed trigger pulse (FIG. 3 (c) shows a potential at the connection point of the resistors R ₈ and the capacitor C ₄₎ delayed pulse is input, the fall of the delay pulse As shown in FIG. 3E, the output of the output terminal O1 of the counter 4 becomes H level. put it here,
Since the output of the non-inverting output terminal OB of the delay circuit unit 5 is input to the inverting input terminal NCP of the counter 4, the time obtained by adding the delay time of the delay circuit unit 5 and the pulse width of the delay pulse is calculated by the counter 4. The counter 4 can be reset more reliably than when a delay pulse is input to the non-inverting input terminal CP. Thereafter, when the switch SW is turned on, the output of the output terminal O2 and the output of the output terminal O3 sequentially and selectively go to the H level. The output terminal O1 of the counter 4 is not connected to other circuit units, but the output terminal O2 is connected to the oscillation circuit unit 6.
The output terminal O3 is connected to control the timed operation of the timer circuit unit 2.

The oscillation circuit section 6 has an output terminal O2 of the counter 4
When the output of the counter 4 is at the H level, the oscillation operation is stopped and the output level is set to the H level. When the output level of the output terminal O2 of the counter 4 is at the L level, the resistors R ₁₀ and R ₁₁ and the capacitor It is configured to perform an oscillating operation at a period determined and the duty ratio by C _6. That is, the switch SW is turned on, the power supply from the power supply circuit unit 10 is started, and the output terminal of the counter 4 is
When the output of O1 is at H level, the output of output terminal O2 is at L level. At this time, the oscillation circuit section 6 performs an oscillating operation at a constant cycle. When the switch SW is turned on again, the output of the output terminal O2 of the counter 4 becomes H level, and the oscillation operation stops.

The output of the oscillation circuit 6 is input to the control terminal (gate) of the switching element Q via the compensation circuit 9. The compensation circuit unit 9 controls the switching element Q to be turned on and off by the output of the oscillation circuit unit 6 by passing the output of the oscillation circuit unit 6, and also has a turn-off waveform of the switching element Q when the switching element Q is turned off. To improve.

A series circuit of a pair of resistors R ₁₂ and R ₁₃ is connected to the output terminal O 3 of the counter 4, and a connection point between the two resistors R ₁₂ and R ₁₃ is connected to an inverting input terminal of the comparison circuit unit 7. . The non-inverting input terminal of the comparison circuit 7 has a reference voltage generation circuit 8
Is input. That is, after being divided by the output of the output terminal O3 of the counter 4 resistors R _12, R _13, there of being inputted to the comparison circuit 7, the reference voltage, the output of the output terminal O3 of the counter 4 is L When the output is at the H level, the output of the comparison circuit unit 7 is at the H level, and when the output of the output terminal O3 is at the H level, the output of the comparison circuit unit 7 is at the H level.
Is set to the L level. The output terminal of the comparison circuit unit 7 is a reset terminal RE of the timer circuit unit 2.
Since it is connected to S, if the output of the output terminal O3 of the counter 4 becomes H level while the timer circuit unit 2 is in the timed operation, the timer circuit unit 2 is reset and the timed operation stops. If the timer operation of the timer circuit unit 2 stops,
Since the output of the output terminal OUT of the timer circuit unit 2 becomes H level, the power supply from the power supply circuit unit 10 to each circuit unit stops, and the output of the oscillation circuit unit 6 disappears.
Is turned off, and the motor M stops. The reset terminal RES of the timer circuit section 2 includes resistors R ₁₄ and are pulled up by the capacitor C _7, the output of the output terminal O3 of the counter 4 until the H level so that the time limit operation is continued .

According to the above configuration, when the switch SW is turned on as shown in FIG. 2A while the motor M is stopped, power supply from the power supply circuit unit 10 is started, and
A reset signal is output as shown in (d). At the same time when the counter 4 is reset by the reset signal, the timer circuit unit 2 starts the timed operation. Thereafter, when the delay pulse output from the delay circuit section 5 is input to the counter 4, the output of the output terminal O1 of the counter 4 becomes H level as shown in FIG. At this time, since the output of the output terminal O2 of the counter 4 is at the L level, the oscillating circuit section 6 performs an oscillating operation as shown in FIG. 2C, and the switching element Q is turned on intermittently. That is, as shown in FIG.
The power supplied to the power supply becomes relatively small.

When the switch SW is turned on as shown in FIG. 2A while the timer circuit unit 2 is in the timed operation,
As shown in FIG. 2 (f), the output of the output terminal O2 of the counter 4 is H level.
2C, the oscillation circuit section 6 stops the oscillating operation and changes the output to the H level as shown in FIG. 2C. as a result,
The switching element Q is continuously turned on, and the power supplied to the motor M increases as shown in FIG.

When the switch SW is turned on again as shown in FIG. 2C, the counter 4 is turned on as shown in FIG.
The output of the output terminal O3 goes high for a moment, the output of the comparison circuit 7 goes low, and the timed operation of the timer circuit 2 stops. As a result, the power supply from the power supply circuit unit 10 to each circuit unit is stopped, so that the output of the oscillation circuit unit 5 becomes L level as shown in FIG. 2 (c), and the motor M is turned off as shown in FIG. Stop.

As described above, every time the switch SW is turned on, the state where the power supplied to the motor M is small → the state where the power supplied to the motor M is large → the state where the motor M stops is sequentially repeated. It is. On the other hand, the motor M
When the time limit operation of the timer circuit unit 2 is completed while the switch SW is turned on and the motor M is rotating while the motor is stopped, as shown in the right half of FIG. When the time limit operation is completed, the motor M automatically stops.

[0024]

According to the present invention, as described above, the reset signal
Reset counter and trigger after counter
Since counting the delay pulse obtained by delaying the pulse, the operation of the counter is Ki out to start counting from stable, vinegar
Accurately count the number of switch operations with a counter.
There is an advantage that can be. Moreover, the reset circuit section
, Delay circuit section, counter, supply power setting section, and timer circuit
Section is the power supply while the switch element of the power supply circuit section is on.
Power source, and the trigger pulse generation circuit operates the switch.
Since power is supplied from the power supply during operation, power supply to the load stops.
Power supply is stopped when power is
Power while the load is not supplying power
There is an advantage that there is no waste of money. In short, the load is stopped
When it is stopped, the load alone will not work until the switch is operated.
No trigger pulse generator, reset circuit, counter
Power to the power supply, supply power setting section, and timer circuit section.
Stopped to reduce power consumption.
Starts power supply to each part, and resets signal when power supply starts
After the occurrence of the delay, a delay pulse is given to the counter.
Immediately after power is supplied from the power supply through the power supply circuit
During the period when the voltage is unstable, the counter performs the counting operation.
Accurately count the number of switch operations
Has the advantage that it can be As mentioned above,
No power is wasted when the load is off
The switch when the load is stopped.
An operation of starting power supply by the first single operation;
Counter reset and delay pulse to make the counter count
Power supply and the timed operation of the timer
To perform the four operations of maintaining the power supply from
The number of switch operations can be accurately determined according to the load control status.
This has the effect of being able to be reflected.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an embodiment.

FIG. 2 is an operation explanatory diagram of the embodiment.

FIG. 3 is an operation explanatory diagram of the embodiment.

FIG. 4 is a circuit diagram showing a conventional example.

FIG. 5 is an operation explanatory diagram of a conventional example.

FIG. 6 is a block circuit diagram showing another conventional example.

[Explanation of symbols]

 3 reset circuit section 4 counter 5 delay circuit section 10 power supply circuit section

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int. Cl. ⁷ , DB name) H02P 7/00 H02P 5/00 G11C 7/00

Claims (1)

(57) [Claims] 1. A power supply from a power supply during operation of a switch.
Trigger pulse generation circuit that generates a fixed width trigger pulse
Switch that is turned on by receiving the output of the trigger pulse generation circuit.
Power supply circuit provided with a switch element in a power supply path from the power supply
And power supply is started from the power supply through the power supply circuit unit.
And a reset circuit section for generating a reset signal .
The trigger pulse is delayed every time a trigger pulse is generated.
A delay circuit for generating a delayed pulse;
Counter that counts delayed pulses after being reset
And multiple power supplies to the load according to the count value of the counter.
Set to the stage and the output value of the counter reaches the specified value.
Then, a supply power setting unit that stops supplying power to the load,
Timed operation is started by the reset signal and timed operation is in progress
Keeps the switch element on before the expiration of the timed operation.
The output value of the counter stops the power supply to the load.
When the value is reached, the timed operation ends and the switch element is turned off.
A delay circuit section and a counter.
And a power supply setting unit and a timer circuit unit, wherein the switch element
Power is supplied from the power supply through the power supply circuit while the power supply is on.
Power control circuit according to claim Rukoto is conductive.