JPS6245507B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic timepiece, and more particularly to a drive system for its electromechanical conversion mechanism. An object of the present invention is to reduce the power consumption of such a conversion mechanism and also to achieve high reliability.

Since the so-called quartz wristwatch, which uses a quartz oscillator as a time standard oscillator, was put into practical use, it has become widely popular due to its high precision and reliability. During that time, technological innovations in crystal wristwatches have been remarkable, and their power consumption, which initially required 20-plus microwatts, can now be achieved at around 5 microwatts. However, if we look at the breakdown of the current power consumption of 5 μW, it will be 1.5 to 2 μW due to the oscillation of the crystal oscillator, frequency division, etc.
W, the electromechanical conversion mechanism is 3 to 3.5μW, which is quite unbalanced.In other words, the power consumption of the electromechanical conversion mechanism accounts for 60 to 70% of the total power consumption, so we will strive to further reduce power consumption in the future. In order to achieve this goal, reducing the power consumption of this electromechanical conversion mechanism seems to be effective. However, the conversion efficiency of current electromechanical conversion mechanisms is quite high, and it is quite difficult to increase the efficiency further. However, conventional electromechanical conversion mechanisms have been designed to operate satisfactorily even under the worst conditions due to requirements such as load-resistant mechanisms such as calendar mechanisms, environmental resistance such as temperature and magnetism, and resistance to external disturbances such as vibration and shock. For this reason, the conversion mechanism was required to have the ability to withstand a certain load under certain driving conditions, but in reality, the watch body is only under such a load for about 4 to 5 hours in a day. Most of the 20 hours are without load. In other words, if the watch body was always in a no-load state, the exchange mechanism would not need to be designed to withstand such a large load, and in that case, power consumption could be reduced considerably, but the watch body would only last for a short time. In order to guarantee this, it was necessary to use a conversion mechanism that could supply a large amount of power and obtain a large output.

The present invention corrects the above-mentioned irrationality by driving the conversion mechanism with less power when the load is small, and with high power when the load is large, and significantly reduces the power consumed by the conversion mechanism. It is something to do. Furthermore, such a drive system is constructed using reliable all-electronic means without including mechanical contacts, and a stable drive that can cope with variations due to the type of conversion mechanism and mass production has been realized.

The present invention will be explained below. First, a step motor and its operation will be explained as an example of an electromechanical conversion mechanism used in an electronic watch, and the concept of the present invention will be explained based on this step motor. Then, examples will be explained in detail. do.

Figure 1 shows an example of a conventional electronic watch motor. In the figure, 1 is a rotor made of a permanent magnet magnetized to two poles.
Stators 2 and 3 are arranged facing each other with the stators 2 and 3 in between, and these stators 2 and 3 are each connected to a yoke 5 around which a coil 4 is wound to form a set of stators.

The stators 2 and 3 have circular arc portions 2a and 3a eccentric to the center of the rotor 1 so that the rotor 1 can rotate in a fixed direction, and the positions of the magnetic poles (N and S) when the rotor 1 is at rest are adjusted. The stators 2 and 3 are shifted to one side. This type of step motor has been in practical use for some time and was driven by a circuit block as shown in FIG. 10 is a crystal resonator, which is driven by an oscillation circuit 11;
The frequency is divided by the frequency divider 12, and the waveform shaper 13 divides the frequency into 180
Two pulses with different phases are formed.

As an example, a pulse of 7.8 m sec every 2' will be considered and explained below. This pulse
Driver 1 consisting of CMOS inverter
4 and 15, and the output is sent to terminal 4 of coil 4.
a, 4b. FIG. 3 is a detailed diagram of this driver section. When a signal 18 is applied to the input terminal 16 of one inverter 14, a current flows as indicated by an arrow 19, and conversely, a current flows to the input terminal 16 of one inverter 14.
When a similar signal is applied to the input terminal 17 of 5, a current flows in a route symmetrical to arrow 19. That is, by applying signals alternately to the input terminals 16 and 17 of both inverters, the current flowing through the coil 4 can be alternately reversed. Specifically, the current coil of 7.8 m sec is alternately reversed every second. It can be passed to 4. With such a drive circuit, the stators 2 and 3 of the step motor shown in FIG.
S poles occur alternately, and are repelled by the magnetic pole of rotor 1,
The rotor 1 can be rotated by 180 degrees by suction. The rotation of the rotor 1 is transmitted to the fourth wheel 7 via the intermediate wheel 6, and further to the third wheel 8, second wheel 9, and further to the cylinder pinion, hour wheel, and calendar mechanism (not shown), and is transmitted to the clock. Operates an indicating mechanism consisting of a minute hand, second hand, calendar, etc.

The pulse motor shown in FIG. 1 operates in principle as explained above, and has been used as a conversion mechanism for electronic wristwatches.

In the drive circuit shown in FIG. 3, when a high level signal is applied to the terminal 17 and a signal 18 is applied to the terminal 16, and a current flows as shown by an arrow 19, a voltage drop based on the drive current occurs in the MOS transistor 15 due to the channel impedance. A signal waveform corresponding to this current can be detected at the generating terminal 4b. The current waveform is as shown in FIG. 4, for example. Fourth
In the figure, section A is a drive section, in this case 7.8 m sec, and the current flowing in this section A is the current consumed by motor drive. The reason why the current waveform in section A has a complicated shape as shown in the figure is that in addition to the current generated based on the voltage applied by the drive circuit, there is also an induced current in the coil due to the rotation of the driven rotor. This is because they are superimposed. Section B is the section after the drive pulse is applied, and the rotor rotates due to inertia and vibrates until it stops at a stable position.At this time, this section is the period after the drive pulse is applied.
Since the channel MOS transistor is turned on, an induced current flows in the coil 4 in response to the movement of the rotor in a loop between the coil 4 and this transistor. This is why the waveform in section B in FIG. 4 is pulsating. Therefore, the shapes of the drive current waveform and the induced current waveform after driving can substantially correspond to the rotational position of the rotor.

Now, waveform 20 and waveform 20' in FIG. 4 are a series of waveforms, and this is when the load on the rotor is very small. Waveform 22 and waveform 22' are also a series of waveforms, and in this case, the load on the rotor is large and the rotor is close to its operating limit, while waveform 21 and waveform 21' represent a load that is approximately 1/2 of the maximum allowable load. This is the case when it is multiplied.

If you carefully observe the current waveform when the load is changed in this way, you will see that the waveform extends to the right as the load increases. This is because the rotation of the rotor slows down as the load increases.
It has been experimentally confirmed that the rotor vibration frequency is low and the amplitude is small until it stops at a stable position. Considering this phenomenon in reverse, it can be understood that if the load on the rotor is always in a no-load state, the rotor can be driven with a short pulse width of 7.8 m sec. In fact, even if the pulse width is shortened,
The motor runs and the output torque decreases.

This situation is shown in FIG. FIG. 5 shows the output torque characteristic T and the power consumption characteristic I when the drive pulse width is changed. The aforementioned drive pulse width of 7.8 m sec corresponds to P ₂ in this figure. That is, the output torque is T ₂ with a pulse width of P ₂ and the power consumption is I ₂ . As mentioned above, this output torque T ₂ is set so as to be able to sufficiently withstand the load encountered by the watch body. However, if the load on the rotor is small or negligible, the output torque can be small, the drive pulse width can be shortened, and the power consumption can be reduced. For example, if driven with a pulse width of P ₁ , the output torque would be T ₁ and the power consumption would be I ₁ .
The present invention focuses on this point, and by detecting the load on the rotor, drives with a narrow pulse width when there is no load or a small load, and drives with a wide pulse width when a large load is applied. It is a rational and low-power device.
As mentioned before, the overwhelming majority of people are in a no-load state, so the effect of reducing power consumption is very large. For example, as shown in Figure 5, when driving with a pulse width of P ₁ during no load (20 hours) and with a pulse width of P ₂ during load (4 hours), and assuming that I ₁ /I ₂ = 1/2. , the average power consumption is I=I ₁ ×20+I ₂ ×4/24=14/24I ₂ ≒0.
58I ₂ , which requires less than 60% of the power compared to the conventional method, which was driven with a constant pulse width of P ₂ , resulting in a significant reduction in power consumption.

By the way, although it was briefly mentioned above that ``the load is detected...'', it goes without saying that this method of detecting the load is a major point of the present invention. Next, a method for detecting this load will be described. Looking at the current waveform flowing through the coil in FIG. 4, it can be seen that the current waveform changes as the load increases. That is, in drive section A, the positions of maximum and minimum shift to the right as the load increases. The magnitude of the load can be determined by focusing on this point, but the amount of change in this waveform is extremely small, making it difficult to absorb variations in mass production, and requires extremely delicate control.

Therefore, the present invention focused on section B after application of the drive pulse. Also in this section B, as the load increases, for example, the point where the minimum value is first shifted to the right. Moreover, compared to the amount of change in the waveform in section A,
A change several times larger can be obtained. Detecting the magnitude of the load based on the induced current waveform in this section B is easier and more reliable than in the above-mentioned section A. This phenomenon also occurs when the driving pulse width is shortened, and the situation is shown in FIG. The drive shown in Fig. 6 has a narrow drive pulse width compared to Fig. 4, so it can withstand only a small load, but the drive current waveform 23 at no load and the induced current waveform 23' after driving are similar. The relationship between the driving current waveform 24 at the limit load and the induced current waveform 24' after driving is the same as that shown in FIG. 4. The load is detected by the method described above, but the configuration of the present invention normally drives the motor with a narrow drive pulse assuming no load, and always detects the load size from the induced current waveform after driving. When is small, driving continues with the initial narrow driving pulse width. When the load increases and approaches the limit of driving with a narrow drive pulse width, the next drive is driven with a wide drive pulse width for a certain period of time, and then the drive is returned to the original narrow drive pulse width.
The present invention is generally constructed as described above, and will be explained in more detail with reference to the block diagram of FIG.

FIG. 7 is a block diagram showing the configuration of the present invention, where 25 is a time standard oscillator, 26 is a circuit including an oscillation circuit, a frequency dividing circuit, etc., 27 is a pulse motor drive circuit, and 28 is a pulse motor. The configuration is the same as a conventional electronic wristwatch. Reference numeral 29 denotes a load detection circuit that detects the load based on the induced current waveform after application of the drive pulse, as explained in FIGS. 4 and 6. 3
0 is a control circuit that controls the drive of the pulse motor 28 according to the load condition detected by the load detection circuit 29, and normally controls to supply a narrow drive pulse when there is no load and a wide drive pulse when there is a load. .

This control system will be explained with reference to FIG. FIG. 8 shows the state of the drive pulses, which are supplied as described above in the section regarding the pulse motor, and are shown as pulses 31 and 32. pulse 31,
32 is a narrow pulse width in the no-load state. After applying the pulses 31 and 32, the detection circuit of FIG. 7 detects a load condition, which is either no load or a small load condition. That is, since the load detection after pulse 31 was determined to be no load, the next pulse 32 has a narrow pulse width, and since the load detection after pulse 32 was also determined to be no load, the next pulse 33 also has a narrow pulse width. In load detection after pulse 33, it was determined that the vehicle was in a loaded state. In this case, several tens of milliseconds after the pulse 33, a second correction pulse 34 with a wide pulse width is applied with the same polarity as the pulse 33 (ie, the same current direction). For the subsequent constant number of pulses, wide pulse width pulses 35, 36 are applied, and then the initial narrow pulse width pulses 37, 38, . . . are applied again. To explain the relationship between pulse 33 and pulse 34, when a large load is detected by driving pulse 33, pulse 3 with a wide pulse width is generated after several tens of milliseconds.
4 is applied. This is because the load is determined to be large when the load is detected after pulse 33, but it is difficult to determine whether the rotor has operated at this time, because the induced current waveform in Figure 6 shifts to the right as the load increases. Attenuate. When the rotor does not operate, no induced current is produced, but it is difficult to distinguish this from the situation in which the rotor operates smoothly when the load is close to its limit. If the load increases gradually, even if the load is determined to be large, the rotor will still be operating at the pulse 33 at that time, and if the load suddenly becomes too large to be driven by a narrow pulse width, the rotor will not operate at the pulse 33. It doesn't work. It is difficult to distinguish between the two. Therefore, it is easy to set the load detection after pulse application so that there is some margin. In this configuration, pulse 34 is applied. When the rotor is actuated by pulse 33, pulse 34 is a pulse in the same direction as pulse 33, so this pulse 34 becomes a pulse with an opposite phase, and the rotor does not rotate. Also, pulse 3
If the rotor does not operate at 3, pulse 34
is driven by. At this time, the rotor is driven with a delay of several tens of milliseconds, but this is not visible to the eye as the operation of the second hand, and there is no need to create an unsightly result due to this. Next, after detecting the load, the reason why the wide pulse width pulses 35 and 36 are continued for a fixed number of pulses is because the calender mechanism has the largest load on the rotor, and this continues for 3 to 4 hours. Therefore, if the pulse width is immediately returned to a narrow pulse width, it will be determined that the device is in a loaded state again, and if this is repeated, two pulses will be supplied for each operation, increasing power consumption and eliminating the significance of reducing power consumption. In addition, the load on the rotor is not only due to the calendar mechanism, but also single loads such as magnetic fields, low temperatures, and disturbances. In such a case, it is desirable that the number of continuous pulses with a wide pulse width be as small as possible. Considering this phenomenon, the number of continuous pulses is
It is desirable to set it to 10 seconds to several tens of minutes. The configuration of the present invention has been described above. Next, specific embodiments of the present invention will be described. FIG. 9 is an example of a load detection circuit and a drive pulse control circuit of a timepiece according to the present invention.

In Fig. 9, 25 is an oscillation circuit, 26 is a frequency dividing circuit, 28 is a motor, 27 is a drive circuit, 29 is a motor load detection circuit, and 30 is a control circuit, which correspond to the configuration in Fig. 7. . Hereinafter, the circuit elements will be explained one by one. The NAND GATE output of 39 is a clock for creating a narrow pulse when driving the motor in a no-load state, and for example, generates a clock pulse delayed by 5 m sec with respect to the falling edge of a 1 second signal. At this time, the delay flip-flop 4
2, the input 1-second signal is delayed by 5 m sec and output, and a narrow pulse with a width of 5 m sec is generated at the output of the gate 46.

The flip-flop 44 and the NAND gate 47 are circuits that generate wide pulses when driving the motor in a loaded state. For example, the pulse width at this time is
7.8m sec. A 128Hz pulse is supplied to the flip-flop's clock input terminal.
The 1-second signal supplied to the input terminal of the flip-flop is output with a delay of 7.8 m sec by the 128 Hz clock, and a wide pulse with a width of 7.8 m sec is output to gate 47 by the same operation as gate 46. occurs.

The elements surrounded by the frame 110 above, flip-flops 42, 44, NAND gates 39, 47, 46
A pulse generation circuit is constructed by the following. still,
The NAND gate 47 is a gate that selects a narrow pulse or a wide pulse based on a signal from a counter 52, which will be described later. Gates 40, 48 and flip-flop 43 are circuits that generate reference pulses for load determination to determine whether the motor is in a no-load state or a loaded state.

A load judgment reference pulse is obtained at the output of the gate 48 under the same operation as the gate 46 or 47 by means of a flip-flop 43 which uses the output pulse of the gate 40 as a clock signal and a one second signal.

The reference pulse output from the gate 48 is used to determine a load detection signal from the gate 56, which will be described later.

FIG. 10 shows the correlation between the output signals of each gate related to load detection. The operation of FIG. 9 will be explained below together with FIG. 10.

10 corresponds to the output narrow pulse of the gate 46, and 59 corresponds to the criterion pulse of the gate 48 output. The gate 41 is a correction pulse generating circuit, and the pulse width is a wide pulse of 7.8 m sec, and the generation position is delayed by, for example, 30 m sec with respect to the pulse of the gate 46 or 47. An example is shown in FIG. 1066. The input terminal 57 of the gate 41 is a correction signal which will be described later, and only when the correction signal becomes HIGH, a correction pulse is generated at the output of the gate 41 and supplied to the subsequent stage. The input signals to the gates 39, 40, and 41 are signals for obtaining the pulses, and are input to the counter 2.
Combine the outputs of 6 appropriately. Gate 89, 49
is a circuit that separates the above-mentioned pulses to the drive inverters 14 and 15 and outputs them alternately every second. The gate 50 inputs one count input to the counter 52 when a correction pulse is issued to the output terminal 41 while the counter 52 is at zero. Once the counter 52 starts counting, the gate 50 remains in the OFF state until all outputs of the counter 52 return to zero. When 52 enters the counting state by the output of gate 50, the gate of 51 opens and the output of 52 continues until all outputs become zero.
The second signal continues to be sent to 52 as a count signal.
As mentioned above, the counter 52 is set appropriately between several tens of seconds and several tens of minutes, and after detecting that the motor is in a loaded state, outputs a wide pulse drive signal for the above-mentioned time width. A timer to keep you going. Reference numeral 47 uses the output of the counter 52 as a gate input, and outputs a wide pulse to the subsequent stage while 52 is in the counting state. Block 29 in FIG. 9 is an example of a circuit that detects the motor load based on the operating state of the motor after application of the drive pulse.

Reference numerals 53 and 54 are transmission gates that alternately select the outputs of the driving inverters 14 and 15 according to the driving signal.

The outputs of 53 and 54 are combined and input to a differential amplifier 55 via a capacitor. Of the output signals 53 and 54, waveforms in a no-load state and a waveform in a loaded state are shown in FIGS. 60 and 61, respectively. still,
The output signal 60 is in a no-load state and corresponds to the induced current 20' in FIG. 4 and the induced waveform 23' in FIG. 6.
The output signal 61 is under heavy load, as shown in FIGS.
Among the induced current waveforms shown in the figure, this corresponds to waveforms near the induced current waveforms 22' and 24' at the operating limit. Of course, the criteria for determining the load state can be set arbitrarily by the designer. The induced current waveforms 60 and 61 are converted by the capacitor 55a into differential signals whose polarity is inverted at the peak position (transition point). The voltage signal is passed through an inverter 55 to obtain signals 62 and 64. Therefore, the signal 62 becomes a rectangular wave that is inverted at the peak position of the induced current waveform 60, and the signal 64
becomes a rectangular wave that is inverted at the peak position of the induced current waveform 61. In order to clarify the peak positions and reversal positions, the peak positions of the induced current waveforms 60 and 61 are marked with a to f, and correspondingly, the reversal positions of the signals 62 and 64 are marked with a' to e'. , a″, b″, f″.

The output of the inverter is delayed by the CR time constant circuit and becomes one input of the NAND gate 56, and by using the intermediate output of the two inverters as the other input of the NAND gate 56, the signals 63 and 65 in FIG. obtain. Signal 63 is output waveform 60
, and the signal 65 corresponds to the output waveform 61. Comparing the output waveforms 60, 61 with the signals 63, 65, it is clear that the pulses of the signals 63, 65 indicate predetermined peak positions of the output waveforms. The load state is detected by determining whether the pulse positions of the signals 63 and 65 are inside or outside the above-mentioned judgment reference pulse 59, and the former case is determined to be a no-load state, and the latter case is determined to be a loaded state. do. Therefore, signal 63 indicates a no-load condition, and signal 65 indicates a loaded condition. Note that the output signals 63 and 65 of the NAND gates output pulses in the negative direction.

Next, the correction pulse generating means will be described. The gate 104 receives the load detection signal which is the output of the gate 56, the judgment reference pulse signal 59 which is the output of the gate 48, and the signal obtained by delaying the 1 second signal which is the output of the delay flip-flop 44 by 7.8 msec. It is used as input. The output signal of the delay flip-flop 44 acts as a mask signal in the gate 104 to determine the detectable period. With the above configuration, the detection signal when there is no load (Fig. 10, 6
3) passes through the gate 104, but the detection signal 65 when there is no load is prohibited. That is, gate 104
constitutes the determination circuit 200. Line 57 is the output of the flip-flop formed by gates 107 and 108;
A set input is formed by The 1 second signal input to the gate 106 determines the desired set state of the flip-flop, and the output 57 is always set to H in the load detection state. When a signal detecting a no-load state passes through gate 104 in this state, it passes through gates 105 and 106, resets the flip-flop, and sets output 57 to the L state. However, when the load is heavy, the reset signal is not input, so the output 57 remains set to H. If the output 57 remains at H, the correction pulse is passed through the correction pulse generating gate 41, so that the correction pulse is supplied to the coil through the drive circuit gate 48 or 49. Note that the other input of the gate 105 receives a signal that prohibits passage of the detection signal at the same time that the counter 52 starts operating. Further, the signal marked * on the gate 104 is a signal that inhibits the detection signal while the drive current is being applied to the coil, and is output from the flip-flop 44. Therefore, gate 104 is gate 4
By inputting the output of 8 and the output of flip-flop 44, the circuit becomes a determination circuit that determines a light load state when a load detection signal from gate 56 is generated within a predetermined time.

As a result, for the case of waveform 61, a correction pulse 66 is subsequently applied, which completes the rotation of the rotor. However, as mentioned above, 6
This also includes the case where the rotation of the rotor is completed before 6 is applied. The correction pulse 66 also
is input to the counter 52 through the gate 50, and the 5
Turn on the gate 1 and put the gate 52 in the counting state. Thereafter, the gate 47 is kept in the ON state for a certain period of time to continue supplying the wide pulse drive signal. While the wide pulse is being applied, 57 is in the LOW state;
No correction pulse is output. This is because the motor is considered to have sufficient output torque during wide pulse driving.

As the peak detection circuit, various systems can be considered in addition to the 55 differential amplifier circuit. FIG. 18 is a block diagram of a peak detection circuit using a delay circuit. In the figure, 53 and 54 are transmission gates, and 80
81 is a delay circuit, and 82 is a comparator to which the outputs of 80 and 81 are input. An example of the amplifier 80 is shown in FIG.
Figure 4 shows. The aforementioned motor drive detection waveform 23,
24 mag is a number that practically occurs near the power level.
Since the signal is from mv to several tens of mV, resistor 66,6
7 and convert it to the input operating level of the amplifier. A waveform shown in FIG. 16 76 appears at the terminal 68. FIG. 14 is an improved circuit of FIG. 13, in which a MOS transistor is inserted in place of the resistor 67, and a return circuit is provided to control the channel impedance of the transistor 69 so that the amplifier input level becomes the operating level. Block 70 is a circuit for detecting the output level. FIG. 15 shows a simple embodiment of the delay circuit 81, in which 71 and 73 are transmission gates, and 72 and 74 are load capacitors. In this case, input signal 7 at terminal 68
6 is delayed as 77 at the output terminal. 1st
FIG. 7 schematically represents this waveform. An input signal 76 is transmitted to a capacitor 72 by a transmission gate 71, and the terminal voltage waveform of 72 becomes 79. Furthermore, a waveform 77 appears at the output terminal 75 by the transmission gate 73. Comparator 82 outputs a rectangular signal shown at 78 when waveforms 76 and 77 are input.

As the delay circuit, the one shown in FIG. 15 is suitable, but since the input signal frequency is relatively low, a bucket brigade type data transfer element or the like is also suitable.

It has been confirmed that the load detection method of the present invention operates effectively even in the case of magnetic fields or shocks applied to the watch body. FIG. 19 shows a detected current waveform when a DC magnetic field is applied in the direction of the coil of the pulse motor. 83 is a case where the directions of the magnetic field induced in the motor inner core by an external magnetic field and the driving magnetic field are opposite to each other, and 84 is a case where both magnetic fields are in the same direction.
At 83 and 84, waveforms 85 and 86 have zero external magnetic field, and can be considered to be substantially the same waveforms. 87,8
8 is a waveform when the external magnetic field is 40 Gauss. According to the waveform, the operation in the direction 83 becomes more difficult as the external magnetic field becomes stronger, and exhibits the same characteristics as the operation when the load becomes large. Therefore, the timepiece circuit according to the present invention operates effectively against the influence of external magnetic fields, and it has been experimentally confirmed that the strength against external magnetic fields is no different from that of conventional timepieces. In the case of 87 in FIG. 19, since the minimum position of the waveform appears after the determination reference pulse, a correction signal 87' is added. From the above description, it can be easily inferred that the present invention has an effective effect on impact resistance as well.

The pulse motor in Fig. 11 has a rotor 100
The stator 101 is made of a permanent magnet, and the stator 101 is an integral type without a gap unlike that shown in FIG. Notches 102 and 103 are formed to serve as irregularly shaped portions. 1
04 is a drive coil. In such a pulse motor, since the stator 101 is connected, the induced current after driving is as shown in FIG. 12, as shown in FIG.
It is slightly different from Fig. 6. However, the waveforms 105 and 105' at no load, and the waveforms 106 and 10 at load
It will be understood that the relationship of 6' is basically the same and can be realized in the same manner. When one stator is used, the gap between the rotor and stator is always kept constant, so a stable induced current can be obtained with good mass productivity.

As described above, according to the configuration of the present invention, the load detection circuit that detects the induced current generated in the coil is connected to the end of the coil, and the load detection circuit detects the induced current generated in the coil after the application of the pulse signal ends. The load detection circuit outputs a load detection signal in response to an induced current of a predetermined value, and includes a determination circuit that determines a light load state only when the load detection signal is generated within a predetermined time. Therefore, it has the following effects.

a Prior to the present invention, methods for detecting induced current as a load detected changes in the current value of the drive pulse due to an induced voltage in the opposite direction to the drive pulse when the drive pulse was applied to the coil.
However, when the rotor is forcibly driven by the drive current, a sufficient difference in the induced current value cannot be obtained between light load and heavy load, making it impossible to perform reliable and stable load detection. It contained some problems. The present invention focuses on the fact that the induced current value when the rotor rotates at a predetermined angle after the end of pulse application and is undergoing damped oscillation is not affected by the supply voltage value and there is a large difference between light load and heavy load. By detecting the induced current generated in the coil after the pulse application is completed by the load detection means, it is possible to detect the load with extremely high accuracy.

b The load detection circuit of the present invention detects the induced current generated in the coil after application of a drive current as a load, and detects a light load state when the detection signal is generated within a predetermined time. Since the shift in the peak position of the induced current caused by vibration changes greatly depending on the load, it has the advantage of increasing detection accuracy.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an example of a pulse motor of a conventional electronic wristwatch. FIGS. 2 and 3 are diagrams showing conventional circuit configurations, and FIG. 4 is a diagram showing a current waveform of a pulse motor drive coil in a conventional timepiece. FIG. 5 is a diagram showing the relationship between output torque and power consumption with respect to the drive pulse width of the pulse motor. Figure 6 is a coil current waveform diagram when the motor is driven with a pulse width narrower than the conventional drive pulse. FIG. 7 is a diagram showing a circuit block of a timepiece according to the present invention. FIG. 8 is a diagram showing a time chart of motor drive pulses by the circuit according to the present invention. FIG. 9 is a diagram showing a specific example of the block circuit of FIG. 8. FIG. 10 is a diagram showing an example of a time chart of the load detection section in FIG. 9. FIG. 11 is a diagram showing an example of a pulse motor of an electronic wristwatch according to the present invention. FIG. 12 is a coil current waveform diagram during narrow pulse driving in the pulse motor of FIG. 11. 1st
3 to 18 are diagrams showing other examples of the load detection section in FIG. 9. FIG. 19 is a diagram showing changes in the coil current waveform when a DC magnetic field is applied to the electronic wristwatch according to the present invention. 25... Oscillation circuit, 26... Frequency dividing circuit, 27... Drive circuit, 28... Motor, 29... Motor load detection circuit, 200... Judgment circuit, 30... Control circuit, 31
~33... Narrow pulse drive signal, 34... Correction signal, 3
5... Wide pulse drive signal, 59... Load determination reference pulse, 60... No load detection signal, 61... Load detection signal.

Claims (1)

[Claims] 1. An oscillation circuit 25, a frequency division circuit 26 that frequency divides the output signal of the oscillation circuit, a drive circuit 27 operated by the output signal of the frequency division circuit, a step motor 28 driven by the drive circuit, and the step motor. In an electronic timepiece having a driven wheel train, it is connected to a coil end and detects the induced current generated in the coil according to the vibration of the rotor after applying a drive pulse, and detects the load when the induced current reaches a predetermined value. A load detection circuit 29 that outputs a signal is connected between the frequency dividing circuit and the drive circuit, and forms a drive pulse for normal drive, and when the load detection circuit detects a heavy load, the drive pulse immediately before detection is generated. and a control circuit 30 that outputs a correction pulse having the same polarity as the drive pulse and a larger driving force than the drive pulse. Judgment circuit 20 that judges it as a load
An electronic clock characterized by being equipped with a 0.