JPS6148110B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic timepiece, and more particularly to a drive system for its electromechanical conversion mechanism. An object of the present invention is to achieve low power consumption and high reliability of such a conversion mechanism.

Since the so-called quartz wristwatch, which uses a quartz oscillator as a time standard oscillator, was put into practical use, it has become widely popular due to its high precision and reliability. During that time, technological innovations in crystal wristwatches have been remarkable, and their power consumption, which initially required 20-plus microwatts, can now be achieved at around 5 microwatts. However, if we look at the breakdown of the current power consumption of 5 μW, it will be 1.5 to 2 μW due to the oscillation of the crystal oscillator, frequency division, etc.
W, the electromechanical conversion mechanism is 3 to 3.5μW, which is quite unbalanced.In other words, the power consumption of the electromechanical conversion mechanism accounts for 60 to 70% of the total power consumption, so we will strive to further reduce power consumption in the future. In order to achieve this goal, reducing the power consumption of this electromechanical conversion mechanism seems to be effective. However, the conversion efficiency of current electromechanical conversion mechanisms is quite high, and it is quite difficult to increase the efficiency further. However, conventional electromechanical conversion mechanisms have been designed to operate satisfactorily even under the worst conditions due to requirements such as load-resistant mechanisms such as calendar mechanisms, environmental resistance such as temperature and magnetism, and resistance to external disturbances such as vibration and shock. For this reason, the conversion mechanism was required to have the ability to withstand a certain load under certain driving conditions, but in reality, the watch body is under such load only for about 4 to 5 hours a day, when other watch bodies are under such load. Most of the 20 hours are without load. In other words, if the watch body was always in a no-load state, the exchange mechanism would not need to be designed to withstand such a large load, and in that case, power consumption could be reduced considerably, but the watch body would only last for a short time. In order to guarantee this, it was necessary to use a conversion mechanism that could supply a large amount of power and obtain a large output.

The present invention corrects the above-mentioned irrationality by driving the conversion mechanism with less power when the load is small, and with high power when the load is large, and greatly reduces the power consumed by the conversion mechanism. It is intended to reduce Furthermore, such a drive system is constructed using reliable all-electronic means without including mechanical contacts, and a stable drive that can cope with variations due to the type of conversion mechanism and mass production has been realized.

The present invention will be explained below. First, a pulse motor and its operation will be explained as an example of an electromechanical conversion mechanism used in an electronic wristwatch, and the concept of the present invention will be explained based on this pulse motor. Then, examples will be explained. I will explain in detail.

Figure 1 shows an example of a pulse motor for an electronic wristwatch. In the figure, 1 is a permanent magnet rotor magnetized to two poles, and stators 2 and 3 are arranged facing each other with rotor 1 in between. However, these stators 2 and 3 are each connected to a yoke 5 around which a coil 4 is wound to form a set of stators. The stators 2 and 3 are arranged so that the circular arc portions 2a and 3a of the stators 2 and 3 are eccentric to the center of the rotor 1 so that the rotor 1 can rotate in a fixed direction, and the magnetic poles (N and S) of the rotor 1 are positioned at rest. is shifted to one of stators 2 and 3. This type of pulse motor has been in practical use for some time and was driven by a circuit block as shown in FIG. 10
is a crystal oscillator, which is driven by an oscillation circuit 11, whose frequency is divided by a frequency divider 12, and by a waveform shaper 13 at an appropriate time interval and an appropriate time width.
Two pulses with a 180° phase difference are formed.

As an example, let's consider a pulse of 7.8 msec every 2" and explain this below.
Driver 14 consisting of a CMOS inverter,
15, and its output is sent to the terminals 4a of the coil 4,
4b. FIG. 3 is a detailed diagram of this driver section. When a signal 18 is applied to the input terminal 16 of one inverter 14, a current flows as shown by an arrow 19, and conversely, the same goes to the input terminal 17 of the other inverter 15. When a signal is applied, a current flows in a route symmetrical to the arrow 19. That is, by alternately applying signals to the input terminals 16 and 17 of both inverters, the current flowing through the coil 4 can be alternately reversed. Specifically, a current of 7.8 msec, which is alternately reversed every second, is applied to the coil 4. It can be passed to 4. With such a drive circuit, N and S poles are alternately generated in the stators 2 and 3 of the step motor shown in Figure 1, and the rotor 1 can be rotated 180 degrees by repulsion and attraction from the magnetic poles of the rotor 1. . The rotation of the rotor 1 is transmitted to the fourth wheel 7 via the intermediate wheel 6, and further transmitted to the third wheel 8, second wheel 9, and further to the cylinder pinion, hour wheel, and calendar mechanism (not shown), and the hour hand. , operates an indicating mechanism consisting of a minute hand, second hand, calendar, etc.

The pulse motor shown in FIG. 1 operates in principle as explained above, and has been used as a conversion mechanism for electronic wristwatches.

In the drive circuit shown in FIG. 3, when a high-level signal is applied to the terminal 17 and a signal 18 is applied to the terminal 16, and a current is caused to flow as shown by an arrow 19, a voltage drop based on the drive current occurs in the MOS transistor 15 due to the channel impedance. A signal waveform corresponding to this current can be detected at the generating terminal 4b. The current waveform is as shown in FIG. 4, for example. In FIG. 4, section A is a drive section, in this case 7.8 msec, and the current flowing in this section A is the current consumed by motor drive. The reason why the current waveform in section A shows a complicated shape as shown in the figure is that in addition to the current generated based on the voltage applied by the drive circuit, there is also an induced current in the coil due to the rotation of the driven rotor. This is because it weighs a lot. Section B is the section after the drive pulse is applied, and the rotor rotates due to inertia and vibrates until it stops at a stable position.At this time, in this section, the P-channel MOS transistors of the drive inverters 14 and 15 in FIG. Since it is turned on, an induced current flows to the coil 4 in response to the movement of the rotor in a loop between the coil 4 and this transistor. This is why the waveform in section B in FIG. 4 is pulsating. Therefore, the shapes of the drive current waveform and the induced current waveform after driving can substantially correspond to the rotational position of the rotor.

Now, waveform 20 and waveform 20 in FIG. 4 are a series of waveforms, and this is the case when the load on the rotor is very small. Waveform 22 and waveform 22' are also a series of waveforms, and in this case, the load on the rotor is large and is close to the operating limit of the rotor, while waveform 21 and waveform 21' are at a load of approximately 1/2 of the maximum allowable load. This is the case when multiplied by . If you carefully observe the current waveform when the load is changed in this way, you will see that the waveform extends to the right as the load increases.
This is because the rotation of the rotor slows down as the load increases, and it has been experimentally confirmed that the rotor vibration frequency and amplitude become low until it stops at a stable position. Considering this phenomenon in reverse, it can be understood that if the load on the rotor is always in a no-load state, the rotor can be driven with a short pulse width of 7.8 msec. In fact, even if the pulse width is shortened, the motor still operates and the output torque decreases. This situation is shown in FIG. Figure 5 shows the output torque characteristic T when changing the drive pulse width.
This represents the power consumption characteristic I.

The aforementioned driving pulse width of 7.8 msec corresponds to P ₂ in this figure. That is, the output torque is T ₂ with a pulse width of P ₂ and the power consumption is I ₂ . As mentioned above, this output torque T ₂ is set so as to be able to sufficiently withstand the load encountered by the watch body. However, if the load on the rotor is small or negligible, the output torque can be small, the drive pulse width can be shortened, and the power consumption can be reduced. For example, P ₁
If the _rotor is driven with a pulse width _of When a large load is applied, driving with a wide pulse width can significantly reduce power consumption. As mentioned before, the overwhelming majority of people are in a no-load state, so the effect of reducing power consumption is very large. For example, as shown in Figure 5, when there is no load (20 hours), the pulse width is P ₁ , and when there is a load (4 hours), the pulse width is P 1.
If it is driven with a pulse width of P ₂ and I ₁ /I ₂ = 1/2, the average power consumption is I = I ₂ × 20 + I ₂ × 4/24 = 14/24 _{I 2} ≒ 0.58 I ₂ , and it is always Compared to the conventional method that drives with a pulse width of P ₂ , it requires less than 60% of the power, resulting in a significant reduction in power consumption.

However, if the watch is controlled using two pulse widths, P ₁ and P ₂ , if the load increases even slightly, it will have to be driven with the pulse width P ₂ , and the current consumption will tend to vary depending on the conditions in which the watch is carried and the environmental conditions. Therefore
A pulse width P ₃ between the pulse widths P ₁ and P ₂ is set to obtain an output torque T ₃ that can withstand a normal load, such as a load caused by a calendar mechanism. By doing this, the motor is driven with the pulse widths of P ₁ and P ₃ except in special cases, such as when a load from a calendar mechanism, a load from a disturbance, and a load from extremely low temperatures are applied at the same time. Therefore, the power consumption can be further reduced than the above-mentioned current consumption, and variations in current values can also be suppressed.

By the way, although it was briefly mentioned above that "the load is detected...", it goes without saying that this method of detecting the load is a major point of the present invention. Next, a method for detecting this load will be described. Looking at the current waveform flowing through the coil in FIG. 4, it can be seen that the current waveform changes as the load increases. That is, in drive section A, the positions of maximum and minimum shift to the right as the load increases. The magnitude of the load can be determined by focusing on this point, but the amount of change in this waveform is extremely small, making it difficult to absorb variations in mass production, and requires extremely delicate control.

Therefore, the present invention focused on section B after application of the drive pulse. Also in this section B, as the load increases, for example, the point where the minimum value is first shifted to the right. Moreover, compared to the amount of change in the waveform in section A,
A change several times larger can be obtained. Therefore, it is easier to detect the magnitude of the load based on the induced current waveform in this section B than in the above-mentioned section A, and the reliability is also higher. This phenomenon also occurs when the driving pulse width is shortened, and the situation is shown in FIG. The drive shown in Fig. 6 has a narrower drive pulse width than that shown in Fig. 4, so it can only withstand a small load. Drive current waveform 24 during load
Similarly, the relationship with the induced current waveform 24' after driving is as follows:
It is similar to FIG. The load is detected by the method described above, but the configuration of the present invention uses three motor drive pulses.
These three drive pulses are set as the first drive pulse, the second drive pulse, and the third drive pulse in order from the one with the narrowest pulse width.When the load on the motor is a small electric load, the first drive pulse is used. The load size is always detected by the induced current waveform after driving, and when the load is small enough, driving is continued with this first drive pulse, and when the load increases and approaches the limit of the first drive pulse. If it is determined that
Or, if the load suddenly becomes excessive and the motor does not operate, it will continue to perform corrective driving with a wide pulse width, and then drive with the second driving pulse width during the next drive, and then the induced current waveform after driving as before. The large load is detected by
When the load becomes large and it is determined that driving becomes difficult even with the second drive pulse width, the third drive pulse is used from the next drive, and when the load is reduced, the first drive pulse is used. This will be explained in more detail with reference to FIG.

FIG. 7 is a block diagram showing the configuration of the present invention, where 25 is a time standard oscillator, 26 is a circuit including an oscillation circuit, a frequency dividing circuit, etc., 27 is a pulse motor drive circuit, and 28 is a pulse motor. The configuration is the same as a conventional electronic wristwatch. Reference numeral 29 denotes a load detection circuit that detects the load based on the induced current waveform after application of the drive pulse, as explained in FIGS. 4 and 6. 3
0 is a control circuit that controls the drive of the pulse motor 28 according to the state of the load detected by the load detection circuit 29. Three drive pulses are prepared in advance and each drive is controlled according to the size of the load. Control to supply pulses. This control method is used in the eighth
This will be explained with reference to the diagram. FIG. 8 shows the state of the driving pulses. As mentioned in the section on the pulse motor, the motor is supplied with inverted pulses, so these are shown as pulses 31 and 32. pulse 3
1 and 32 are first drive pulses in a no-load state.
After applying the pulses 31, 32, the detection circuit of FIG. 7 detects a load condition, which in this case is a no-load condition or a slight load condition. That is, since the load detection after pulse 31 was determined to be no load, the next pulse 32 was also supplied with the first drive pulse, and the load detection after this pulse 32 was also determined to be no load, so the next pulse 33
also serves as the first drive pulse. Then, in the load detection after pulse 33, it was determined that the load state was close to the limit that could withstand the first drive pulse. In this case, within several tens of milliseconds after the pulse 33, a correction drive pulse 34 with a wide pulse width is applied with the same polarity as the pulse 33 (that is, the same current direction). And the next drive pulse 3
5 is supplied with the second drive pulse. Furthermore, load detection is performed in the same manner after the pulse 35, and if the load is moderate enough to withstand the second drive pulse, the second drive pulse is also supplied for the next pulse 36. Similarly, the second drive pulse was supplied for the next pulse 37, but the load detection caused a large load and the second drive pulse approached the drive limit, so a correction drive pulse 38 with a wide pulse width was again applied as before. pulse 37
is applied with the same polarity as. and the next pulse 90
is supplied with the third drive pulse. Further pulse 9
Even after 0, the load is detected, and if the load is large, the third drive pulse is also supplied as the next pulse 91. Similarly, for pulse 92, the third drive pulse was supplied, but it was determined that there was no load in the load detection after application, so the next pulse 93 was supplied with the first drive pulse. 95 and 96 are first drive pulses, and pulse 97 is a correction drive pulse, pulse 9.
8, 99, and 100 are second drive pulses, and pulses 101 and 102 are first drive pulses. These characteristics are obvious from the above explanation without needing to be explained again. To explain the relationship between the pulse 33 and the pulse 34, when a large load is detected by driving the pulse 33, the pulse 34 with a wide pulse width is applied after several tens of milliseconds. This is because the load is determined to be large when the load is detected after pulse 33, but it is difficult to determine whether the rotor has operated at this time, because the induced current waveform in Figure 6 shifts to the right as the load increases. Attenuate. When the rotor does not operate, no induced current is produced, but it is difficult to distinguish this from the situation in which the rotor operates smoothly when the load is close to its limit.
If the load increases gradually, even if the load is determined to be large, the rotor will still be operating at the pulse 33 at that time, and if the load suddenly becomes too large to be driven by a narrow pulse width, the rotor will not operate at the pulse 33. It doesn't work. It is difficult to distinguish between the two. Therefore, it is easy to set the load detection after pulse application so that there is some margin.

In this configuration, pulse 34 is applied, pulse 3
When the rotor operates in step 3, the pulse 34 is a pulse in the same direction as the pulse 33, so this pulse 34 becomes a pulse with the opposite phase, and the rotor does not rotate. Further, when the rotor is not operated by pulse 33, it is driven by pulse 34. At this time the number
Although the rotor will be driven with a 10msec delay, this will not be visually recognized as the operation of the second hand, and there is no need to worry about unsightliness caused by this.

Next, in this configuration, three drive pulses are prepared in advance and each drive pulse is supplied according to the size of the load. In addition to the simple reason that even though the configuration is more complex, it is possible to use even less electricity, the performance required of the motor, i.e., the maximum output, takes into consideration all the conditions that the watch will encounter, and the harsh conditions for the motor are all weighed down at the same time. Even under the worst-case conditions, there is some leeway. However, in reality, such worst-case conditions do not occur very often, and the probability is very small. Therefore, in the present invention, the first drive pulse is a pulse that is sufficient to obtain the output necessary for the minimum operation of the watch, and the second drive pulse is a pulse that is sufficient to withstand only one load applied to the rotor, such as a calendar mechanism. By using a pulse that can obtain an output and a pulse that can withstand the worst conditions for the third drive pulse, the first drive pulse and second drive pulse can be used for most of the work, and two or more loads can be applied at the same time. It is extremely small when it occurs. Therefore, the power consumption for driving the motor is extremely small, and it can be said to be the most rational and effective driving method. The configuration of the present invention has been described above. Next, specific embodiments of the present invention will be described. FIG. 9 is an example of a load detection circuit and a drive pulse control circuit of a timepiece according to the present invention. In Figure 9, 25 is an oscillation circuit, 26
is a frequency dividing circuit, 28 is a motor, 27 is a drive circuit, and 29 is a motor load state detection circuit.
Hereinafter, the circuit elements will be explained one by one. 39
The NAND GATE output is the clock for creating the first drive pulse when driving the motor in a no-load state.
Generates a clock pulse delayed by sec. At this time, the delay flip-flop 42 delays the input 1 second signal by 5 msec and outputs it, so the gate 46
A narrow pulse with a width of 5 msec is generated at the output. Similarly, the output of NAND GATE 45 is a clock for creating the second drive pulse, and the output of flip-flop 50 is
For example, the output of the gate 51 generates a clock pulse delayed by 6 msec with respect to the 1 second signal, so that a pulse with a width of 6 msec is obtained at the output of the gate 51. This is assumed to be the second drive pulse. The flip-flop 44 is a delay flip-flop which receives a 128 Hz clock as input, and its output is delayed by 7.8 msec with respect to the input 1 second signal. Therefore, a pulse with a width of 7.8 msec is obtained at the output of the gate 47, which is used as the third drive pulse at the time of heavy load. The gates 40 and 52 are clocks because they generate pulses for determining the no-load state and the loaded state for the time until the minimum portion of the current waveform generated by the rotor operation appears after the application of the drive pulse. The gate 40 is for determining the first drive pulse and the second drive pulse, and the gate 52 is for determining the second drive pulse and the third drive pulse. And by the same action as 42 and 44, 43
The determination reference pulses are obtained at the outputs of and 48, 103, and 104.

10 corresponds to the output first drive pulse of the gate 46, and 59 corresponds to the determination reference pulse of the gate 48 output. The gate 41 is a correction pulse generating circuit, and the pulse width is a wide pulse of 7.8 msec, and the generation position is delayed by, for example, 30 msec with respect to the pulse of the gate 46 or 47. An example is shown in FIG. 1066. The input terminal 57 of the gate 41 is a correction signal which will be described later, and only when the correction signal becomes HIGH, a correction pulse is generated at the output of the gate 41 and supplied to the subsequent stage. Gate 39, 40, 41,
Input signals 45 and 52 are signals for obtaining the pulses, and the outputs of the counter 26 are appropriately combined. The gates 89 and 49 are circuits that separate the pulses and output them alternately every second to the driving inverters 14 and 15. Flip Crochet 1
05 and 106 are for selecting the drive pulse to be supplied to the motor, and when the motor is driven by the first drive pulse, flip blocks 105 and 106 are used to select the drive pulse to be supplied to the motor.
Both outputs Q of 06 are LOW and ANDGATE10
The output of 7,108 is also LOW, so GATE47,5
1 is closed. When the load on the motor increases and the first drive pulse approaches the limit, a correction drive pulse is issued to the output of gate 41, and the outputs Q of flip-flops 105 and 106 both become high, and the output of ANDGATE 107 becomes high, so that the gate 51 is opened and the second drive pulse is supplied. When the load increases further and approaches the drive limit of the second drive pulse, a further corrective drive pulse is issued to the output of gate 41, and flip-flop 1
The output Q of 06 becomes LOW, ANDGATE108
The output of the third
A drive pulse is supplied. Note that when the motor is being driven by the second drive pulse or the third drive pulse and the load becomes small, a signal is generated at the output of the gate 110, as will be described later, and the output Q of the flip-flops 105 and 106 is returned to LOW and the first drive is started. Returned to pulse drive.

Next, block 29 is a circuit that detects the motor load from the operating state of the motor after applying the drive pulse, and gate 109 is a gate that determines whether or not the drive load has increased with the first drive pulse and the second drive pulse. , the gate 110 is a gate that determines whether or not there is no load during driving with the second driving pulse and the third driving pulse. The former will be explained below. Reference numerals 53 and 54 are transmission gates that alternately select the outputs of the drive inverters 14 and 15 in accordance with the drive signal.

The outputs of 53 and 54 are combined and input to a differential amplifier 55 via a capacitor. Of the output signals 53 and 54, waveforms in a no-load state and a waveform in a loaded state are shown in FIGS. 60 and 61, respectively. The differentiating circuit operates as a peak detector in this case, and the signal obtained by passing the differentiating circuit output through an inverter becomes a rectangular wave that is inverted at each peak. can get. The circuit gate 56 detects the falling position of the signals 62 and 64 after application of the drive pulse, and output signals 63 and 65 are obtained. A state in which this falling position is included in the determination reference pulse 59 is determined to be a no-load state, and a state in which this falling position is not included in the pulse 59 is determined to be a loaded state. 65 is clearly determined to be in a loaded state, and 57 becomes HIGH. As a result, for the case of waveform 61, a correction pulse 66 is subsequently applied, which completes the rotation of the rotor. However, as mentioned above, 6
This also includes the case where the rotation of the rotor is completed before 6 is applied. The correction pulse 66 changes the output Q of the flip-flops 105 and 106 as described above.
The second drive pulse is supplied from the next drive by setting it to High. Furthermore, during driving with this second drive pulse, the gate 109 determines whether or not the load has increased in exactly the same manner as above, and if the load has increased, a correction drive pulse is also issued from the gate 41.
From the next drive, the third drive pulse will be used. By the way, gate 1 is being driven by the second driving pulse.
At step 10, it is determined whether or not there is no load. That is, if the first minimum value of the induced current waveform after the application of the drive pulse is completed within the time set by the gate 52, a signal is generated at the output of the gate 110 indicating a no-load state, and the flip-flop 10
The output of 5, 106 is set to LOW, and the first drive pulse is supplied from the next drive. This is done in exactly the same way during drive with the third drive pulse.
However, while driving with the third drive pulse, the gate 109 is closed, so 57 is in the LOW state, and no correction drive pulse is output. This is because the motor has the maximum output torque required for performance when driven by the third drive pulse. In this embodiment, a common gate 109 is used to determine whether or not the load has increased during driving with the first and second drive pulses, but as can be understood from the above explanation, the load has increased. When driving with that drive pulse width approaches its limit, the minimum value of the induced current waveform gradually lags behind. This is because it is a common phenomenon when the driving pulse width is wide or narrow. Furthermore, while driving with the second and third drive pulses, a common gate 110 was used to determine whether or not there was a no-load state, but this was allowed by the performance of the motor of this embodiment. That is, Fig. 11 shows the actual measurement of the drive current waveform and induced current waveform while changing the pulse width of the motor in the no-load state of this embodiment, except when driving at the narrow pulse width 111, which is the operating limit. longer pulse width 112,1
13 and 114, the first minimum value 115 of the induced current waveform after driving is almost the same value. Therefore, it was possible to commonly determine whether or not there was no load during driving with the second and third drive pulses. Therefore, when the present invention is applied to a motor different from this embodiment,
Since there may be cases where such commonization is not possible, such changes are naturally included within the scope of the present invention. In FIG. 9, a control circuit 30, a waveform shaping circuit 30 included in the control circuit 30, a discrimination circuit 30b, and a selection circuit 30c are each shown surrounded by a frame. The waveform shaping circuit 30a includes a GATE 39, a flip-flop 42, an inverter 120, a gate 46, which are used to shape a 5 msec drive pulse, a GATE 45, a flip-flop 50, which is used to shape a 6 msec drive pulse,
Inverter 120, gate 51 and further 7,8m
It is composed of a flip-flop 44, an inverter 121, and a gate 47, which are used to form a drive pulse of sec. Also, the discrimination circuit 30b
is flip-flop 105 and 106 and ANDGATE
It is composed of 107 and 108. A selection circuit 30c that selects one drive pulse from three types of drive pulses formed by the waveform shaping circuit 30a according to the output of the discrimination circuit 30b is constituted by gates 46, 51, and 47. The control circuit 30, load detection circuit 29, drive circuit 27, pulse motor 28, oscillation circuit 25, and frequency division circuit 26 correspond to those shown in FIG. 7, respectively.

As the peak detection circuit, various systems can be considered in addition to the 55 differential amplifier circuit. Figure 19 is a block diagram of a peak detection circuit using a delay circuit.
In the figure, 53 and 54 are transmission gates, 8
0 is a general amplifier replacing 55 in FIG. 9, 81 is a delay circuit, and 82 is a comparator to which the outputs of 80 and 81 are input. An example of the amplifier 80 is shown in FIG. 14 or 15. Motor drive detection waveform 2 mentioned above
3, 24, etc. are signals of several mV to several tens of mV that are substantially generated near the power supply level, so resistor 6 is used.
The voltage is divided by 6 and 67 and converted to the input operating level of the amplifier. At the terminal 68, the waveform shown in FIG. 17 76 appears. FIG. 15 is a circuit improved from FIG. 13, in which a MOS transistor is inserted in place of the resistor 67, and the channel impedance of the transistor 69 is controlled so that the amplifier input level becomes the operating level. Block 7 with
0 is a circuit that detects the output level. FIG. 16 shows a simple embodiment of the delay circuit 81, in which 71,
73 is a transmission gate, and 72 and 74 are load capacitors. In this case, the input signal 76 at terminal 68 is delayed as 77 at the output terminal. FIG. 18 schematically represents this waveform, and the input signal 76 is connected to the transmission gate 7.
1, it is transmitted to the capacitor 72 and the terminal voltage waveform of 72 becomes 79. Furthermore, a waveform 77 appears at the output terminal 75 by the transmission gate 73. Comparator 82 outputs a rectangular signal shown at 78 when waveforms 76 and 77 are input.

As the delay circuit, the one shown in FIG. 16 is suitable, but since the input signal frequency is relatively low, a bucket brigade type data transfer element or the like is also suitable.

It has been confirmed that the load detection method of the present invention operates effectively even in the case of magnetic fields or shocks applied to the watch body. FIG. 20 shows a detected current waveform when a DC magnetic field is applied in the direction of the coil of the pulse motor. 83 is a case where the directions of the magnetic field induced in the motor inner core by an external magnetic field and the driving magnetic field are opposite to each other, and 84 is a case where both magnetic fields are in the same direction.

At 83 and 84, waveforms 85 and 86 have zero external magnetic field, and can be considered to be substantially the same waveforms. 87,
88 is a waveform when the external magnetic field is 40 Gauss. According to the waveform, the operation in the direction 83 becomes more difficult as the external magnetic field becomes stronger, and exhibits the same characteristics as the operation when the load becomes large. Therefore, the timepiece circuit according to the present invention exhibits effective operation even under the influence of external magnetic fields, and it has been experimentally confirmed that the strength against external magnetic fields is no different from that of conventional timepieces. Second
In the case of FIG. 87, since the minimum position of the waveform appears after the determination reference pulse, a correction signal indicated by 87' is added. From the above explanation, it can be easily inferred that the present invention has an effective effect on impact resistance as well.

Although the embodiments of the present invention have been described in detail above, the present invention is not limited to the embodiments described here, and various improvements and modifications can be made. For example, the electromechanical conversion mechanism is not limited to the pulse motor described here. A conversion mechanism other than a motor may be used, and even a pulse motor shown in FIG. 12 among pulse motors can be used with exactly the same configuration. The pulse motor in Fig. 12 has a rotor 10
0 is made of a permanent magnet, and the stator 101 is the first stator.
Unlike the figure, it is a single body without a gap and has a notch 10 for determining the static position of the rotor.
2,103 are formed. 104 is a drive coil. In such a pulse motor, since the stator 101 is connected, the induced current after driving is slightly different from that in FIGS. 4 and 6, as shown in FIG. 12. However, the waveform 105,1 at no load
It will be understood that the relationship between the waveforms 106 and 106' under a 05' load is basically the same and can be realized in the same manner. Furthermore, it is obvious that there may be three or more types of drive pulses.

[Brief explanation of the drawing]

FIG. 1 shows an example of a pulse motor for an electronic wristwatch according to the present invention. 2 and 3 show conventional circuit configurations, and FIG. 4 shows a current waveform of a pulse motor drive coil in a conventional timepiece. FIG. 5 is a diagram showing the relationship between output torque and power consumption with respect to the drive pulse width of the pulse motor. FIG. 6 shows the coil current waveform when the motor is driven with a pulse width narrower than the conventional drive pulse. FIG. 7 shows a circuit block of a timepiece according to the invention. FIG. 8 is an example of a time chart of motor drive pulses by the circuit according to the present invention. FIG. 9 shows a specific example of the block circuit shown in FIG. FIG. 10 is an example of a time chart of the load detection section in FIG. 9. FIG. 11 shows the drive current waveform and induced current waveform when the drive pulse is changed. FIG. 12 shows an example of a pulse motor for an electronic wristwatch according to the present invention. FIG. 13 shows a coil current waveform during narrow pulse driving in the pulse motor of FIG. 11. 14 to 19 show other examples of the load detection section in FIG. 9.
FIG. 20 shows changes in the coil current waveform when a DC magnetic field is applied to the electronic wristwatch according to the present invention. 25... Oscillation circuit, 26... Frequency dividing circuit, 27...
... Drive circuit, 28 ... Motor, 29 ... Motor load detection judgment circuit, 30 ... Control circuit, 31 to 33
... Narrow pulse drive signal, 34 ... Correction signal, 35
...Wide pulse drive signal, 59...Load judgment reference pulse, 60...No load detection signal, 61...Load detection signal.

Claims (1)

[Claims] 1. An oscillation circuit 25, a frequency division circuit 26 that divides the frequency of the output of the oscillation circuit, a drive circuit 27 that operates based on the output signal of the frequency division circuit, and a coil, a stator, and a permanent magnet rotor, and is driven by the drive circuit. In an electronic watch equipped with a pulse motor 28, a load detection circuit 2 is connected to the coil and detects an induced current generated in the coil.
9, and a control circuit 30 connected between the frequency dividing circuit 26 and the drive circuit 27 and controlled by the load detection circuit 29, the control circuit forming at least three types of drive pulses. a waveform shaping circuit 30a for determining the next drive pulse to be outputted from among the at least three types of drive pulses in accordance with the output of the load detection circuit; An electronic timepiece characterized by comprising a selection circuit 30c that selects one of at least three types of drive pulses.