JPS61290554A - チヤネル装置 - Google Patents

チヤネル装置

Info

Publication number
JPS61290554A
JPS61290554A JP60133403A JP13340385A JPS61290554A JP S61290554 A JPS61290554 A JP S61290554A JP 60133403 A JP60133403 A JP 60133403A JP 13340385 A JP13340385 A JP 13340385A JP S61290554 A JPS61290554 A JP S61290554A
Authority
JP
Japan
Prior art keywords
address
ram
data
dat
page
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60133403A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0370258B2 (enExample
Inventor
Junichi Kihara
淳一 木原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60133403A priority Critical patent/JPS61290554A/ja
Priority to US06/874,995 priority patent/US4797812A/en
Publication of JPS61290554A publication Critical patent/JPS61290554A/ja
Publication of JPH0370258B2 publication Critical patent/JPH0370258B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Memory System Of A Hierarchy Structure (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
JP60133403A 1985-06-19 1985-06-19 チヤネル装置 Granted JPS61290554A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP60133403A JPS61290554A (ja) 1985-06-19 1985-06-19 チヤネル装置
US06/874,995 US4797812A (en) 1985-06-19 1986-06-16 System for continuous DMA transfer of virtually addressed data blocks

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60133403A JPS61290554A (ja) 1985-06-19 1985-06-19 チヤネル装置

Publications (2)

Publication Number Publication Date
JPS61290554A true JPS61290554A (ja) 1986-12-20
JPH0370258B2 JPH0370258B2 (enExample) 1991-11-07

Family

ID=15103932

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60133403A Granted JPS61290554A (ja) 1985-06-19 1985-06-19 チヤネル装置

Country Status (1)

Country Link
JP (1) JPS61290554A (enExample)

Also Published As

Publication number Publication date
JPH0370258B2 (enExample) 1991-11-07

Similar Documents

Publication Publication Date Title
US4797812A (en) System for continuous DMA transfer of virtually addressed data blocks
US3688274A (en) Command retry control by peripheral devices
US4025906A (en) Apparatus for identifying the type of devices coupled to a data processing system controller
JPS6376034A (ja) 多重アドレス空間制御方式
US4419725A (en) Cache/disk subsystem with tagalong copy
US4607328A (en) Data transfer apparatus for a microcomputer system
JPS5821308B2 (ja) ルツクアヘツド・コントロ−ル装置
US5155814A (en) Nonsynchronous channel/dasd communication system
US3787815A (en) Apparatus for the detection and correction of errors for a rotational storage device
US4885679A (en) Secure commodity bus
JPH0470649B2 (enExample)
JPS5848288A (ja) デ−タ記憶レジスタのアドレス方法及び装置
US5168558A (en) Apparatus and method for providing distributed control in a main memory unit of a data processing system
JPS61290554A (ja) チヤネル装置
JPS6319058A (ja) メモリ装置
US6799293B2 (en) Sparse byte enable indicator for high speed memory access arbitration method and apparatus
JP2600376B2 (ja) メモリ制御装置
JPH08328995A (ja) Ｄｍａ転送方式およびｄｍａ転送方法
JPS61290553A (ja) チヤネル装置
JPS61290552A (ja) チヤネル装置
JPS5834856B2 (ja) キオクセイギヨソウチ
JPH05108493A (ja) メモリ制御方式
KR880000995B1 (ko) 기억장치
JPS63197254A (ja) 仮想記憶制御装置
JPS5985564A (ja) デイスクコントロ−ル装置

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees