JPS61271877A - Manufacture of josephson element - Google Patents

Abstract

PURPOSE:To reduce internal stress when a Josephson structure is formed, by making a seat, which is formed on a substrate, thick, and making a lower superconducting layer formed thereon thin. CONSTITUTION:A seat forming material layer 21 is evaporated on the entire surface of a silicon substrate 20. Etching is performed in accordance with a pattern arranged on a horizontal plane. a seat 22 is formed at a specified position, where each Josephson element is formed. Nb is sputtered, and a lower superconducting layer 31 is formed. An Al film is sputtered thereon. Then oxygen is introduced, and Al2O3 film is formed. Thus a tunnel-barrier forming insulating layer 32 is obtained. After the oxygen is exhausted, Nb is further sputtered on the Al2O3 film, and an upper superconducting layer 33 is formed. Thus a Josephson junction structure 34 is obtained. A photoresist layer is attached on the upper surface of the upper superconductive layer 33. a remaining resist part 40 is made to remain, and the other part of the Josephson junction structure 34 undergoes dry etching. Thus a Josephson element 60 comprising a lower electrode 50, a tunnel barrier 51 and an upper electrode 53 is obtained.

Description

[Detailed Description of the Invention] <Industrial Field of Application> The present invention relates to a method for producing a di-Zehun element, and in particular,
This invention relates to an improvement in a cutting method in which individual minute Josephson elements are cut out according to a predetermined pattern from one large Josephson junction structure.

<Prior art> As is well known, Josephson elements are generally made of silicon S.
A lower electrode (base electrode) is placed on a suitable substrate represented by i.
Electrode), tunnel barrier.

The upper electrode (counter electrode) is laminated in order, and the manufacturing method can be roughly divided into two methods.

One method relies on the lift-off method, which has a relatively long history in the production of semiconductor integrated circuits and the like.

However, this method has the drawback that the photoresist exposure and development process for each layer formation, and the residual resist removal process during lift-off, can cause contamination of the layer that has already been formed below the layer. Even if a cleaning process is unavoidably added, it is impossible to clean on the atomic layer order, so in the end, variations in physical and electrical properties occur in the tunnel barrier layer of each Zeffson element. This caused sticking and deterioration.

On the other hand, as a second method, the fabrication process of each layer can be performed continuously without breaking the vacuum, and therefore, in principle, a fairly good tunnel barrier can be obtained. There is a so-called cutting method disclosed by the applicant in Japanese Patent Application No. 80570/1983.

The details are detailed in Japanese Patent Application Laid-Open No. 178182/1982, but a brief explanation will be given here with reference to FIG. 3.

First, as shown in FIG. 3(A), a silicon substrate 11
A planar lower electrode layer 12 made of a suitable superconductor material such as lead alloy or niobium is formed over a large area, generally the entire surface.

Next, a planar tunnel barrier layer 13 and a planar upper electrode layer 14 are successively formed thereon, and as shown in FIG. I end up making this.

In particular, at this time, the equipment 1, such as a vacuum evaporation equipment or high-frequency sputtering equipment, that was first used to create the planar lower electrode layer 12 is used in the same way when forming each subsequent layer, and each step is completed semi-finished. The steps up to FIG. 3 CB) are made into a series of continuous steps without taking the product out of the device, in other words, without breaking the vacuum inside the device.

Therefore, the tunnel barrier layer 13 inside the structure 15 is not exposed to problems such as contamination during the manufacturing process.
It becomes extremely uniform and good.

In this conventional method, the tunnel barrier layer 13
After ensuring the completeness of This is done by photolithography rather than traditional cutting.

That is, after applying a suitable photoresist N8 on the entire surface of the planar upper electrode [114], a predetermined resist portion 16 is coated so as to leave a resist portion 16 corresponding to the area required for the lower electrode of each completed Josephson element. The photoresist 1B is exposed and developed according to the pattern.

Although only one remaining resist portion 1B is shown in FIG. 3(C) showing the result, since generally a large number of Zefson elements are integrated on the substrate 11, , the remaining resist portions 18 are also left at a plurality of locations in accordance with the planned planar arrangement pattern of the large number of Josephson element groups.

After this, unnecessary portions of the planar upper and lower electrode layers and the tunnel barrier layer are removed, preferably by dry etching, to obtain the structure shown in FIG. 3(D). Each remaining portion 12', 13', 14 of each layer remaining at this point
In ', the lower electrode 12' corresponds in area to the lower electrode necessary for the element to be finally produced.

However, the remaining portion 14' of the upper electrode and the corresponding remaining portion 13' of the tunnel barrier layer 13 may be further reduced in area if necessary.

In that case, remove the remaining resist portion 18 from the previous step,
Patterning is performed on the newly applied resist,
P! As shown in the IJS diagram (E), after leaving the resist portion 17 of the area required for the upper electrode, the upper Toden MAy
After removing unnecessary areas of the remaining portion 14' of the tunnel barrier layer 13' and the remaining portion 13' of the tunnel barrier layer to obtain the structure shown in FIG.
As shown in figure (G), tunnel R wall I of a predetermined area
3" and an upper electrode 14" having a predetermined area, a Josephson element 18 having the required structure is obtained.

(Problems to be Solved by the Invention) As described above, the Josephson element manufacturing method shown in FIG. It is true that a good and uniform planar tunnel barrier layer 13 can be obtained, and this has actually been confirmed from the voltage-current characteristics of the Josephson junction structure 15.

Furthermore, this conventional method has the advantage of increasing productivity because it employs a continuous process and cuff cleaning treatment can be omitted in the middle of the process.

However, when each Josephson element cut out from this structure 15 was carefully inspected, it was found that it was in good condition depending on the material and thickness of each layer forming the structure 15, especially the lower electrode. The supposed tunnel failure l1113”
A result appeared that indicated that some kind of problem had occurred.

For example, let's look at Figure 4. Figure 4 (^) is similar to Figure 3 (
The thickness of the upper and lower planar electrode layers in step B) is 200 mm.
From the structure 15 made of OA niobium Nb and the tunnel barrier layer made of aluminum oxide^I2O3, 2 pieces were cut out for each piece on the same silicon substrate by the above-mentioned conventional cutting method.
．． This is a current-voltage characteristic (1-V characteristic) obtained by fabricating 100 5% O 1-port Josephson elements in series, and is an accurate trace of an oscilloscope photograph.

As a result, the characteristics obtained with this element array are as follows.

The inherent hysteresis characteristic expected of this type of Josephson junction, as it should be, is not seen at all.

For example, there is no concept of critical current value Io, and zero voltage state (
(its own existence is not certain), the gap voltage V
The transition to the voltage state that is supposed to be defined by g follows an ohmic curve.

In addition, the gap voltage Vg is also approximately 2.8 mV per Josephson junction made of the above material, so although it is written in the figure as approximately 280 mV after multiplying by 100, in reality it is not accurate. It is impossible to read the voltage directly, and it must be considered that there is no point in the characteristic where the return from the voltage state to the zero voltage state or the origin O, which is generally called the knee point, begins.

Figure 4 (B) uses the same thickness, material, and manufacturing method as the Zefson element with the characteristics shown in Figure 4 (A), except that only the planar dimensions have been changed to 1 square inch per piece. The current-voltage characteristics were obtained by fabricating 100 devices in series on the same silicon substrate.

In this characteristic, a hysteresis characteristic shape unique to this type of Josephson element is created, and the critical current value IO
can be read as approximately 560 volts, the gap voltage Vg can be read with some degree of clarity as approximately 2801 V, and the existence of the second point Pk can also be recognized.

However, this is not a desirable characteristic. Generally speaking, the sharper the bend, the more desirable the point Pk is. The angle of inclination with respect to the voltage axis of the path from one point Pk to the origin 0 is also relatively large, which suggests that the tunnel barrier contains ohmic properties that should not originally exist.

In this way, when using the conventional method as shown in FIG. 3, the structure 15 as one large Josephson junction.
Although an extremely good and homogeneous di1 Zefson tunnel barrier layer is obtained at the stage of the process, when individual Josephson devices are cut out from it, these advantages are no longer present in the completed Josephson device. In some cases, mysterious results may occur.

The present invention recognizes this as a fact and attempts to provide a solution to this problem.

In other words, the present invention is superior in principle to rJ4
This was done to correct the shortcomings and enhance only the strengths of Josephson's method of creation, as shown in Figure 3.

<Means for Solving the Problems> In order to achieve the above object, the present inventors first searched for the cause of the characteristic deterioration due to the above cut-out from various viewpoints.

As a result, it was found that individual Josephson junctions 18 can be separated from the large Josephson junction structure 15 as described above.
The deterioration in properties that appears when the structure 15 is cut out by photo-phosphorography is apparently due to mechanical stress accumulated within the structure in relation to the silicon substrate 11, that is, internal stress, at the time the structure 15 was formed. This may be one of the causes.

For example, if a large Josephson junction structure 15 is formed on the entire surface of the substrate 11 up to the stage shown in FIG.
° may occur. This clearly indicates that there is a physical interaction between the substrate and the planar lower electrode layer that is directly connected to it, and as a result, extremely large stress is accumulated within the structure. There is.

Therefore, if this hypothesis is correct, then photo
When cutting out individual Josephson elements by applying lithography, since the area of the Josephson elements on each side is extremely small compared to the substrate area, it is natural that substantially most of the area of the substrate will be cut out. On the other hand, since each layer is etched, both sides of the remaining element are physically opened by the etching, and the internal stress that is released all at once as energy becomes quite large, and the strain is applied to the tunnel barrier layer. This can be understood as having serious physical and electrical effects.

After thinking up to this point, I actually examined several Josephson elements from this perspective and found that this hypothesis had considerable credibility. Rather, it seems possible to assert that this internal stress release phenomenon is at least one, if not all, of the major factors that cause characteristic deterioration in the fabricated Josephson element. On the contrary, according to this, even though individual Josephson elements are simply cut out from one large Josephson junction structure, it can be well explained that the characteristics deteriorate.

From this point of view, the simplest measure to reduce the stress is to reduce the thickness of the lower superconductor layer formed on the substrate. In other words, the idea is that the thinner the layer, the less stress will be accumulated inside.

However, for example, in the Nb-based Josephson element, if the thickness of the lower electrode is set to 1000λ or less, a phenomenon may occur in which the superconductor transition temperature Tc increases.

Although the specific thickness value varies, such a phenomenon is a problem that can occur not only with this material. In other words, a lower limit is often set for the thickness of the lower electrode.

Therefore, as mentioned above, it is found that it is practically impossible to arbitrarily reduce the thickness of the lower electrode solely for the purpose of reducing internal stress.

Based on the findings from these various directions, the present inventors provide a Josephson element manufacturing method having a 5-order configuration as an improvement over the conventional cutting method.

At a predetermined location on the substrate where a desired Josephson element will be formed in the future, it has a plane dimension at least not smaller than the plane dimension required for the Josephson element, and has an appropriate thickness. forming a pedestal having a taste and forming a part of the lower electrode of the Josephson element; on a global area portion of the substrate where the pedestal is formed;
a step of sequentially laminating a lower a-conductor layer, an insulating layer for forming a tunnel barrier, and an upper superconductor layer to form one large Josephson junction structure; forming the Josephson junction structure into a desired pattern; a step of etching the Josephson element according to the above, and forming the Josephson element comprising the lower electrode, tunnel barrier, and upper electrode each having the predetermined planar dimensions on the pedestal; How to create elements.

(Function) According to the above-described gist of the present invention, the pedestal formed on the substrate becomes a part of the lower electrode of the Josephson element finally created, so if the pedestal is made sufficiently thick, The lower superconductor layer formed thereon can be designed to be sufficiently thin.

Therefore, the problem of internal stress when forming one large Josephson junction structure can be avoided without incurring the disadvantage of increasing the superconductor transition temperature Tc of the completed Josephson device.

In other words, in order to form a thick pedestal, stress is accumulated between the pedestal forming material layer and the substrate, and as a result, when the pedestal is cut out by etching or the like, the pedestal undergoes strain due to the release of stress. Even if this happens, the superconductor layer for the lower electrode formed on the pedestal will have
This effect has already passed, so it won't affect you at all.

The lower superconductor layer for the lower electrode may be sufficiently thin as described above, so that the global area on the substrate
For example, even if it is formed in a series of planes on the entire surface of the substrate, the stress accumulated inside it will be small due to the physical relationship between it and the substrate.
Thereafter, even if the stress is released by reducing the cut-out process such as etching for device formation, no serious strain will occur.

Furthermore, even if a certain amount of internal stress is accumulated in the superconductor layer for the lower electrode, the pedestal, which has already been formed as a member with sufficient physical strength, will be exposed to this stress. Acts as a resistive object.

Therefore, even when individually minute Josephson elements are cut out from a large Josephson junction structure by appropriate etching means, the effect of the release of the internal stress does not occur, or at least is minimized and the fabrication process is as simple as possible. The tunnel barrier layer in each Josephson element is not adversely affected.

(Embodiment) FIG. 1 shows a preferred embodiment of a method for manufacturing a Josephson device according to the present invention.

First, as shown in FIG. 1(A), a global area portion (
(generally on the entire surface of the substrate), it also serves as a physical support base for future Josephson devices.

In addition, in order to form the pedestal 22 which also becomes a part of the lower electrode,
As a starting layer, a pedestal forming material layer 21 is created by an appropriate method such as vapor deposition or high frequency sputtering.

In this embodiment, niobium Nb is used as the material for the upper and lower electrodes, and aluminum oxide is used as the material for the tunnel barrier.
The following description assumes that a Josephson element with 203 selected is created.

The Josephson device of this combination, especially when manufactured by the conventional method shown in FIG. 3, is susceptible to internal stress release due to the physical interaction with the silicon substrate.

Therefore, in this case, it is preferable that the material of the pedestal forming material layer 21 is selected to be Nb, which is the same as the electrode material. It may be made of other materials as long as they are of good quality.

Next, this pedestal forming material layer 21 is etched by an appropriate etching method, preferably dry etching, according to the planar arrangement pattern on the substrate of each Josephson element, and is etched at a predetermined location where each Josephson element will be formed in the future. A pedestal 22 is formed.

In FIG. 1(B) showing the results, only one pedestal 22 is shown, but of course, since a large number of Josephson elements are generally formed on the substrate 21, this pedestal 22 also has many Josephson elements. It will only take a few minutes to form.

The planar dimensions and thickness tb of the base 1%22 will be explained once again when the Josephson element is finally completed on it, but if the thickness tb is thick, the gap between the base and the substrate will be Physical distortion may occur in the pedestal due to the stress relief relationship.

However, even if this is the case, this stress release has already been solved by the time the 0 pedestal 22 is cut out, which does not affect the layered structure that is successively created in the steps described below. Because it will be.

tJS1 As shown in FIG.
As shown in Figure (C), preferably the lower superconductor layer 31, the tunnel barrier forming insulating layer 32, and the like are successively formed using the same evaporation device or high frequency sputtering device without breaking the vacuum of the device. An upper superconductor layer 33 is sequentially formed over a large area of substrate 21, generally over the entire surface.

For example, if the lower superconductor layer 31 is formed by sputtering Nb, an aluminum A1 film is sputtered on the lower superconductor layer 31 without breaking the vacuum of the sputtering equipment, and then oxygen is introduced into the equipment. Introduced the relevant A11
By oxidizing ll, ^120311I is formed,
This will be used as a tunnel barrier forming insulating layer 32 as a starting layer to be used as a tunnel barrier for each Josephson element in the future.

After exhausting the oxygen, add N on top of ^1203 M4.
b is sputtered using the same equipment to form the upper superconductor layer 33 to form the Josephson junction structure 3 shown in FIG. 1(C).
Get 4.

That is, the structure 34 configured up to this stage can be considered as one large Josephson junction placed on the substrate 21.

Except for forming one pedestal 22 in the steps up to this point, the same method as the conventional Josephson element manufacturing method shown in FIG. The insulating layer 32 as a tunnel barrier layer in the Josephson junction structure 34 is extremely homogeneous and can exhibit good electrical and physical properties.

However, in the case of the present invention, up to the above steps, since the pedestal 22 will constitute a part of the lower electrode of a Josephson element to be created in the future, the lower superconductor layer 31 formed on the pedestal 22 can be made sufficiently thinner than before.

For example, if the thickness of the lower electrode was conventionally required to be about 2000A, then the present invention is applied.

The thickness tb of the pedestal 22 is about 1500A, and the thickness of the lower superconductor layer 31 can be made as thin as about 500A.In other words, the combined thickness of both is approximately the same as the thickness of the lower electrode in the conventional element. It becomes possible to design such that it is equal to .

As a result, even if the lower superconductor layer 31 is in direct contact with the silicon substrate 20 in the part where the pedestal 22 is not present, if the lower superconductor layer 31 can be made sufficiently thin in this way, there will be a large There is almost no risk that stress will accumulate, and even if it does, it will be minimal.

On the other hand, the thickness of the insulating layer 32 for forming a tunnel barrier may be approximately the same as the conventional one, for example, about 30A, and the thickness of the upper superconductor layer 33 may also be about 2000 mm, which is the same as the conventional one. Good, because it is thought that no problematic stress relationship will occur between them.

Once one large Josephson junction structure 34 is constructed as described above, a predetermined position is set for the Josephson junction structure 34 so that each Josephson element is formed on each pedestal 22. Cut out according to the pattern.

If general photolithography is used as appropriate for this purpose, after applying a suitable photoresist layer to the upper surface of the upper superconductor F#33, as shown by the virtual line in FIG. 1(C), Then, leaving the patterned residual resist portion 40 only on a portion of the pedestal 22, in this case approximately the same size and area, and using this as an etching mask, other portions of the Josephson junction structure 34 are desirably dry etched; As shown in FIG. 1(D), a Josephson device 6o is obtained, which consists of a lower electrode 51, a tunnel barrier 52, and an upper electrode 53 stacked in sequence on a pedestal 22.

Furthermore, if it is necessary to reduce the area of the tunnel barrier 52 and the upper electrode 53, the first
As shown by the imaginary line in FIG. 1(D), a patterned remaining resist portion 41 is formed again, and unnecessary portions of the tunnel barrier 52 and the upper electrode 53 are removed using this as an etching mask. ) A Josephson element 60 having a cross-sectional configuration as shown in FIG.

As far as the method of the present invention is concerned, in the process from the stage shown in FIG. 1(C) to FIG. 1(D) and FIG. 1(E), due to internal stress,
The resulting tunnel barrier 52 is not adversely affected.
For the reason mentioned above, the physical relationship between the lower superconductor fi31 for forming the lower electrode and the substrate 20 is not such as to generate stress to the extent that it becomes a problem.

The effectiveness of the method of the present invention will be demonstrated by giving specific characteristic examples.

For comparison, a group of Josephson elements having the same dimensions, the same material, and the same number as the Josephson element corresponding to the characteristics shown in the fourth figure previously taken up in connection with the explanation of the conventional example, except for the presence of the pedestal 22, was used. It was created by invention.

That is, in FIG. 2(^), the pedestal thickness is 1500A, the lower electrode thickness is 500A, and therefore the lower electrode thickness of the Josephson element with the characteristics shown in FIG. 4(A) is approximately 2000A.
2.5Jl has a lower electrode structure with approximately the same thickness as that of a person.
It shows the current-voltage characteristics obtained when a10(r)Nb/A1203/Nb Josephson elements were formed in series on the 100 side on the same silicon substrate. As with the characteristic examples related to conventional examples, we made efforts to trace the oscilloscope photographs as accurately as possible.

As can be seen from a comparison between this figure and FIG. 4(A), the Josephson element array to which the present invention is applied exhibits an exemplary improvement effect.

The characteristic shown in Fig. 4 (A), which was far from the desired hysteresis characteristic only by the conventional method, was
The characteristics shown in FIG. 2(A) as a result of applying the present invention appear with clear hysteresis, and the two points Pk
can also be clearly identified. Moreover, it has excellent sharpness.

By the way, in this Figure 2 (A), the critical current io
can be read as approximately 20d, and the gap voltage Vg can also be clearly read as approximately 280V, which is approximately the theoretical value.

Similarly, FIG. 2(B) shows an example of characteristics taken under the same conditions as above except that only the plane dimension was changed to 10 m0.

This characteristic example is also fully satisfactory. Approximately 8
The transition region from the critical current 1o of 00jA to the voltage state is understood as a phenomenon with almost no ohmic component,
The second point Pk is so sharp that it can be seen as a literal "point". From point Pk to origin O
The return path to the gap voltage V is also sufficiently close to the voltage axis.
Of course, g shows the theoretical value of about 280V.

Furthermore, the fact that the tunnel barrier is a very good buy can be understood from the fact that the absolute value of the critical current In has improved by a fraction compared to that shown in Figure 4 (B). .

In the above embodiment, the Josephson element to be produced was of the Wb/Al2O3/Nb type, but of course there is no reason to limit it to this.As is obvious from the principle of the present invention, the As a result of the physical interaction relationship, stress is generated between the lower electrode and the lower superconductor layer for forming the lower electrode, and when this stress is released, it may cause problems in the characteristics of the cut Josephson device. At any time, the pedestal arrangement according to the invention can be used without hesitation.

In addition, the planar dimension wb of the pedestal 22 is approximately ? The size is about the same as the element size, but it may be larger. In some cases, a single pedestal may be used between multiple Josephson elements whose lower electrodes are electrically connected to each other. It is also possible to share them.

In the figure, the pedestal 22 is shown to be removed from the component part of the Josephson element 60, but as already mentioned, since this pedestal forms a part of the lower electrode 51, the pedestal Of course, it may be considered that up to 22 elements constitute one Josephson element.

Furthermore, existing techniques may be used as they are for protective layers and wiring layers that are generally arranged for the Josephson element BO, and therefore these are not shown in FIG.

Finally, for reference, Wb in the above embodiment
/AlzO3/Nb-based Josephson element, and the total thickness of the lower electrode structure is approximately 0 (approximately 2000), the pedestal thickness wb is relative to the thickness of the lower superconductor layer for forming the lower electrode formed thereon. The effect of providing a pedestal did not become significant unless it was more than twice as large.From this point of view, the optimal design value for the pedestal thickness depends on the material used and its thickness. It is understood that one can choose.

<Effects of the Invention> According to the present invention, it is possible to eliminate the drawbacks of the Zefson production method using the cutting method and to enhance only its advantages.

That is, it is possible to overcome the problem of distortion caused by internal stress release while maintaining the principle that an extremely good tunnel barrier can be obtained.

Moreover, the above-mentioned great effect can be obtained by a simple method of simply adding a pedestal structure to the existing cutting method.

[Brief explanation of the drawing]

Fig. 1 is a process diagram of a preferred embodiment of the Josephson device manufacturing method of the present invention, Fig. 2 is a characteristic diagram of two Josephson devices fabricated by the method of the present invention, and Fig. 3 is a conventional cutting method. Process diagram of Josephson production method by
The figure is a characteristic diagram of two Josephson elements manufactured by the conventional method shown in Figure 3. In the figure, 20 is a substrate, 21 is a material layer for forming a pedestal, 22 is a pedestal, 31 is a lower superconductor layer, 32 is an insulating layer for forming a tunnel barrier, 33 is an upper superconductor layer, 34 is a Josephson junction structure, 50 is a lower electrode, 51 is a tunnel barrier, 52
is an upper electrode, and 60 is a completed Josephson device. Appointed representative Director, Electronics Technology Research Institute, Agency of Industrial Science and Technology

Claims (1)

[Claims] A predetermined location on the substrate where a desired Josephson device will be formed in the future has a planar dimension that is at least not smaller than the planar dimension required for the Josephson device. forming a pedestal having an appropriate thickness and forming a part of the lower electrode of the Josephson element;
sequentially stacking a lower superconductor layer, an insulating layer for forming a tunnel barrier, and an upper superconductor layer to form one large Josephson junction structure; forming the Josephson junction structure in a desired pattern; and etching to create the Josephson element comprising a lower electrode, a tunnel barrier, and an upper electrode each having the predetermined planar dimensions on the pedestal. How to create.