JPS592390B2 - Josephson junction device and its manufacturing method - Google Patents

Josephson junction device and its manufacturing method

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Publication number
JPS592390B2
JPS592390B2 JP55181045A JP18104580A JPS592390B2 JP S592390 B2 JPS592390 B2 JP S592390B2 JP 55181045 A JP55181045 A JP 55181045A JP 18104580 A JP18104580 A JP 18104580A JP S592390 B2 JPS592390 B2 JP S592390B2
Authority
JP
Japan
Prior art keywords
thin film
superconductor thin
shaped
strip
shaped superconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55181045A
Other languages
Japanese (ja)
Other versions
JPS57104281A (en
Inventor
浩 太田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RIKEN Institute of Physical and Chemical Research
Original Assignee
RIKEN Institute of Physical and Chemical Research
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RIKEN Institute of Physical and Chemical Research filed Critical RIKEN Institute of Physical and Chemical Research
Priority to JP55181045A priority Critical patent/JPS592390B2/en
Priority to US06/315,505 priority patent/US4494131A/en
Priority to DE19813142949 priority patent/DE3142949A1/en
Priority to FR8120406A priority patent/FR2493605B1/en
Publication of JPS57104281A publication Critical patent/JPS57104281A/en
Priority to US06/540,811 priority patent/US4539741A/en
Publication of JPS592390B2 publication Critical patent/JPS592390B2/en
Expired legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/10Junction-based devices
    • H10N60/12Josephson-effect devices

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  • Superconductor Devices And Manufacturing Methods Thereof (AREA)

Description

【発明の詳細な説明】 本発明は、つくり易くしかも接合素子のサイズを小さく
保つたまゝ磁場依存性に優れたジョセフソン接合素子の
構造とその製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a structure of a Josephson junction element that is easy to manufacture and has excellent magnetic field dependence while keeping the size of the junction element small, and a method for manufacturing the same.

ジョセフソン接合素子の応用範囲は広く、小電力超高速
スイッチングの電算機用素子として、マイクロ波、ミリ
波などの高感度高速度反答の検出器として、人間の脳や
心臓から放射される微弱磁場の検出器として、あるいは
電圧標準器として使用することが提案されており、その
工業化に対する要請が日ましに増大している。本発明者
は先に、ジョセフソン接合素子の弱結合部を極限まで短
縮してその特性を改善することを可能とし、しかも容易
に同一特性の素子を大量生産し得るジョセフソン接合素
子の構成(準平面型ジヨスフソン接合素子)を提案した
(特公昭55−7712号)。
Josephson junction devices have a wide range of applications, including as low-power, ultra-high-speed switching computer devices, as detectors for high-sensitivity, high-speed responses such as microwaves and millimeter waves, and as detectors for the weak radiation emitted from the human brain and heart. It has been proposed to use it as a magnetic field detector or a voltage standard, and the demand for its industrialization is increasing day by day. The present inventor has previously discovered a configuration of a Josephson junction element that makes it possible to shorten the weak coupling part of the Josephson junction element to the utmost limit and improve its characteristics, and also to easily mass-produce elements with the same characteristics. (Japanese Patent Publication No. 7712/1983) proposed a quasi-planar Jossufson junction element.

第1図に示すように準平面型ジョセフソン接合素子では
基板1上に二つの超伝導体層2、3が絶縁体層4を介し
て部分的に向かい合いそしてこの絶縁体層4を横切つて
弱結合部5が上下の超伝導体層2、3にまたがつている
。このような構成としたので弱結合部の長さは極めて薄
い絶縁体層4の厚みに等しくなり、それ故弱結合部の長
さは絶縁体層を形成するときの絶縁物質のスパッタリン
グ又は蒸着時間を調整することによつて極めて小さくし
かも精確に制御し得る。実際には、数百〜数千A程度の
厚さの超伝導体薄膜2の上にSiO2などの絶縁物質又
は半導体をスパッタリングすることにより、或いは超伝
導層2の表面を酸化性雰囲気中で酸化することにより数
百λ程度の厚さの絶縁体層4を形成する。絶縁体層4の
厚みを横切つて上下超伝導薄膜にまたがつて数百λない
し数千λの厚さに適当な障壁物質を蒸着して弱結合部5
を形成する。このようにして上下超伝導体層2,3を接
続する弱結合部5の長さは絶縁体層4の厚みとなり、要
求されるインピーダンスの大きさに応じて数百λないし
数千人の範囲の適正値を選択することができる。このよ
うな構造としたことにより1電極部の超伝導体層2,3
の膜厚を大きく保つたま\で、弱結合部の長さを極端に
短かくでき、それによりImR』積を著しく大きくする
ことができ、2弱結合部に種々の材質を使用でき、3静
電容量を小さくでき、4上記超伝導体層3に鉛合金以外
のNb等を用いて長寿命とすることができ、そして5フ
オトリングラフイや電子ビームリングラフイを用いて容
易に量産することができるようになつたのである。
As shown in FIG. 1, in a quasi-planar Josephson junction device, two superconductor layers 2 and 3 are placed on a substrate 1, partially facing each other with an insulator layer 4 in between, and extending across the insulator layer 4. A weak coupling portion 5 spans the upper and lower superconductor layers 2 and 3. With this configuration, the length of the weak bond is equal to the thickness of the extremely thin insulator layer 4, and therefore the length of the weak bond is determined by the sputtering or evaporation time of the insulating material when forming the insulator layer. can be extremely small and precisely controlled by adjusting the . In practice, an insulating material such as SiO2 or a semiconductor is sputtered onto the superconductor thin film 2 with a thickness of several hundred to several thousand A, or the surface of the superconducting layer 2 is oxidized in an oxidizing atmosphere. By doing so, an insulator layer 4 having a thickness of about several hundred λ is formed. A suitable barrier material is deposited across the thickness of the insulator layer 4 and across the upper and lower superconducting thin films to a thickness of several hundred λ to several thousand λ to form the weak coupling portion 5.
form. The length of the weak coupling portion 5 that connects the upper and lower superconductor layers 2 and 3 in this way is the thickness of the insulator layer 4, and ranges from several hundred λ to several thousand λ depending on the required impedance. An appropriate value can be selected. With this structure, the superconductor layers 2 and 3 of one electrode part
While maintaining a large film thickness, the length of the weak coupling part can be extremely shortened, thereby making it possible to significantly increase the ImR' product, allowing the use of various materials for the weak coupling part, and 4) The superconductor layer 3 can have a long life by using Nb, etc. other than a lead alloy, and 5 can be easily mass-produced using photorin graphy or electron beam phosphoryl. It became possible to do so.

この準平面型ジヨセフソン接合素子の静電容量は、絶縁
体層4を挟んで対向している部分の超伝導体層2,3の
面積AXbによつて左右され、この面積AXbが小さく
なる程静電容量は小さくなる。
The capacitance of this quasi-planar Josephson junction element is influenced by the area AXb of the superconductor layers 2 and 3 that face each other with the insulator layer 4 in between. The capacitance becomes smaller.

ところで、第1図からも明らかなように、超伝導体層2
,3の位置ずれが、面積AXbの精度に直接影響する構
造である。そのため、静電容量を小さくしそのバラツキ
を少なくするには、フオトリングラフイ又は電子ビーム
リソグラフイを使用する際のマスク合せ精度に厳格さが
要求され、つくりにくいという問題がある。また、準平
面型ジヨセフソン接合素子では、つの帯状の弱結合部5
が絶縁体層4の厚み側面を1個所のみ横切つているだけ
であり、磁場に対する依存性は全くない。
By the way, as is clear from Fig. 1, the superconductor layer 2
, 3 has a structure that directly affects the accuracy of the area AXb. Therefore, in order to reduce capacitance and variation, strict mask alignment accuracy is required when photolithography or electron beam lithography is used, making it difficult to manufacture. In addition, in the quasi-planar Josephson junction element, two band-shaped weak coupling parts 5
crosses the thickness side of the insulator layer 4 at only one place, and has no dependence on the magnetic field.

磁場依存性をもたせるためには、弱結合部5を2本以上
並列に形成すればよいが、超伝導体層の幅aが大きなり
、接合素子のサイズも大きく静電容量も大きくなるとい
う問題がある〇本発明はこの準平面型ジヨセフソン接合
素子をつくり易くしかも接合素子のサイズを小さく保つ
たま\磁場の依存性に優れた構造にすることを目的とす
る。
In order to have magnetic field dependence, it is sufficient to form two or more weak coupling parts 5 in parallel, but there is a problem that the width a of the superconductor layer becomes large, the size of the junction element becomes large, and the capacitance also becomes large. The object of the present invention is to provide a quasi-planar Josephson junction element that is easy to manufacture, maintains the size of the junction element small, and has a structure with excellent magnetic field dependence.

この目的は、二つの帯状の超伝導体薄膜を絶縁体層を介
して交差させ、この交差領域の相対する各縁において絶
縁体層の厚み側面を横切つて上下の超伝導体薄膜を二つ
の線状の弱結合部で結合させることによつて達成される
〇以下に本発明の実施例を詳しく説明する。
The purpose of this is to intersect two strip-shaped superconductor thin films through an insulator layer, and then cross the thickness sides of the insulator layers at each opposing edge of this crossing area to separate the upper and lower superconductor thin films into two layers. Embodiments of the present invention will be described in detail below.

第2図は本発明のジヨセフソン接合素子の一実施例を示
す拡大平面図である。第3図は第2図の斜視図である。
第2,3図に示すように、基板1上にのびる帯状の超伝
導体薄膜2の上に絶縁体層4を配置し、別の帯状の超伝
導体薄膜3を下方の超伝導体薄膜2を横切つて絶縁体層
4の上に配置している。この上下両超伝導体薄膜2,3
の交差領域の相対する各縁において、上下の超伝導体層
間で露出する絶縁体層4の厚み側面4′,4″,4″′
,4″2を横切つて上下の超伝導体薄膜を結合して延び
る二つの線状の障壁物質の膜を形成し弱結合部5をつく
る。このように、二つの帯状の超伝導体薄膜を絶縁体層
を介して交差させているので、素子の静電容量の大きさ
は帯状の超伝導体薄膜の幅a又はbにより決定すること
ができ、従つてこの幅を正しい寸法に形成しておけば、
この交差領域の面積a×bは超伝導体薄膜2,3の位置
がずれても変らないので、フオトリングラフイ又は電子
ビームリングラフイにおけるマスク合せの位置精度にそ
れほどの厳格さは要求されない。
FIG. 2 is an enlarged plan view showing one embodiment of the Josephson junction element of the present invention. FIG. 3 is a perspective view of FIG. 2.
As shown in FIGS. 2 and 3, an insulator layer 4 is disposed on a strip-shaped superconductor thin film 2 extending on a substrate 1, and another strip-shaped superconductor thin film 3 is placed on the superconductor thin film 2 below. It is disposed on the insulator layer 4 across the insulator layer 4. These upper and lower superconductor thin films 2 and 3
At each opposing edge of the intersection area, the thickness sides 4', 4'', 4'' of the insulator layer 4 exposed between the upper and lower superconductor layers
, 4'' 2 and connects the upper and lower superconductor thin films to form two linear barrier material films to form a weak coupling part 5. In this way, the two strip-shaped superconductor thin films are crossed through an insulating layer, so the capacitance of the device can be determined by the width a or b of the strip-shaped superconductor thin film, and this width can be formed to the correct size. If you keep it,
The area a×b of this intersection area does not change even if the positions of the superconductor thin films 2 and 3 are shifted, so the positional accuracy of mask alignment in photolinkage or electron beam linkage does not need to be very strict. .

したがつて、静電容量が均一な素子を極めて容易につく
ることができる。
Therefore, an element with uniform capacitance can be produced extremely easily.

このジヨセフソン接合素子の作動に当つては上下の超伝
導体薄膜間の最短距離である絶縁体層の両側面4′,4
″,4″′,4″2を通つて超伝導電流が流れるので、
これを4個の準平面型ジヨセフソン接合素子の並列接続
で等価的に表わすことができる(第4図)。
In the operation of this Josephson junction element, the shortest distance between the upper and lower superconductor thin films is on both sides of the insulator layer 4', 4.
Since superconducting current flows through ″, 4″′, 4″2,
This can be equivalently represented by four quasi-planar Josephson junction elements connected in parallel (FIG. 4).

すなわち素子の臨界電流1mは準平面型ジヨセフソン接
合素子の臨界電流4倍となり、接合抵抗RJは準平面型
ジヨセフソン接合素子の接合抵抗のX倍となつて、結局
1mRj積は準平面型ジヨセフソン接合素子のImRj
積と同一となる。従つで準平面型ジヨセフソン接合素子
と同等の優れた特性を保持する。しかも、本発明のジヨ
セフソン接合素子は、第2図の矢印方向からの磁場に対
して、臨界電流が1:2:1の比になつた3つの接合が
並列に接続されたものと同一のふるまいをする。
In other words, the critical current of 1m of the device is four times the critical current of the quasi-planar Josephson junction element, and the junction resistance RJ is X times that of the quasi-planar Josephson junction element, so the 1mRj product is ultimately that of the quasi-planar Josephson junction element. ImRj of
It is the same as the product. Therefore, it maintains excellent characteristics equivalent to those of a quasi-planar Josephson junction element. Moreover, the Josephson junction element of the present invention behaves in the same manner as three junctions connected in parallel with a critical current ratio of 1:2:1 in response to a magnetic field in the direction of the arrow in FIG. do.

すなわち、3接合干渉計として動作し、その電流の磁場
に対する依存性は第5図Aに示されたようになり、第5
図Bに示された2接合干渉計の電流の磁場に対する依存
性と比較して、超伝導状態の山と山の間の抵抗状態が広
くなる。そのため、スイツチング素子としての設計製作
が容易となる。本発明のジヨセフソン接合素子の製造方
法について述べる。
In other words, it operates as a three-junction interferometer, and the dependence of its current on the magnetic field is as shown in Figure 5A, and the
Compared to the dependence of the current on the magnetic field in the two-junction interferometer shown in Figure B, the resistance states between the peaks of the superconducting state become wider. Therefore, designing and manufacturing the switching element becomes easy. A method for manufacturing the Josephson junction device of the present invention will be described.

先ず基板1上にマスクを使用して第1の帯状の超伝導体
薄膜2をつくる。
First, a first strip-shaped superconductor thin film 2 is formed on a substrate 1 using a mask.

この超伝導体薄膜は、Nb,Ta,W,La,Pb,S
n,In,Alなどの金属あるいはそれらの合金など超
伝導性を示す各種の超伝導物質からなる。第6図を参照
する。フオトリソグラフイ又は電子ビームリソグラフイ
によりレジストマスクM,を基板1上につくり(第6図
A)、このマスクM1を通して超伝導物質を数百ないし
数千人の厚さにスパツタリング又は蒸着し、次にマスク
を取除いて帯状のパターン(第1の帯状超伝導体薄膜2
)を残す(第6図B)。このパターンの両端は外部接続
を容易にするため拡大しておく。次でこの第1の帯状超
伝導体薄膜2を交差して帯状の窓をもつレジストマスク
M2を配置し(第6図C)SIO2などの絶縁物質又は
半導体物質を五十λないし数千λの厚さにスパツタリン
グ又は蒸着し、それから超伝導物質を数百ないし数千λ
の厚さにスパツタリング又は蒸着し、その後マスクを取
除いて帯状のパターン(第2の帯状超伝導体薄膜3)を
残す(第6図D)。次に、全面をスパツタークリーニン
グして酸化膜を超伝導体表面から取除く。それから、全
面に障壁物質を数千人の厚さにスパツタリング又は蒸着
する。次いで、その帯状パターンの交差領域に、第1の
帯状超伝導体薄膜2の幅aの%よりも狭い間隔dをおい
て平行にのびる複数の線状のレジストマスクM3をつく
る(第6図E)。化学エツチングによりマスクされてい
ない障壁物質を取除く(第6図F)。最後に、レジスマ
スクM3を取除いて完成する(第6図G)。なお、第6
図E,F,Gの製造工程を第7図A,B,Cの製造工程
におきかえてもよい。
This superconductor thin film consists of Nb, Ta, W, La, Pb, S
It is made of various superconducting materials that exhibit superconductivity, such as metals such as n, In, and Al, or alloys thereof. Please refer to FIG. A resist mask M, is made on the substrate 1 by photolithography or electron beam lithography (FIG. 6A), and a superconducting material is sputtered or evaporated to a thickness of several hundred to several thousand layers through this mask M1, and then The mask is removed and the strip pattern (first strip superconductor thin film 2
) (Figure 6B). Both ends of this pattern are enlarged to facilitate external connections. Next, a resist mask M2 having a strip-shaped window is placed across the first strip-shaped superconductor thin film 2 (FIG. 6C), and an insulating material or semiconductor material such as SIO2 is coated with a thickness of 50 λ to several thousand λ. Sputter or evaporate the superconducting material to a thickness of hundreds to thousands of λ.
After that, the mask is removed to leave a band-shaped pattern (second band-shaped superconductor thin film 3) (FIG. 6D). Next, the entire surface is sputter cleaned to remove the oxide film from the superconductor surface. Then, a barrier material is sputtered or deposited over the entire surface to a thickness of several thousand thick. Next, a plurality of linear resist masks M3 extending in parallel at intervals d narrower than % of the width a of the first strip-shaped superconductor thin film 2 are formed in the intersection area of the strip-shaped pattern (FIG. 6E). ). Remove the unmasked barrier material by chemical etching (Figure 6F). Finally, the resist mask M3 is removed to complete the process (FIG. 6G). In addition, the 6th
The manufacturing steps shown in FIGS. E, F, and G may be replaced with the manufacturing steps shown in FIGS. 7A, B, and C.

第1の帯状の超伝導体薄膜2の幅a(7)%よりも狭い
間隔dをおいて平行に延びる複数の線状の窓6を有する
レジストマスクM4を、第1の帯状の超伝導体薄膜2に
対して配置し(第7図A)、全表面をスパツタクリーニ
ングした後にレジストマスクM4の窓6を通して弱結合
物質をスパツタリング又は蒸着する(第7図B)。次い
で、レジストマスクがを取除くとその上の弱結合物質が
剥れ(リフトオフされ)、接合素子が完成する。(第7
図G′)。上記の製法においては、第1の帯状の超伝導
体薄膜の幅aの%よりも狭い間隔dをおいて平行に延び
る複数線状の、レジストマスクM3又は窓を有するレジ
ストマスクM4を用いている(第6図E又は第7図A)
ことが重要である。すなわち、d<a/2にしておけば
、両超伝導体薄膜2,3の交差領域に2本の弱結合部5
を形成する確率(歩留りN)は、一例として、a/2=
d+3c/2の場合、フ で表わされるので、歩留り良く2本の弱結合部を容易に
形成することができる。
A resist mask M4 having a plurality of linear windows 6 extending in parallel with an interval d narrower than the width a(7)% of the first strip-shaped superconductor thin film 2 is used as the first strip-shaped superconductor thin film 2. After sputter cleaning the entire surface, a weakly bonding material is sputtered or evaporated through the window 6 of the resist mask M4 (FIG. 7B). Next, when the resist mask is removed, the weak bonding material thereon is lifted off and the bonded element is completed. (7th
Figure G'). In the above manufacturing method, a resist mask M3 having a plurality of lines extending in parallel with an interval d narrower than % of the width a of the first strip-shaped superconductor thin film or a resist mask M4 having a window is used. (Figure 6E or Figure 7A)
This is very important. That is, if d<a/2, two weak coupling parts 5 are formed in the intersection area of both superconductor thin films 2 and 3.
The probability of forming (yield N) is, for example, a/2=
In the case of d+3c/2, it is expressed as f, so two weak coupling parts can be easily formed with good yield.

例えば、第8図に拡大して示すように、a=4μMld
=1.7μMlc=0.2μmの場合、約74%の歩留
りが得られる。×印が3本の弱結合部が形成されている
場合で、その割合は5/19であり、2本の場合は14
/19′70.74であり、上式から得られる歩留りと
一致する。このように、d<a/2にした複数本の線状
のレジストマスクM3又は窓を有するレジストマスタM
4を用いることにより、そのマスク合せの位置精度をあ
まり必要とせずに、幅cの小さい弱結合部を両超伝導体
薄膜の交差領域に歩留り良く容易に形成することができ
る。
For example, as shown enlarged in FIG. 8, a=4μMld
= 1.7 μMlc = 0.2 μm, a yield of approximately 74% is obtained. The × mark indicates a case where three weak bonds are formed, and the ratio is 5/19, and in the case of two, it is 14
/19'70.74, which agrees with the yield obtained from the above formula. In this way, a plurality of linear resist masks M3 with d<a/2 or a resist master M having windows
By using No. 4, a weak coupling portion with a small width c can be easily formed with high yield in the intersection region of both superconductor thin films without requiring much positional accuracy in mask alignment.

そのため接合抵抗Rjの大きい接合素子の量産が容易と
なる。なお、交差領域以外に形成された弱結合部5は、
両超伝導体薄膜2,3を結合していないので接合素子の
特性への影響は全くない。
Therefore, mass production of junction elements with a large junction resistance Rj becomes easy. Note that the weak coupling portion 5 formed outside the intersection area is
Since both superconductor thin films 2 and 3 are not bonded together, there is no effect on the characteristics of the bonded element.

更に上記の製法においては第1の帯状超伝導体薄膜2に
交差してレジストマスクM2を配置し(第6図C)、絶
縁物質をスパツタリング又は蒸着し、それから同じマス
クM2を使用して超伝導物質をスパツタリング又は蒸着
している。
Furthermore, in the above manufacturing method, a resist mask M2 is placed across the first strip-shaped superconductor thin film 2 (FIG. 6C), an insulating material is sputtered or vapor-deposited, and then the same mask M2 is used to form a superconductor. Sputtering or vapor depositing a substance.

このように第1の帯状超伝導体薄膜2に交差して絶縁物
質をスパツタリング又は蒸着することが重要である。も
しこれと逆に第1の帯状超伝導体薄膜2をつくつたマス
クM1を利用して第1の帯状超伝導体薄膜2の全面に重
ねて絶縁物質薄膜をつ′すると素子の製造上著しい不都
合を生じる。すなわち弱結合部をつくる前に上下の超伝
導体薄膜の重なり合う交差領域以外の部分から下の超伝
導体薄膜表面を損傷せずに絶縁物質のみを選択的にスパ
ツタエツチングにより取除くことは極めて困難だからで
ある。又、全面をスパツタークリーニングして酸化膜を
超伝導体表面から取除いているが、この際絶縁体層の厚
み側面の整形も行なわれる。絶縁物質又は半導体物質を
スパツタリング又は蒸着して絶縁体層をつくるが、この
絶縁体層が比較的薄い場合(通常200λ以下)にはピ
ンホールを生じて超伝導シヨートを生じることがある。
このピンホールを閉塞するには絶縁体層を酸化雰囲気に
さらして酸化すればよい。絶縁物質又は半導体物質をス
パツタリング又は蒸着して絶縁体層をつくる代りに、マ
スクM2の窓を通して露出している超伝導体薄膜2の表
面を酸化雰囲気にさらして酸化して絶縁体層としてもよ
い。
It is important to sputter or evaporate the insulating material across the first strip-shaped superconductor thin film 2 in this manner. If, on the contrary, the mask M1 used to form the first strip-shaped superconductor thin film 2 is used to overlay an insulating material thin film over the entire surface of the first strip-shaped superconductor thin film 2, there will be significant problems in manufacturing the device. occurs. In other words, it is extremely difficult to selectively remove only the insulating material from areas other than the intersection area where the upper and lower superconductor thin films overlap without damaging the underlying superconductor thin film surface by sputter etching before forming a weak bond. This is because it is difficult. Further, the entire surface is sputter cleaned to remove the oxide film from the superconductor surface, and at this time, the thickness side of the insulator layer is also shaped. An insulator layer is formed by sputtering or depositing an insulating or semiconductor material, but if this insulator layer is relatively thin (typically less than 200λ), pinholes may form and superconducting shorts may occur.
In order to close this pinhole, the insulating layer may be oxidized by exposing it to an oxidizing atmosphere. Instead of sputtering or vapor depositing an insulating material or a semiconductor material to form an insulating layer, the surface of the superconductor thin film 2 exposed through the window of the mask M2 may be exposed to an oxidizing atmosphere and oxidized to form an insulating layer. .

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の準平面型ジヨセフソン接合素子の拡大斜
視図である。 第2図は本発明のジヨセフソン接合素子の拡大平面図で
ある。第3図は第2図の斜視図である。第4図は本発明
のジヨセフソン接合素子の等価回路である。第5図A,
Bはジヨセフソン接合素子の電流の磁場に対する依存性
の一例を示すグラフである。第6図A,B,C,D,E
,F,G及び第7図A,B,Cは本発明のジヨセフソン
接合素子の製造工程を示す。第8図は本発明の製造法の
効果を説明するための拡大説明図である。図中の符号、
1・・・・・・基板、M1〜M4・・・・・・レジスト
マスク、2,3・・・・・・超伝導体薄膜、4・・・・
・・絶縁体層、5・・・・・・弱結合物質の薄膜、6・
・・・・・窓。
FIG. 1 is an enlarged perspective view of a conventional quasi-planar Josephson junction element. FIG. 2 is an enlarged plan view of the Josephson junction device of the present invention. FIG. 3 is a perspective view of FIG. 2. FIG. 4 is an equivalent circuit of the Josephson junction device of the present invention. Figure 5A,
B is a graph showing an example of the dependence of the current of the Josefson junction element on the magnetic field. Figure 6 A, B, C, D, E
, F, G and FIGS. 7A, B, and C show the manufacturing process of the Josephson junction device of the present invention. FIG. 8 is an enlarged explanatory diagram for explaining the effects of the manufacturing method of the present invention. Symbols in the diagram,
1...Substrate, M1-M4...Resist mask, 2, 3...Superconductor thin film, 4...
...Insulator layer, 5... Thin film of weakly bonding substance, 6.
·····window.

Claims (1)

【特許請求の範囲】 1 絶縁体層を介して交差している二つの帯状の超伝導
体薄膜と、交差領域の相対する各縁において前記の絶縁
体層の厚みの側面を横切つて上下の超伝導体薄膜を結合
して延びる二つの線状の弱結合部とを備えたことを特徴
とするジョセフソン接合素子。 2 基板上に第1の帯状の超伝導体薄膜をつくり、この
第1の帯状の超伝導体薄膜に交差して絶縁体層をつくり
、この絶縁体層に重ねて第2の帯状の超伝導体薄膜をつ
くり、このようにしてつくつた積層薄膜をスパッタクリ
ーニングし、前記の積層薄膜の全面に弱結合物質の薄膜
をつくり、この弱結合物質の薄膜の上に前記の第1の帯
状の超伝導体薄膜の幅の1/2よりも狭い間隔をおいて
平行に延びる複数の線状のレジストマスクをつくり、こ
のレジストマスクに覆われていない弱結合物質を取除く
ことを特徴とするジョセフソン接合素子の製造方法。 3 基板上に第1の帯状の超伝導体薄膜をつくりこの第
1の帯状の超伝導体薄膜に交差して絶縁体層をつくり、
この絶縁体層に重ねて第2の帯状の超伝導体薄膜をつく
り、そして前記の第1の帯状の超伝導体薄膜の幅1/2
よりも狭い間隔をおいて平行に延びる複数の線状の窓を
有するレジストマスクを前記の第1の帯状の超伝導体薄
膜に対して配置し、表面をスパッタクリーニングした後
その窓を通して弱結合物質をスパッタリング又は蒸着す
ることを特徴とするジョセフソン接合素子の製造方法。
[Scope of Claims] 1. Two strip-shaped superconductor thin films intersecting with each other with an insulating layer interposed therebetween, and upper and lower layers crossing the sides of the thickness of the insulating layer at each opposing edge of the crossing region. A Josephson junction device characterized by comprising two linear weak coupling portions that connect and extend superconductor thin films. 2. Create a first belt-shaped superconductor thin film on a substrate, create an insulating layer across this first belt-shaped superconductor thin film, and overlap this insulator layer to form a second belt-shaped superconductor thin film. The laminated thin film thus created is sputter-cleaned to form a thin film of a weakly binding substance on the entire surface of the laminated thin film, and the first belt-shaped superconducting film is formed on the thin film of the weakly binding substance. A Josephson junction characterized by creating a plurality of linear resist masks extending in parallel at intervals narrower than 1/2 of the width of the body thin film, and removing weakly bonded substances not covered by the resist masks. Method of manufacturing elements. 3. Create a first belt-shaped superconductor thin film on the substrate, create an insulator layer across this first belt-shaped superconductor thin film,
A second strip-shaped superconductor thin film is formed by overlapping this insulator layer, and the width is 1/2 that of the first strip-shaped superconductor thin film.
A resist mask having a plurality of linear windows extending in parallel at narrower intervals is placed on the first strip-shaped superconductor thin film, and after the surface is sputter-cleaned, a weakly bonding substance is applied through the windows. A method for manufacturing a Josephson junction element, comprising sputtering or vapor deposition.
JP55181045A 1980-10-31 1980-12-20 Josephson junction device and its manufacturing method Expired JPS592390B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP55181045A JPS592390B2 (en) 1980-12-20 1980-12-20 Josephson junction device and its manufacturing method
US06/315,505 US4494131A (en) 1980-10-31 1981-10-27 Josephson junction element and method of making the same
DE19813142949 DE3142949A1 (en) 1980-10-31 1981-10-29 JOSEPHSON ELEMENT AND METHOD FOR THE PRODUCTION THEREOF
FR8120406A FR2493605B1 (en) 1980-10-31 1981-10-30 JOSEPHSON JUNCTION ELEMENT AND MANUFACTURING METHOD
US06/540,811 US4539741A (en) 1980-10-31 1983-10-11 Josephson junction element and method of making the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55181045A JPS592390B2 (en) 1980-12-20 1980-12-20 Josephson junction device and its manufacturing method

Publications (2)

Publication Number Publication Date
JPS57104281A JPS57104281A (en) 1982-06-29
JPS592390B2 true JPS592390B2 (en) 1984-01-18

Family

ID=16093795

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55181045A Expired JPS592390B2 (en) 1980-10-31 1980-12-20 Josephson junction device and its manufacturing method

Country Status (1)

Country Link
JP (1) JPS592390B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61131775A (en) * 1984-11-30 1986-06-19 株式会社 タカラ Expression variable toy
JPS63212387A (en) * 1987-02-28 1988-09-05 株式会社 タカラ Expression changeable doll

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61131775A (en) * 1984-11-30 1986-06-19 株式会社 タカラ Expression variable toy
JPS63212387A (en) * 1987-02-28 1988-09-05 株式会社 タカラ Expression changeable doll

Also Published As

Publication number Publication date
JPS57104281A (en) 1982-06-29

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