JPS6126591A - Crystal growing method - Google Patents

Crystal growing method

Info

Publication number
JPS6126591A
JPS6126591A JP14910684A JP14910684A JPS6126591A JP S6126591 A JPS6126591 A JP S6126591A JP 14910684 A JP14910684 A JP 14910684A JP 14910684 A JP14910684 A JP 14910684A JP S6126591 A JPS6126591 A JP S6126591A
Authority
JP
Japan
Prior art keywords
crystal
melt
type
specific resistance
single crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14910684A
Other languages
Japanese (ja)
Other versions
JPH0362679B2 (en
Inventor
Ritsuo Takizawa
滝沢 律夫
Koichiro Honda
耕一郎 本田
Akira Osawa
大沢 昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14910684A priority Critical patent/JPS6126591A/en
Publication of JPS6126591A publication Critical patent/JPS6126591A/en
Publication of JPH0362679B2 publication Critical patent/JPH0362679B2/ja
Granted legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/02Single-crystal growth by pulling from a melt, e.g. Czochralski method adding crystallising materials or reactants forming it in situ to the melt

Abstract

PURPOSE:To obtain crystal having improved uniformity of specific resistance by a relative simple device, by growing crystal by crystal pulling method while dissolving crystal which contains electrically-conductive type impurities opposite to impurities contained in melt in the melt. CONSTITUTION:Si Polycrystal containing B is put in the quartz crucible 1 and dissolved to give the melt 2. Just before it is sent to a barrel part immediately after growth starting, the n type Si crystal 3 containing P is immersed in the melt 2, and gradually dissolved with growth of the Si single crystal 4. In this case, the n type Si crystal 3 containing P is preferably in a cylindrical shape in order to improve specific resistance distribution of a section perpendicular to a pulling axis. The lowering speed of the n type Si crystal 3 containing P differs depending upon raising speed of the Si single crystal 4, its diameter, the concentration of the n type Si crystal 3 containing P, and the contact area of it and the melt, and they are adjusted to give the P type Si single crystal with 10OMEGA.

Description

【発明の詳細な説明】 、 〔産業上の利用分野〕 本発明は引き上げ(CZ)法による結晶成長方法に係り
、待に引き上げ軸方向の比抵抗値が一定になるように成
長させる方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for growing a crystal by a pulling (CZ) method, and more particularly, to a method for growing crystals so that the specific resistance value in the direction of the pulling axis becomes constant.

半導体装置製造に用いられる珪素(St)等の結晶はp
型不純物としてポロン(B) 、n型不純物としてg(
P) 、砒素(As)、アンチモン(Sb)等を入れ、
成る一定の比抵抗値(通常0.01〜100Ωcmの間
で用途に応じて選ばれる)にし゛ζ使用する。
Crystals such as silicon (St) used in semiconductor device manufacturing are p
Poron (B) is used as a type impurity, and g(
P), arsenic (As), antimony (Sb), etc. are added,
A constant specific resistance value (usually selected depending on the application between 0.01 and 100 Ωcm) is used.

半導体装置は設計上の要求より、比抵抗分布が均一であ
ることが望ましいが、通常のCZ法で成長した結晶は偏
析により、引き上げ軸方向に不純物の濃度分布は次式に
従って変化する。1)C= k Co(1jりk−’。
It is desirable for a semiconductor device to have a uniform resistivity distribution due to design requirements, but in a crystal grown by the usual CZ method, the impurity concentration distribution in the pulling axis direction changes according to the following equation due to segregation. 1) C=kCo(1jrik-'.

ここで、 C0はメルト中の初期不純物濃度、 βは初期メルト量に対して結晶化した量の割合(同化率
)、 Cは固化率lにおける不純物濃度、 kは偏析係数 である。
Here, C0 is the initial impurity concentration in the melt, β is the ratio of the amount crystallized to the initial melt amount (assimilation rate), C is the impurity concentration at the solidification rate l, and k is the segregation coefficient.

引き上げ軸方向の比抵抗分布は上式に従って取り込まれ
た不純物の濃度分布で決まる。
The resistivity distribution in the direction of the pulling axis is determined by the concentration distribution of impurities taken in according to the above equation.

第3図は代表的な不純物の比抵抗分布で、20kgのメ
ルトから4inch結晶を引き上げたときの計算値であ
る。
Figure 3 shows the resistivity distribution of typical impurities, which is a calculated value when a 4-inch crystal is pulled from 20 kg of melt.

図から分かるように半導体基板として要求される結晶の
比抵抗の均一性が厳しくなると、引き上げた単結晶の1
部分しか使用できず、歩留りは減少する。この傾向は偏
析係数にの小さい不純物桿菌だしい。
As can be seen from the figure, when the uniformity of resistivity of the crystal required as a semiconductor substrate becomes stricter, the
Only a portion can be used and the yield is reduced. This tendency is due to impurity rods with a small segregation coefficient.

そのため結晶の比抵抗の均一性を良くする種々の方法が
用いられている。
Therefore, various methods are used to improve the uniformity of the specific resistance of the crystal.

(参考) 1 ) W、G、Pfann、 AIME 194.7
47(1952)。
(Reference) 1) W, G, Pfann, AIME 194.7
47 (1952).

〔従来の技術〕[Conventional technology]

以下に、結晶の比抵抗の均一性を良(する方法の従来例
を示す。
Below, a conventional example of a method for improving the uniformity of specific resistance of a crystal is shown.

i 、 Multiple Ingot Growth
法2)この方法は要求される比抵抗幅の限界で一旦単結
晶の引き上げを終了し、新たに多結晶をメルトに継ぎ足
して不純物濃度を調製し、再度結晶の引き上げを行う。
i, Multiple Ingot Growth
Method 2) In this method, pulling of the single crystal is once completed at the limit of the required specific resistance width, a new polycrystal is added to the melt to adjust the impurity concentration, and the crystal is pulled again.

ii 、連Mcharge法″′ 第4図に示すように、単結晶引き上げ中に連続的にメル
トを継ぎ足す方法である。溶融炉12の圧力を単結晶育
成炉13のそれより大きくすること番こよりメルト2を
移動させ、育成炉13のメルトの不純物濃度が常に一定
に保たれ為ようにする。
ii. Continuous MCharge method'' As shown in Figure 4, this is a method in which melt is continuously added during single crystal pulling. The melt 2 is moved so that the impurity concentration of the melt in the growth furnace 13 is always kept constant.

なお、図において、14はメルトを移動させる連通管、
15はヒータ、16はアルゴンガス入口、17は内圧コ
ントロールバルブ、18はメルトの液面位置センサ、1
9は自動直径制御センサを示す。
In addition, in the figure, 14 is a communication pipe for moving the melt;
15 is a heater, 16 is an argon gas inlet, 17 is an internal pressure control valve, 18 is a melt level position sensor, 1
9 indicates an automatic diameter control sensor.

iii 、二重ルツボ法4) 第5図に示すように、石英ルツボを二重にして内外のル
ツボIAとIBを細管2oで連絡し、内部ルツボの不純
物濃度C′を c’−c。/に となるようにすると、結晶内に取り込まれる不純物濃度
は常に00となる。
iii. Double crucible method 4) As shown in FIG. 5, the quartz crucible is doubled, and the inner and outer crucibles IA and IB are connected through a thin tube 2o, and the impurity concentration C' in the inner crucible is c'-c. /, the impurity concentration incorporated into the crystal will always be 00.

しかし従来の各方法にはっぎのような欠点がある。However, each of the conventional methods has certain drawbacks.

i、全メルト量に対して得られた単結晶の直胴部分が少
なく歩留りが癲<、再チヤージ時に汚染されやすい。
i. The straight body portion of the single crystal obtained is small compared to the total amount of melt, resulting in poor yield. It is easily contaminated during recharging.

ii 、装置が大規模になり、経済的でない。ii) The device becomes large-scale and is not economical.

iii 、装置が複雑になり、内部ルツボの保持、回転
および調節が困難である。
iii. The device is complicated and the internal crucible is difficult to hold, rotate and adjust.

(参考) 2 ) R,L、Lane and A、H,Kach
areIJ、Crys、Growth 50,437(
1983)。
(Reference) 2) R, L, Lane and A, H, Kach
areIJ, Crys, Growth 50,437 (
1983).

3 )G、Fiegl。3) G, Fiegl.

5olid 5tate Technology、Au
gust、121(1983)。
5solid 5tate Technology, Au
Gust, 121 (1983).

4 ) K、E、Ben5on、W、Lin and 
B、P、Martin。
4) K., E., Ben5on, W., Lin and
B., P., Martin.

Sem1conductor 5ilicon  19
8L33(1981)。
Sem1conductor 5ilicon 19
8L33 (1981).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

CZ法で結晶の比抵抗の均一性を良くする従来の方法は
歩留りが悪く汚染のおそれがあるか、装置が複雑、大規
模になり装置の操作、保全、調節が難しい。
Conventional methods for improving the uniformity of resistivity of crystals using the CZ method have poor yields and the risk of contamination, or the equipment is complicated and large-scale, making it difficult to operate, maintain, and adjust the equipment.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題点の解決は、引き上げ法による結晶成長中に、
メルトに含まれる不純物と反対導電型の不純物を含む結
晶を該メルトに溶解しながら成長させる本発明による結
晶成長方法により達成される。
The solution to the above problem is that during crystal growth using the pulling method,
This is achieved by the crystal growth method according to the present invention, in which a crystal containing an impurity of the opposite conductivity type to the impurity contained in the melt is grown while being dissolved in the melt.

〔作用〕[Effect]

結晶成長中に、メルトに含まれる不純物と反対導電型の
不純物を含む結晶を溶解して単結晶に両方の型の不純物
を取り込み、これらの不純物がお互いに打ち消し合って
補償した値に相当するキャリア濃度(この値が比抵抗に
関係する)が一定になるようにすれば、結晶の比抵抗の
均一性が比較的簡易な装置により得られる。
During crystal growth, a crystal containing impurities of the opposite conductivity type to the impurities contained in the melt is dissolved and both types of impurities are incorporated into the single crystal, and these impurities cancel each other out to form carriers corresponding to the compensated value. By keeping the concentration (this value is related to specific resistance) constant, uniformity in the specific resistance of the crystal can be obtained using a relatively simple device.

またメルトに投入する反対導電型の不純物は、基体結晶
の共有結合半径に近いものを選べば結晶性を害すること
はない。
Furthermore, if the impurity of the opposite conductivity type to be added to the melt is selected to be close to the covalent bond radius of the base crystal, it will not harm the crystallinity.

〔実施例〕 第1図(alは本発明の実施例を示す装置の模式的な断
面図である。
[Example] FIG. 1 (al is a schematic cross-sectional view of an apparatus showing an example of the present invention.

図は約10Ωcmのp型Si結晶を成長する場合を示す
。 − まず石英ルツボ1に、Bを添加したSi多結晶を入れ溶
解してメルト2を得る。成長開始後直胴部に入る直前に
、Pを含むn型Si結晶3をメルト2に浸け、Si単結
晶4の成長とともに徐々に溶かしてゆく。この場合Pを
含むn型Si結晶3は、引き上げ軸に垂直な断面の比抵
抗分布をよくするために図のように円筒形が望ましい。
The figure shows the case where a p-type Si crystal of about 10 Ωcm is grown. - First, Si polycrystals doped with B are placed in a quartz crucible 1 and melted to obtain a melt 2. Immediately before entering the straight body after the start of growth, the n-type Si crystal 3 containing P is immersed in the melt 2, and is gradually melted as the Si single crystal 4 grows. In this case, the n-type Si crystal 3 containing P is preferably cylindrical as shown in the figure in order to improve the resistivity distribution in the cross section perpendicular to the pulling axis.

またPを含むn型Si結晶3の引き下げ速度は、Si単
結晶4の引き上げ速度、直径と、Pを含むn型Si結晶
3のP濃度、メルトとの樟触面積により異なり、10Ω
cmのp型Si単結晶4がえられるように調節する。
In addition, the pulling speed of the n-type Si crystal 3 containing P varies depending on the pulling speed and diameter of the Si single crystal 4, the P concentration of the n-type Si crystal 3 containing P, and the area of contact with the melt, and is 10Ω.
Adjustment is made so that a p-type Si single crystal 4 of cm is obtained.

なお5はモータ、6はモリブデン(門0)ワイヤ、7は
モータ、8はヒータを示ず。
Note that 5 is a motor, 6 is a molybdenum (gate 0) wire, 7 is a motor, and 8 is a heater.

第1図(blばPを含んだn型Si結晶3の斜視図であ
る。
FIG. 1 is a perspective view of an n-type Si crystal 3 containing P.

第2図に本発明により得られ、た結晶の引き上げ軸方向
の分布を示す。
FIG. 2 shows the distribution of crystals obtained according to the present invention in the direction of the pulling axis.

比抵抗の許容範囲を10±1Ωcmとすれば、点線で示
される通常のCZ法では10に示すように全メルトの約
25%しか使えないが、本発明によると11に示すよう
に約70%が使えることになる。
If the allowable range of specific resistance is 10±1 Ωcm, the normal CZ method shown by the dotted line can only use about 25% of the total melt as shown in 10, but according to the present invention, about 70% can be used as shown in 11. can be used.

またPを含むn型Si結晶3の引き下げ駆動部は簡単に
作れる。
Further, the pull-down drive section of the n-type Si crystal 3 containing P can be easily made.

さらにB不純物にP不純物を混入した結晶の結晶性につ
いて考える。Siの共存結合半径を1とすると、Bは0
.75で、Pは0.94でPの方が結合半径の差による
歪が小さいことが分かる。′)実際に本発明により得ら
れた結晶の微少欠陥密度を5eccoエツチングを用い
て評価してみると、103cm−2程度でPを導入しな
い場合と同程度であり、結晶性に影響を与えないことが
明らかとなった。
Furthermore, consider the crystallinity of a crystal in which a P impurity is mixed with a B impurity. If the coexistence bond radius of Si is 1, then B is 0
.. 75, P is 0.94, and it can be seen that distortion due to the difference in bond radius is smaller with P. ') When the microdefect density of the crystal actually obtained according to the present invention was evaluated using 5ecco etching, it was about 103cm-2, which is the same as when no P is introduced, and it does not affect the crystallinity. It became clear that

(参考) 5)津屋英樹、近藤陽二部、金森克、 第30回応用物理学関係連合講演予稿集(1983)p
、662゜ 〔発明の効果〕 以上詳細に説明したように本発明によれば、CZ法にお
いて、汚染のおそれがなくて装置の操作、保全、調節が
簡単な装置で、結晶の比抵抗の均一性を良くし、しかも
欠陥密度の増加をきたさない。
(Reference) 5) Hideki Tsuya, Yoji Kondo, Masaru Kanamori, Proceedings of the 30th Applied Physics Association Lecture Proceedings (1983) p.
, 662゜ [Effects of the Invention] As explained in detail above, according to the present invention, in the CZ method, the specific resistance of the crystal can be made uniform with an apparatus that is free from contamination and is easy to operate, maintain, and adjust. This improves the properties and does not increase defect density.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)と(blは本発明の実施例を示す装置の模
式的な断面図とPを含んだn型Si結晶の斜視図、第2
図に本発明により得られた結晶の引き上げ軸方向の分布
図、 第3図は通常のCZ法による代表的な不純物の引き上げ
軸方向の比抵抗分布図、 第4図は従来の連続Charge法による装置の模式%
式% 第5図は従来の二重ルツボ法による装置の模式的な断面
図である。 図において、 1は石英ルツボ、   2はメルト、 3はPを含むn型Si結晶、 4はp型St単結晶 −を示す。 第7Et 寥2閤
Figures 1 (a) and (bl are a schematic cross-sectional view of a device showing an embodiment of the present invention and a perspective view of an n-type Si crystal containing P;
Figure 3 shows the distribution diagram of the crystal in the direction of the pulling axis obtained by the present invention, Figure 3 shows the resistivity distribution diagram of typical impurities in the direction of the pulling axis obtained by the ordinary CZ method, and Figure 4 shows the resistivity distribution diagram in the direction of the pulling axis of the crystal obtained by the conventional continuous charge method. Equipment schematic%
Formula % FIG. 5 is a schematic cross-sectional view of an apparatus using the conventional double crucible method. In the figure, 1 is a quartz crucible, 2 is a melt, 3 is an n-type Si crystal containing P, and 4 is a p-type St single crystal. 7th Et 2 pieces

Claims (1)

【特許請求の範囲】[Claims] 引き上げ法による結晶成長中に、メルトに含まれる不純
物と反対導電型の不純物を含む結晶を該メルトに溶解し
ながら成長させることを特徴とする結晶成長方法。
A crystal growth method characterized by growing a crystal containing an impurity of an opposite conductivity type to an impurity contained in the melt while dissolving it in the melt during crystal growth by a pulling method.
JP14910684A 1984-07-18 1984-07-18 Crystal growing method Granted JPS6126591A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14910684A JPS6126591A (en) 1984-07-18 1984-07-18 Crystal growing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14910684A JPS6126591A (en) 1984-07-18 1984-07-18 Crystal growing method

Publications (2)

Publication Number Publication Date
JPS6126591A true JPS6126591A (en) 1986-02-05
JPH0362679B2 JPH0362679B2 (en) 1991-09-26

Family

ID=15467825

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14910684A Granted JPS6126591A (en) 1984-07-18 1984-07-18 Crystal growing method

Country Status (1)

Country Link
JP (1) JPS6126591A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62226890A (en) * 1986-03-27 1987-10-05 Komatsu Denshi Kinzoku Kk Single crystal and its production
JPH01215789A (en) * 1988-02-25 1989-08-29 Toshiba Corp Method for pulling up crystal of semiconductor
JP2010189253A (en) * 2009-01-05 2010-09-02 Commissariat A L'energie Atomique & Aux Energies Alternatives Method for semiconductor solidification with addition of doped semiconductor charges during crystallization
JP2015226066A (en) * 2014-05-28 2015-12-14 インフィネオン テクノロジーズ アーゲーInfineon Technologies Ag Semiconductor element, silicon wafer, and silicon ingot

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5266372A (en) * 1975-11-28 1977-06-01 Nec Home Electronics Ltd Manufacture of silicon single crystal
JPS55130894A (en) * 1979-03-28 1980-10-11 Hitachi Ltd Single crystal picking up apparatus

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5266372A (en) * 1975-11-28 1977-06-01 Nec Home Electronics Ltd Manufacture of silicon single crystal
JPS55130894A (en) * 1979-03-28 1980-10-11 Hitachi Ltd Single crystal picking up apparatus

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62226890A (en) * 1986-03-27 1987-10-05 Komatsu Denshi Kinzoku Kk Single crystal and its production
JPH01215789A (en) * 1988-02-25 1989-08-29 Toshiba Corp Method for pulling up crystal of semiconductor
JP2010189253A (en) * 2009-01-05 2010-09-02 Commissariat A L'energie Atomique & Aux Energies Alternatives Method for semiconductor solidification with addition of doped semiconductor charges during crystallization
JP2015226066A (en) * 2014-05-28 2015-12-14 インフィネオン テクノロジーズ アーゲーInfineon Technologies Ag Semiconductor element, silicon wafer, and silicon ingot
US9786748B2 (en) 2014-05-28 2017-10-10 Infineon Technologies Ag Semiconductor device, silicon wafer and silicon ingot
JP2020074381A (en) * 2014-05-28 2020-05-14 インフィネオン テクノロジーズ アーゲーInfineon Technologies Ag Semiconductor element, silicon wafer and silicon ingot
US10910475B2 (en) 2014-05-28 2021-02-02 Infineon Technologies Ag Method of manufacturing a silicon wafer

Also Published As

Publication number Publication date
JPH0362679B2 (en) 1991-09-26

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