JPS6126088B2 - - Google Patents

Info

Publication number
JPS6126088B2
JPS6126088B2 JP18516181A JP18516181A JPS6126088B2 JP S6126088 B2 JPS6126088 B2 JP S6126088B2 JP 18516181 A JP18516181 A JP 18516181A JP 18516181 A JP18516181 A JP 18516181A JP S6126088 B2 JPS6126088 B2 JP S6126088B2
Authority
JP
Japan
Prior art keywords
circuit
output
digit
array
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP18516181A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5887628A (ja
Inventor
Yoshitake Suzuki
Hiroki Yamauchi
Atsushi Iwata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP18516181A priority Critical patent/JPS5887628A/ja
Publication of JPS5887628A publication Critical patent/JPS5887628A/ja
Publication of JPS6126088B2 publication Critical patent/JPS6126088B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
JP18516181A 1981-11-20 1981-11-20 エンコ−ダ回路 Granted JPS5887628A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18516181A JPS5887628A (ja) 1981-11-20 1981-11-20 エンコ−ダ回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18516181A JPS5887628A (ja) 1981-11-20 1981-11-20 エンコ−ダ回路

Publications (2)

Publication Number Publication Date
JPS5887628A JPS5887628A (ja) 1983-05-25
JPS6126088B2 true JPS6126088B2 (enExample) 1986-06-19

Family

ID=16165893

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18516181A Granted JPS5887628A (ja) 1981-11-20 1981-11-20 エンコ−ダ回路

Country Status (1)

Country Link
JP (1) JPS5887628A (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59216245A (ja) * 1983-05-25 1984-12-06 Nec Corp 正規化回路
JPS6019237A (ja) * 1983-07-13 1985-01-31 Nec Corp 正規化回路
JPS60167027A (ja) * 1984-02-08 1985-08-30 Fujitsu Ltd デイジタル信号処理用演算回路

Also Published As

Publication number Publication date
JPS5887628A (ja) 1983-05-25

Similar Documents

Publication Publication Date Title
US5671166A (en) Barrel shifter for combining pieces of data into a piece of combined data and shifting the combined data
US6965331B2 (en) Conversion arrangement and method for converting a thermometer code
US5166899A (en) Lookahead adder
AU621788B2 (en) Total sum calculation circuit capable of rapidly calculating a total sum of more than two input data represented by a floating point representation
JPS6126088B2 (enExample)
US4758975A (en) Data processor capable of processing floating point data with exponent part of fixed or variable length
US5142490A (en) Multiplication circuit with storing means
US5636156A (en) Adder with improved carry lookahead structure
US3373421A (en) Conversion from gray code to binary code
US7002502B2 (en) Analog-to-digital converter and method of generating an intermediate code for an analog-to-digital converter
JPS6127769B2 (enExample)
JPS6230451B2 (enExample)
JPH024944B2 (enExample)
US4159529A (en) Fibonacci code adder
KR102182299B1 (ko) 시프트 연산 장치 및 그의 동작 방법
JPH08147142A (ja) プライオリティ検出用カウンタ装置
JPH09128213A (ja) ブロックフローティング処理システムおよび方法
JP2608600B2 (ja) ２つの数の和のパリティビットの計算装置
SU809169A1 (ru) Арифметическое устройство
SU696450A1 (ru) Устройство дл сложени в избыточной двоичной системе счислени
SU830371A1 (ru) Преобразователь двоичного кодаВ дЕС ТичНый
US3586842A (en) Arithmetic circuit
SU1442988A1 (ru) Комбинационный сумматор
SU1141402A1 (ru) Матричное устройство дл делени
JPH11102284A (ja) 選別方法および選別回路