JPS61260603A - Electronic component - Google Patents

Electronic component

Info

Publication number
JPS61260603A
JPS61260603A JP60104331A JP10433185A JPS61260603A JP S61260603 A JPS61260603 A JP S61260603A JP 60104331 A JP60104331 A JP 60104331A JP 10433185 A JP10433185 A JP 10433185A JP S61260603 A JPS61260603 A JP S61260603A
Authority
JP
Japan
Prior art keywords
conductive metal
metal layer
resistive film
film layer
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60104331A
Other languages
Japanese (ja)
Inventor
廣 伊藤
史郎 辻
長谷部 紀之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP60104331A priority Critical patent/JPS61260603A/en
Publication of JPS61260603A publication Critical patent/JPS61260603A/en
Pending legal-status Critical Current

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Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Non-Adjustable Resistors (AREA)
  • Electronic Switches (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、例えばサーマルヘッドのような電子部品、
特に異種導体金属層の電気的接続構造の改良に関するも
のである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention is applicable to electronic components such as thermal heads,
In particular, it relates to improvements in electrical connection structures between dissimilar conductor metal layers.

〔従来の技術〕[Conventional technology]

近年、電子部品は小型化、低価格化の傾向にあり、薄膜
、厚膜技術がその一翼を担っている。例えば、ファクシ
ミリ、プリンタ等に用いられるメインパーツとしてのサ
ーマルヘッドは、薄膜技術、厚膜技術等を用いて形成さ
れている。
In recent years, electronic components have been trending toward smaller sizes and lower prices, and thin-film and thick-film technologies are playing a role in this trend. For example, thermal heads as main parts used in facsimiles, printers, and the like are formed using thin film technology, thick film technology, and the like.

ところでこのサーマルヘッドは、絶縁基板上に複数個の
発熱抵抗体を配列してなるドツトにパルス電圧を印加し
、各ドツトの発熱により感熱紙に文字、記号等を印字き
せるようにしたものでめり、各ドツトの発熱と感熱紙の
搬送とにより連続的な印字を可能としている。
By the way, this thermal head is a device in which a pulse voltage is applied to dots made by arranging multiple heating resistors on an insulating substrate, and the heat generated by each dot is used to print characters, symbols, etc. on thermal paper. This enables continuous printing by generating heat from each dot and transporting the thermal paper.

第5図は、この種の従来のサーマルヘッドをモデル的に
示す断面図であり、図中、(1)は絶縁基板、(2)は
この絶縁基板(1)上に付着形成した抵抗膜層、(3)
はこの抵抗膜層(2)上に付着形成した第14体金属層
、(4)は第1導体金属層(3)上に付着形成された第
2導体金属層、(6)は上記第1導体金属層(3)の一
部を除去し抵抗膜層(2)を露出させて形成した発熱抵
抗体である。
FIG. 5 is a cross-sectional view schematically showing this type of conventional thermal head. In the figure, (1) is an insulating substrate, and (2) is a resistive film layer deposited on this insulating substrate (1). ,(3)
(4) is the second conductive metal layer deposited on the first conductive metal layer (3), and (6) is the first conductive metal layer deposited on the resistive film layer (2). This heating resistor is formed by removing a part of the conductive metal layer (3) and exposing the resistive film layer (2).

従来のサーマルヘッドは上記のように構成され、これを
薄膜技術で製造するには、絶縁基板(1)上にスパッタ
リングで抵抗膜層(2)となるサーメツト膜を数百〜数
千オングストローム付着させ、次いでAl、 Cu、 
Ni、 Cr  のような金属を第14体金属層(3)
としてスパッタリングにより数ミクロン付層させ、その
後写真食刻技術により導体パターン、発熱抵抗体(6)
等を形成することになる。
A conventional thermal head is constructed as described above, and in order to manufacture it using thin film technology, a few hundred to several thousand angstroms of cermet film, which will become the resistive film layer (2), is deposited on an insulating substrate (1) by sputtering. , then Al, Cu,
Metals such as Ni and Cr are used as the 14th metal layer (3)
A layer of several microns is deposited by sputtering, and then a conductor pattern and heating resistor (6) are formed by photolithography.
etc. will be formed.

ここで、形成された導体パターンのパターン抵抗を下げ
る必要がある場合、あるいは導体パターンを半田付は可
能なパターンとしたい場合には、種々のプロセス上の制
約から、M1導体金属N(3)の金属とは異なるAu、
 Cu 等の第2導体金属層(4)をメッキ、スパッタ
リング、印刷等で付着させ、所望の特性を得ることにな
る0 〔発明が解決しようとする問題点〕 上記のような従来の電子部品では、例えば第1導体金属
層(3)がCu、第2導体金属層(4)がAuの場合、
製造プロセスに加熱工程があれば、CuとAuとの接触
界面にて金属の拡散が進行し合金となり、接触抵抗が大
となって所望の特性が得られない。
Here, if it is necessary to lower the pattern resistance of the formed conductor pattern, or if you want the conductor pattern to be a solderable pattern, due to various process constraints, the M1 conductor metal N (3) Au, which is different from metal,
A second conductive metal layer (4) such as Cu is deposited by plating, sputtering, printing, etc. to obtain the desired characteristics. For example, when the first conductive metal layer (3) is Cu and the second conductive metal layer (4) is Au,
If the manufacturing process includes a heating step, metal diffusion progresses at the contact interface between Cu and Au to form an alloy, increasing contact resistance and making it impossible to obtain desired characteristics.

また、第1導体金属層(3)がhem第24体金属層(
4)がAuの場合には、A71と Auとの接触界面で
電池槽 作用が生じて信頼性が棲られない。さらに、IC搭載プ
ロセス等を含む場合には、第1導体金属層(3)および
第2導体金属層(4)はより限定されたものとなってし
まう。
Further, the first conductive metal layer (3) is the hem 24th body metal layer (
If 4) is made of Au, battery cell action occurs at the contact interface between A71 and Au, resulting in poor reliability. Furthermore, if an IC mounting process or the like is included, the first conductive metal layer (3) and the second conductive metal layer (4) will be more limited.

このように従来のものでは、第1導体金属層(3)と第
2導体金属層(4)との組合わせを選定しなければなら
ず、結果として電子部品の高価格化につながり、また両
導体金属層(3)、(4)の接触界面の高信頼性が得ら
れない等の問題があった。
In this way, in the conventional method, it is necessary to select a combination of the first conductive metal layer (3) and the second conductive metal layer (4), which results in an increase in the price of electronic components. There were problems such as not being able to obtain high reliability at the contact interface between the conductive metal layers (3) and (4).

この発明はかかる問題点を解決するためになされたもの
で、異稽導体金属層の接触界面の拡散、電池作用を防止
することができ、しかも安価に製作できる電子部品を得
ることを目的とする0〔問題点を解決するための手段〕 この発明に係る電子部品は、相互に異なる金属からなる
第1導体金属層と第2導体金属層とを、その間に抵抗膜
層を介在させて相互に導通させるようにしたものである
This invention was made to solve these problems, and aims to provide an electronic component that can prevent diffusion and battery action at the contact interface of an unusual conductor metal layer, and can be manufactured at low cost. 0 [Means for Solving the Problems] The electronic component according to the present invention is characterized in that a first conductive metal layer and a second conductive metal layer made of different metals are interconnected with a resistive film layer interposed therebetween. It is designed to conduct electricity.

〔作用〕[Effect]

この発明においては、異種導体金属層間に抵抗膜層を介
在させているので、両導体金属層の組合わせを考慮する
必要がなく、低価格化を実現でき、しかも両導体金属層
の接触界面の拡散、電池作用を防止して信頼性を高める
ことができる0〔実施例〕 第1図はこの発明の一実施例を示すもので、図中、第1
図と同一符号は同−又は相当部分を示す。
In this invention, since the resistive film layer is interposed between the different types of conductor metal layers, there is no need to consider the combination of both conductor metal layers, and the cost can be reduced. 0 [Example] Figure 1 shows an example of the present invention.
The same reference numerals as in the figures indicate the same or corresponding parts.

この実施例では、第1導体金属層(3)と絶縁基板(1
)上に例えば Auペーストを印刷して焼成した第2導
体金属層(4)との間に抵抗膜層(2)を介在させ、上
記両導体金属層(81、(41をこの抵抗膜層(2)を
介して導通させるようにしている。
In this example, the first conductive metal layer (3) and the insulating substrate (1
), for example, a resistive film layer (2) is interposed between the second conductive metal layer (4), which is formed by printing and firing an Au paste, and both the conductive metal layers (81, (41) are connected to this resistive film layer ( 2).

上記のように構成された電子部品においては、絶縁基板
(1)上の必要位置に Auペーストを印刷し焼成して
第2導体金属層(4)を形成し、その上に、Ta、 T
1 等の金属粉末とEliO,、O,N 等の絶縁物と
の混合物を主成分とする抵抗膜層(2)を数群〜数千オ
ングストロームの厚さでスパッタリングにより付着させ
、さらにその上にJ、 Cu 等の第1導体金属層(3
)をスパッタリングにより付着させるとともに、この第
1導体金属層(3)の第2導体金属層(4)との導通部
以外の箇所を一部除去し抵抗膜層(2)を露出させて発
熱抵抗体(6)とすることにより製作される。
In the electronic component configured as described above, Au paste is printed and fired at required positions on the insulating substrate (1) to form the second conductive metal layer (4), and on top of that, Ta, T
A resistive film layer (2) mainly composed of a mixture of metal powders such as No. 1 and insulators such as EliO, O, N, etc. is deposited by sputtering to a thickness of several to several thousand angstroms, and then The first conductive metal layer (3
) is deposited by sputtering, and a part of the first conductive metal layer (3) other than the conductive part with the second conductive metal layer (4) is removed to expose the resistive film layer (2) and form a heating resistor. It is manufactured by making the body (6).

ここで、Ta、 Ti  等の金属粉末と5in2.0
. N等の絶縁物との混合物を主成分とする抵抗膜層は
、Ta、 Ti  等が比較的安定な金属であり、抵抗
膜層(2)上にスパッタリングされるAl、 Cu  
等の第1導体金属層(3)との接触電位差を緩衝し、拡
散を防ぐ介在金属となる。この抵抗膜層(2)は、厚み
が数百〜数千オングストロームでシート抵抗値が数十〜
数百Ωであるので、両導体金属層(81、(41間の導
通抵抗は、両者間の抵抗膜層(2)の面積が0.1朋 
であったとしても、数万〜数十万分の10と微少なもの
となり、充分な導通が得られる。
Here, metal powder such as Ta, Ti and 5in2.0
.. The resistive film layer mainly composed of a mixture with an insulator such as N is made of relatively stable metals such as Ta and Ti, and is made of relatively stable metals such as Al and Cu sputtered on the resistive film layer (2).
It serves as an intervening metal that buffers the contact potential difference with the first conductive metal layer (3) and prevents diffusion. This resistive film layer (2) has a thickness of several hundred to several thousand angstroms and a sheet resistance value of several tens to several thousand angstroms.
Since it is several hundred ohms, the conduction resistance between both conductive metal layers (81, (41) is as follows: the area of the resistive film layer (2) between them is 0.1
Even if it is, it will be as small as tens of thousands to hundreds of thousands of times, and sufficient conduction can be obtained.

1だ、金属層の組合わせを選定することなく、低価格の
金属を使うことができ、加熱工程等の製造プロセスを使
うことができる。
1. Low-cost metals can be used without selecting the combination of metal layers, and manufacturing processes such as heating processes can be used.

なお上記実施例では、第1導体金属層(3)と第2導体
金属層(4)とを抵抗膜層(2)を介して導通させるも
のを示したが、第2図に示すように他の導体金属層(6
)を有する他の部品(γ)と第2導体金属層(4)とを
抵抗膜層(2)を介して導通させるようにしてもよく、
同様の効果が期待できる。
In the above embodiment, the first conductive metal layer (3) and the second conductive metal layer (4) are electrically connected through the resistive film layer (2), but as shown in FIG. conductive metal layer (6
) and the second conductive metal layer (4) may be electrically connected via the resistive film layer (2),
Similar effects can be expected.

〔発明の効果〕〔Effect of the invention〕

この発明は以上説明したとおり、異種導体金属層間に抵
抗膜層を介在させるようにしているので、サーマルヘッ
ド等の電子部品を低価格化でき、しかも異種全域の接触
界面の拡散、電池作用を防止して信頼性を向上させるこ
とができる等の効果がある。
As explained above, this invention interposes a resistive film layer between different types of conductor metal layers, so it is possible to lower the cost of electronic components such as thermal heads, and it also prevents diffusion and battery action at the contact interface between different types of conductive metal layers. This has the effect of improving reliability.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例に係るサーマルヘッドをモ
デル的に示す断面図、第2図はこの発明の他の実施例を
示す第1図相当図、第3図は従来のサーマルヘッドをモ
デル的に示す第1図相当図である。 (1):絶縁基板    (2):抵抗膜層(3):第
1導体金属層 (4):第2導体金属層(5):発熱抵
抗体 なお各図中、同一符号は同−又は相当部分を示すものと
する。
FIG. 1 is a sectional view schematically showing a thermal head according to an embodiment of the present invention, FIG. 2 is a view corresponding to FIG. 1 showing another embodiment of the invention, and FIG. 3 is a diagram showing a conventional thermal head. This is a diagram corresponding to FIG. 1 shown as a model. (1): Insulating substrate (2): Resistive film layer (3): First conductive metal layer (4): Second conductive metal layer (5): Heat generating resistor Note that the same symbols in each figure are the same or equivalent. shall indicate the part.

Claims (4)

【特許請求の範囲】[Claims] (1)相互に異なる金属からなる第1導体金属層と第2
導体金属層とを絶縁基板上にそれぞれ形成したものにお
いて、上記両導体金属層を、その間に抵抗膜層を介在さ
せて相互に導通させたことを特徴とする電子部品。
(1) A first conductive metal layer and a second conductive metal layer made of different metals.
and a conductive metal layer formed on an insulating substrate, wherein both the conductive metal layers are electrically connected to each other with a resistive film layer interposed therebetween.
(2)抵抗膜層は、導電性金属粉末と絶縁物とを含んで
いることを特徴とする特許請求の範囲第1項記載の電子
部品。
(2) The electronic component according to claim 1, wherein the resistive film layer contains conductive metal powder and an insulator.
(3)抵抗膜層が、粉末金属とセラミック粉末との混合
物を主成分とするサーメット抵抗膜層であることを特徴
とする特許請求の範囲第1項記載の電子部品。
(3) The electronic component according to claim 1, wherein the resistive film layer is a cermet resistive film layer whose main component is a mixture of powdered metal and ceramic powder.
(4)抵抗膜層が、第1導体金属層と第2導体金属層と
の導通部以外の箇所で発熱抵抗体を形成していることを
特徴とする特許請求の範囲第1項乃至第3項のいずれか
に記載の電子部品。
(4) Claims 1 to 3, characterized in that the resistive film layer forms a heating resistor at a location other than the conductive portion between the first conductive metal layer and the second conductive metal layer. Electronic components described in any of the paragraphs.
JP60104331A 1985-05-14 1985-05-14 Electronic component Pending JPS61260603A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60104331A JPS61260603A (en) 1985-05-14 1985-05-14 Electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60104331A JPS61260603A (en) 1985-05-14 1985-05-14 Electronic component

Publications (1)

Publication Number Publication Date
JPS61260603A true JPS61260603A (en) 1986-11-18

Family

ID=14377950

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60104331A Pending JPS61260603A (en) 1985-05-14 1985-05-14 Electronic component

Country Status (1)

Country Link
JP (1) JPS61260603A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6436467A (en) * 1987-07-31 1989-02-07 Rohm Co Ltd Thermal head
JP2003023233A (en) * 2001-07-05 2003-01-24 Sumitomo Metal Electronics Devices Inc Low temperature fired ceramic circuit board
JP2017528902A (en) * 2014-05-27 2017-09-28 オーボテック リミテッド 3D structure printing by laser-induced forward transfer
US10629442B2 (en) 2013-10-14 2020-04-21 Orbotech Ltd. Lift printing of multi-composition material structures
US10633758B2 (en) 2015-01-19 2020-04-28 Orbotech Ltd. Printing of three-dimensional metal structures with a sacrificial support
US10688692B2 (en) 2015-11-22 2020-06-23 Orbotech Ltd. Control of surface properties of printed three-dimensional structures
US11271119B2 (en) 2014-10-19 2022-03-08 Orbotech Ltd. LIFT printing of conductive traces onto a semiconductor substrate
US11881466B2 (en) 2017-05-24 2024-01-23 Orbotech Ltd. Electrical interconnection of circuit elements on a substrate without prior patterning

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6436467A (en) * 1987-07-31 1989-02-07 Rohm Co Ltd Thermal head
JPH0417795B2 (en) * 1987-07-31 1992-03-26 Rohm Kk
JP2003023233A (en) * 2001-07-05 2003-01-24 Sumitomo Metal Electronics Devices Inc Low temperature fired ceramic circuit board
JP4711158B2 (en) * 2001-07-05 2011-06-29 株式会社村田製作所 Low temperature fired ceramic circuit board
US10629442B2 (en) 2013-10-14 2020-04-21 Orbotech Ltd. Lift printing of multi-composition material structures
JP2017528902A (en) * 2014-05-27 2017-09-28 オーボテック リミテッド 3D structure printing by laser-induced forward transfer
US11271119B2 (en) 2014-10-19 2022-03-08 Orbotech Ltd. LIFT printing of conductive traces onto a semiconductor substrate
US10633758B2 (en) 2015-01-19 2020-04-28 Orbotech Ltd. Printing of three-dimensional metal structures with a sacrificial support
US10688692B2 (en) 2015-11-22 2020-06-23 Orbotech Ltd. Control of surface properties of printed three-dimensional structures
US11881466B2 (en) 2017-05-24 2024-01-23 Orbotech Ltd. Electrical interconnection of circuit elements on a substrate without prior patterning

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