JPS61258476A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain an MOS-type transistor operable at a high speed and having a fine structure, by forming source and drain regions in a self-aligning manner with a material serving as a mask provided in the region where a gate electrode is to be formed, removing the masking material, and covering the mask removed region with a gate electrode material for forming a gate electrode. CONSTITUTION:A silicon dioxide film is grown on a silicon semiconductor substrate 1, and then thick silicon dioxide films 2 are formed. A thin silicon dioxide film 2' is formed as a gate oxide film on the semiconductor substrate 1 between the thick silicon oxide films 2. Thereafter, polysilicon 5 is grown thereon, source and drain regions 4 are provided in a self-aligning manner by means of ion implantation or the like, and silicon nitride 6 is grown. The structure is subjected to wet etching with a fluorate so as to remove the polysilicon 5 and the oxide film on the source and drain regions 4. Further etching is performed selectively to provide electrode wiring layers 7, which are then alloyed so as to ensure the non-resistive contact of the electrodes. According to this method, an MOS transistor having a fine structure and operable at a high speed can be obtained.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a high-speed and fine MO8 type transistor, in particular,
The present invention relates to a method of manufacturing an MO8fM integrated circuit device using MO8iW transistors.・[Prior art] Conventionally, the second method for manufacturing MO8 type transistors is
As shown in Figures (a) to (e), selective oxidation (LOCO8
) to separate a field region having a thick silicon dioxide film 2 and a channel stopper 3 thereunder from a transistor region having a thin silicon dioxide film 2' on a semiconductor substrate l (FIG. 2(a)), silicon 5
After doping this polysilicon 5 with impurities, photolithography is used to grow [thin silicon dioxide;
', and using the remaining polysilicon 5 as a mask, form source/drain regions 4 by ion implantation, etc. (FIG. 2(b)), and grow phosphorus glass or the like as an insulating film 8 between the eyebrows. , flattening process by reflow (Figure 2 (C)), ・Photolithography,
Step of selectively removing interlayer insulating film 8 and silicon dioxide 2' to form contact holes exposing source and drain regions 4 and polysilicon 5 (FIG. 2(d))
, sputtering aluminum to form a wiring layer in a desired shape by photolithography, and alloying the aluminum with the source and drain regions 4 and polysilicon 5 by heat treatment to form electrodes 7 (FIG. 2(e)). Contains.

[Problem that the invention seeks to solve]

The conventional MO8 transistor described above can be formed by self-alignment on the polysilicon 5 with the source/drain regions 4 as gate electrodes, but originally the polysilicon 5, which has no conductivity, is doped with impurities to make it conductive. Because of this, there are limits to the solid solubility and activation rate of impurities. Therefore, the layer resistance is 1 digit to 100% higher than that of aluminum or high-density metals.
The disadvantage is that it is two digits higher. Further, since a potential is applied to the source/drain regions 4 through the contact holes, a certain degree of margin is required, and the source/drain area also has the drawback of being difficult to miniaturize.

Furthermore, since an interlayer insulating film adhesive layer is used to flatten the device surface, it is difficult to realize a shallow source/drain junction.

An object of the present invention is to eliminate the above-mentioned conventional drawbacks and to provide a method for manufacturing a semiconductor device using a high-speed, fine MO8 type transistor having a gate electrode with low layer resistance, a fine source/drain area, and a shallow source/drain junction. This is what we provide.

[Means for solving problems]

According to the present invention, first, a field region having a thick oxide film and an element region having a thin oxide film are formed by selective oxidation, and polysilicon is selectively formed on the thin oxide film.
After that, the entire polysilicon is covered with an oxide film by oxidation, and then this is used as a mask.
After forming a drain, silicon nitride was grown on the entire surface, and by anisotropic dry etching, a side wall made of silicon nitride was left only on the sides of the polysilicon, and then by wet etching, it was used as a mask. A method for manufacturing a semiconductor device is obtained in which only polysilicon is removed and alicon/steel is removed to form wiring for gate electrodes, source electrodes, and drain electrodes.

〔Example〕

The invention will now be described with reference to one drawing. As an example, the gate electrode and wiring are made of aluminum.

First, as shown in FIG. 1(a), a silicon dioxide film with a thickness of about 500 to x000 is grown on a silicon semiconductor substrate l by the thermal acid angle method, and then silicon nitride (not shown) is grown. A thick silicon dioxide film 2 is grown by CVD at about 1000X, patterned by photolithography, and then selectively oxidized at about 10000X.
form. After forming a thin silicon dioxide film 2′ as a gate oxide film on the semiconductor substrate l between the thick silicon dioxide and JilZ, CVD method KJ: Lipo I)
-;'(', 3000-6000X &)5 grow,
After doping with impurities to make it conductive, polysilicon 5 is selectively left on the thin silicon dioxide film by photolithography.

After that, the surface of the polysilicon 50 is covered with an oxide film by thermal oxidation, and then the source/drain regions 4 are formed in a self-aligned manner by ion implantation or the like.

Next, as shown in Fig. 1 Φ), 5
Silicon nitride 6 with a thickness of about 000A to 1 μm is grown.

Next, as shown in FIG. 1C, the entire surface is etched by anisotropic dry etching (RIB), leaving silicon nitride 6 only on the sides of the polysilicon 50 steps as so-called sidewalls. Thereafter, the oxide film on the borinlene 5 and the source/drain/region 4 is removed by wet etching using hydrofluoric acid.

Next, as shown in FIG. 1(d), only the polysilicon 5 is removed with the polysilicon 5 and part of the source/drain region 4 exposed. This includes polysilicon 5
Wet etching is used which has an extremely high selectivity between the silicon dioxide film and the silicon dioxide film.

After that, as shown in FIG. 1(e), a silicon dioxide film 2' as a gate oxide film and a source/drain region 4 are formed.
1 μm thick with part exposed.

After sputtering a certain amount of aluminum containing silicon and steel to prevent alloy spikes and selectively etching it by photolithography to form each electrode wiring 7,
Alloyed to ensure non-resistive contact of each electrode.

〔Effect of the invention〕

As explained above, the present invention utilizes the maskability, heat resistance, and chemical resistance of polysilicon to form source/drain regions, and then replaces them with a gate material with lower layer resistance. Finally, since the gate and wiring are formed of the same material, there is no need for an interlayer insulating film, and therefore high-temperature heat treatment in post-processes such as flow can be omitted. ,sauce·
By taking the drain tact in a self-aligned manner, it is possible to lower the layer resistance of the gate electrode, make the junction shallower between the source and drain regions, and reduce the area of the source and drain regions. Therefore, it is possible to realize a high speed and small MO8 type transistor.

[Brief explanation of drawings]

FIGS. 1(a-1e) are MO8 according to an embodiment of the present invention.
Cross-sectional views of the type transistor at each manufacturing process, Figure 2(a)
-(e) are new views of each manufacturing process of a conventional silicon MOf9 type transistor. l...Silicon semiconductor substrate, 2,2'...
...Silicon dioxide (8i0a), 3.Old...Channel stopper, 4...Source, drain region, 5...Polysilicon, 6...Silicon nitride, 7 ... Electrode wiring, 8 ... Ring glass. A certain 1171 grass 2 figure

Claims (1)

[Claims] After forming the source and drain regions in a self-aligned manner with respect to the gate electrode by providing a masking material in the gate electrode forming portion, removing the masking material,
A method for manufacturing a semiconductor device, characterized in that a gate electrode material is deposited on the removed portion to form a gate electrode.