JPS61256654A - Formation of multilayer interconnection - Google Patents

Abstract

PURPOSE:To eliminate a junction breakdown caused by mutual diffusion of silicon of a silicon substrate and metal of a wiring in a multilayer interconnection and make the etching of the first layer wiring stable and easy by composing the first layer wiring of the three-layer composition of a polycrystalline silicon layer, an aluminum layer and a silicon nitride layer from the bottom to the top. CONSTITUTION:A silicon oxide film 3 is formed on the surface of a silicon substrate 1 which has a P-N junction 2 and an aperture 4 is selectively provided in the film 3. A polycrystalline silicon layer 5 is formed over the silicon oxide film 3 including the surface of the silicon substrate 1 exposed in the aperture 4 by a chemical vapor deposition method. An aluminum layer 6 is formed on the layer 5 by sputtering. Further, titanium is sputtered over the layer 6 in a nitrogen atmosphere. The predetermined pattern of the first layer wiring is formed on the titanium nitride layer 7 with a photoresist film 8 by a photoetching technology. After the titanium nitride film 7 is etched by a reactive ion etching method by utilizing the resist film 8 as a mask, the aluminum layer 6, the polycrystalline silicon layer 5 and the silicon oxide film 3 are etched with the respective etching speeds which are largely different from each other. The photoresist film 8 is removed and the first layer aluminum wiring is formed.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor integrated circuit, and more particularly, to a method for forming multilayer wiring in a semiconductor integrated circuit formed by providing an insulating film between metal wirings. It is.

[Conventional technology]

Conventionally, in the formation of this type of multilayer wiring, the first layer wiring was A titanium nitride film was provided under the metal layer. An example of a method for forming aluminum 21fi wiring using titanium nitride to prevent interdiffusion between silicon and wiring metal will be described below with reference to cross-sectional views of the main steps shown in FIG.

First, as shown in FIG. 2(a), a silicon oxide film 3 is formed on the surface of a silicon substrate 1 having a PN junction 2, and a predetermined opening 4 connecting the silicon substrate and the wiring metal layer is formed in the silicon oxide film 3. Provided for. A titanium nitride film 17 is formed thereon by sputtering titanium in a nitrogen atmosphere. Further, a preformed aluminum layer 6 is formed on top thereof by a sputtering method. Next, as shown in Figure 2(b),
On the aluminum layer 6, an photoresist film 8 having a predetermined shape of the first layer wiring is formed by photolithography.

Next, as shown in FIG. 2(C), using the photoresist l[8 as a mask, reactive ion etching is performed to
Aluminum layer 6 and titanium nitride 111g17 are selected and wired 6
A silicon nitride film 9 is deposited on the silicon oxide film 3 by chemical vapor deposition using plasma, and a predetermined layer is formed on this silicon nitride film 9 to connect the first layer aluminum wiring and the second layer aluminum wiring. Provide an opening. Next, an aluminum film is deposited on the silicon nitride II 9 including the first aluminum wiring layer 6 in the selective openings of the silicon nitride film 9 by a sputtering method, and this aluminum film is selected using a photolithography technique. The second layer aluminum wiring 11 is formed by selectively etching and removing the aluminum wiring. Finally, in order to ensure contact between the wiring layers and stabilize the device characteristics, the
Heat treatment is performed for 0 minutes.

[Problem that the invention seeks to solve]

In the conventional multilayer wiring formation method described above, during the continuous etching of the first aluminum layer and titanium nitride,
Since the etching speed of titanium nitride and the silicon oxide film underlying the titanium nitride are very different, it is difficult to use an etching method. As shown, the disadvantage is that the surface of the silicon substrate 10 extends.

[Means for solving problems]

The method for forming a multilayer wiring according to the present invention includes forming the first layer wiring structure by
From the bottom layer: polycrystalline silicon layer (polysilicon layer), wiring gold 1
It has a three-layer structure: the A layer and the bare titanium film.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

Figure 1 (al to (e)) is a cross-sectional view of the main process of one embodiment of the present invention. First, as shown in Figure 1 (ta), the PN junction 2
A silicon oxide film 3 is formed on the surface of a silicon substrate l having a silicon substrate l, and a predetermined opening 4 is provided in the silicon oxide film 3 to connect the silicon base &1 and the first wiring metal layer. A polysilicon layer 5 is formed on the silicon oxide film 3 by chemical vapor deposition, including the silicon substrate 1 in the openings 4 selectively provided in the silicon oxide film 3. The thickness of the polysilicon layer 5 is 5
00 to 3000 Am degree is good, and this polysilicon layer 5
It is even better if impurities such as arsenic, phosphorus, and holon are added to the aluminum because the polysilicon layer 5 becomes difficult to diffuse into the aluminum. Furthermore, aluminum 46 is deposited on the polysilicon #5 to a thickness of 0.3 to 1.5 μm by sputtering. Then, a titanium nitride film 7 is deposited on the aluminum layer 6 to a thickness of 500 Å to 3000 Å by sputtering titanium in a nitrogen atmosphere. Next, the first
As shown in Figure (b), a predetermined shape of the first layer wiring is formed on the titanium nitride film 7 by photolithography.
form. Next, as shown in FIG. 1C, the titanium nitride film 7 is etched by active ion etching using the photoresist film 8 as a mask, and then the aluminum layer 6 and polysilicon layer 5 are etched with the silicon oxide film 3 at a high etching rate. Continuously etching under different etching conditions. It is preferable that the etching conditions for the titanium nitride film 7 be such that the etching rate is significantly different from that of aluminum, but the etching rates do not necessarily need to be significantly different. The photoresist film 8 is removed and a first M-th aluminum wiring is formed. Next, as shown in FIG. 1(d), a silicon nitride film 9 is deposited on the silicon oxide film 3, including the first layer aluminum wiring 6, by chemical vapor deposition using plasma. 9 is a predetermined opening lO connecting the first layer aluminum wiring and the second layer aluminum wiring.
will be established. Then, as shown in FIG. 1(e), the titanium nitride film 7 is included in the selective opening 10 of the silicon nitride film 9,
An aluminum film is deposited on the silicon nitride film 9 by sputtering, and the aluminum film is selectively etched away using photolithography to form a first layer aluminum wiring 11. Finally, a heat treatment is performed at a temperature of 400 to 500° C. for 10 to 60 minutes to make contact between wiring layers and to stabilize the device characteristics.

〔Effect of the invention〕

As explained above, the present invention has a structure of the first layer wiring consisting of three layers: a polysilicon layer, an aluminum layer, and a titanium nitride film.
Due to the layered structure, even when multilayer wiring is formed, there is no bond breakdown due to interdiffusion between the silicon of the silicon substrate and the wiring metal, and the first layer wiring can be etched stably and easily. .

In a single-layer wiring structure, simply providing a polysilicon layer under the wiring gold PA layer sufficiently prevents bond breakdown due to interdiffusion between the silicon in the silicon substrate and the wiring metal, but in a multilayer wiring structure, a two-layer wiring structure is used. Due to the interdiffusion of wiring metal and silicon to a greater degree, it is no longer sufficient to simply form a polysilicon layer under the wiring metal layer. Therefore, the first
By providing a titanium nitride film on the upper layer of the wiring metal layer, there is no mutual diffusion of metal and silicon in the second and higher wiring layers, and the structure is essentially equivalent to a single layer wiring structure, and the relationship between the silicon in the silicon substrate and the wiring metal is reduced. Interdiffusion is prevented and junction breakdown does not occur. Moreover, since titanium nitride is provided on the upper layer of the first wiring metal layer, after etching the titanium nitride layer, the aluminum layer and the polysilicon layer can be etched successively under etching conditions that have a significantly different etching speed than the silicon oxide film. There is no deterioration of the silicon oxide film on the substrate, and it is possible to stably form the first eyelet wiring.

[Brief explanation of the drawing]

FIGS. 1(a) to 1e) are cross-sectional views of the main steps of a manufacturing method according to an embodiment of the present invention, and FIGS. 2(a) to (d) are cross-sectional views of the main steps of a conventional multilayer wiring forming method. FIG. 3 is a sectional view showing the problems of the prior art. 1...Silicon substrate, 2...PN junction, 3...Silicon oxide film, 4...Silicon oxide film opening, 5...・Polycrystalline silicon, 6・
...First node aluminum wiring layer, 7...
...Titanium nitride film, 8...Photoresist film,
9...Silicon nitride film, 10...Silicon nitride film opening, 11...2nd #th aluminum wiring. Agent Patent Attorney Susumu Uchihara 6゛・Pa・2.%
Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] In sequentially forming a first wiring metal layer, an interlayer insulating film, and a second wiring metal layer on a silicon substrate, the first wiring metal layer is connected to the silicon in the silicon substrate from the bottom layer. 1. A method for forming a multilayer wiring, characterized by forming a three-layer structure of a polycrystalline silicon layer, a wiring metal layer, and a titanium nitride film to prevent interdiffusion with wiring metal.