JPS61256632A - 微細パタ−ン形成方法 - Google Patents

微細パタ−ン形成方法

Info

Publication number
JPS61256632A
JPS61256632A JP60097406A JP9740685A JPS61256632A JP S61256632 A JPS61256632 A JP S61256632A JP 60097406 A JP60097406 A JP 60097406A JP 9740685 A JP9740685 A JP 9740685A JP S61256632 A JPS61256632 A JP S61256632A
Authority
JP
Japan
Prior art keywords
thin film
ion beam
fine pattern
substrate
base substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60097406A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0325008B2 (cg-RX-API-DMAC7.html
Inventor
Kyusaku Nishioka
西岡 久作
Hiroaki Morimoto
森本 博明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP60097406A priority Critical patent/JPS61256632A/ja
Publication of JPS61256632A publication Critical patent/JPS61256632A/ja
Publication of JPH0325008B2 publication Critical patent/JPH0325008B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Drying Of Semiconductors (AREA)
  • Electron Beam Exposure (AREA)
JP60097406A 1985-05-08 1985-05-08 微細パタ−ン形成方法 Granted JPS61256632A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60097406A JPS61256632A (ja) 1985-05-08 1985-05-08 微細パタ−ン形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60097406A JPS61256632A (ja) 1985-05-08 1985-05-08 微細パタ−ン形成方法

Publications (2)

Publication Number Publication Date
JPS61256632A true JPS61256632A (ja) 1986-11-14
JPH0325008B2 JPH0325008B2 (cg-RX-API-DMAC7.html) 1991-04-04

Family

ID=14191617

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60097406A Granted JPS61256632A (ja) 1985-05-08 1985-05-08 微細パタ−ン形成方法

Country Status (1)

Country Link
JP (1) JPS61256632A (cg-RX-API-DMAC7.html)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003054945A1 (fr) * 2001-12-11 2003-07-03 The New Industry Research Organization Procede de formation de motifs fins au moyen d'un faisceau ionique sur un resist multicouche inorganique, dispositif a semi-conducteur, dispositif quantique, composant de micromachine et structure fine produite au moyen de ce procede
JP2008310299A (ja) * 2007-05-15 2008-12-25 Canon Inc 3次元フォトニック結晶の製造方法
JP2008311617A (ja) * 2007-05-15 2008-12-25 Canon Inc ナノ構造体およびナノ構造体の製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003054945A1 (fr) * 2001-12-11 2003-07-03 The New Industry Research Organization Procede de formation de motifs fins au moyen d'un faisceau ionique sur un resist multicouche inorganique, dispositif a semi-conducteur, dispositif quantique, composant de micromachine et structure fine produite au moyen de ce procede
JP2008310299A (ja) * 2007-05-15 2008-12-25 Canon Inc 3次元フォトニック結晶の製造方法
JP2008311617A (ja) * 2007-05-15 2008-12-25 Canon Inc ナノ構造体およびナノ構造体の製造方法

Also Published As

Publication number Publication date
JPH0325008B2 (cg-RX-API-DMAC7.html) 1991-04-04

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