JPS6125644U - microcomputer - Google Patents
microcomputerInfo
- Publication number
- JPS6125644U JPS6125644U JP10992684U JP10992684U JPS6125644U JP S6125644 U JPS6125644 U JP S6125644U JP 10992684 U JP10992684 U JP 10992684U JP 10992684 U JP10992684 U JP 10992684U JP S6125644 U JPS6125644 U JP S6125644U
- Authority
- JP
- Japan
- Prior art keywords
- register
- stack
- pointer register
- microcomputer
- stack pointer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Executing Machine-Instructions (AREA)
- Bus Control (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の一実施例のブロック図、第2図は従来
のマイクロ・コンピュータ内蔵スタックポインタ回路及
びその周辺回路のブロック図である。
図において、1・・・・・・RAM,2・・・・・・メ
モリアドレスポインタ回路、3・・・・・・スタックポ
インタレジスタ回路、4・・・・・・インクリメント・
デイクリメント回路、5−・・・・・出力ラッチ回路、
6・・・・・・入力ラッチ回路、7・・・・・・データ
・パス、8・・・・・・初期値設定回路、,10・・・
・・・システム・リセット時トリがー信号、11・・・
・・・初期値アドレス・データ、てある。FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of a conventional microcomputer built-in stack pointer circuit and its peripheral circuits. In the figure, 1...RAM, 2...memory address pointer circuit, 3...stack pointer register circuit, 4...increment...
Decrement circuit, 5-...output latch circuit,
6...Input latch circuit, 7...Data path, 8...Initial value setting circuit, 10...
...Trigger signal at system reset, 11...
...Initial value address data.
Claims (1)
定レジスタのデータを退避する機能を有スルマイクロコ
ンピュータにおいて、前記n定レジスタに格納されてい
るデータを退避するスタックメモリと、このスタックメ
モリのアドレス情報を記憶するスタックポインタレジス
タと、このスタックポインタレジスタの初期値設定回路
とを備え、システムリセット時に前記スタックポインタ
レジスタを初期設定し、この初期設定されたスタックポ
インタレジスタによって指定されるアドレスから前記特
定レジスタ格納データの退避動作を開始することを特徴
とするマイクロコンビュータ。In a microcomputer that has a function of saving data in a specific register when executing an interrupt processing or subroutine call instruction, there is a stack memory for saving data stored in the n-register, and a stack for storing address information of this stack memory. It includes a pointer register and an initial value setting circuit for the stack pointer register, and initializes the stack pointer register upon system reset, and saves data stored in the specific register from an address specified by the initialized stack pointer register. A microcomputer characterized by starting operation.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10992684U JPS6125644U (en) | 1984-07-20 | 1984-07-20 | microcomputer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10992684U JPS6125644U (en) | 1984-07-20 | 1984-07-20 | microcomputer |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6125644U true JPS6125644U (en) | 1986-02-15 |
Family
ID=30669059
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10992684U Pending JPS6125644U (en) | 1984-07-20 | 1984-07-20 | microcomputer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6125644U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013192774A (en) * | 2012-03-21 | 2013-09-30 | Sophia Co Ltd | Game machine |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5069945A (en) * | 1973-10-24 | 1975-06-11 |
-
1984
- 1984-07-20 JP JP10992684U patent/JPS6125644U/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5069945A (en) * | 1973-10-24 | 1975-06-11 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013192774A (en) * | 2012-03-21 | 2013-09-30 | Sophia Co Ltd | Game machine |
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