JPS61256242A - Method and apparatus for inspecting flaw - Google Patents

Method and apparatus for inspecting flaw

Info

Publication number
JPS61256242A
JPS61256242A JP9771885A JP9771885A JPS61256242A JP S61256242 A JPS61256242 A JP S61256242A JP 9771885 A JP9771885 A JP 9771885A JP 9771885 A JP9771885 A JP 9771885A JP S61256242 A JPS61256242 A JP S61256242A
Authority
JP
Japan
Prior art keywords
signal
value
defect
circuit
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9771885A
Other languages
Japanese (ja)
Other versions
JPH0525061B2 (en
Inventor
Minoru Tanaka
稔 田中
Mitsuyoshi Koizumi
小泉 光義
Yoshimasa Oshima
良正 大島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9771885A priority Critical patent/JPS61256242A/en
Publication of JPS61256242A publication Critical patent/JPS61256242A/en
Publication of JPH0525061B2 publication Critical patent/JPH0525061B2/ja
Granted legal-status Critical Current

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination

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  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Length Measuring Devices By Optical Means (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Closed-Circuit Television Systems (AREA)
  • Manufacturing Of Magnetic Record Carriers (AREA)

Abstract

PURPOSE:To extract a flaw signal with good sensitivity even when the level of a detection signal varies gently and largely as compared with the change of a flaw signal and a noise component is further contained, by calculating the change quantity of an image signal within a definite time and judging a flaw if the absolute value thereof reaches a threshold value or more. CONSTITUTION:A magnetic disc 1 is mounted to a spindle 3 and a photoelectric element 6 is scanned by drive motors 4, 5. The detection signal from the element 6 is amplified by an amplifier 9 to be inputted to an A/D converter 10. Signal processors 16, 17 perform the judgement and renewal of the max. value and min. value of the detection signal and the operation of the difference between both values every time when the signal from the A/D converter 10 is inputted. Then, the absolute value of the change quantity of the detection signals within a gate signal time having a width equal to the size of a flaw generated in a mutually overlapped state through a frequency dividing circuit, an odd circuit 14 and an even circuit 15 is compared with the threshold value set by a thresh old value setting device 18 and, only when said absolute value is larger than the threshold value, the absolute value of the signal change quantity is written in a memory 20 by a writing order 30.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明を工、被検査試料、特に磁気ディスク書膜等の傷
、突起等の欠陥な撮像装置で撮像して検査する欠陥検査
方法及びその装置に関する。
[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a defect inspection method and apparatus for inspecting defects such as scratches and protrusions on a sample to be inspected, particularly a magnetic disk recording film, by imaging them with an imaging device. Regarding.

〔発明の背景〕[Background of the invention]

鋼板あるいは伍気ディスク塗膜等被検査試料の上に存在
する傷、突起などの欠陥を検査する場合、被検査試料を
テレビカメラ等で撮像し、得られた映像信号を閾値で2
値化することにより傷、突起等の欠陥の認識を行なって
いる。検査面の状態が安定な場合には、正常面からの検
出信号は一定であるため、固定の閾値で2値化して欠陥
を抽出することが可能である。しかし検査面の状態が不
安定な場合、例えば磁気ディスク塗膜面の塗膜厚さが変
化している場合には、検出信号Sは第5図のように変化
し、固定閾値で欠陥を認識することが不可能である。
When inspecting defects such as scratches and protrusions on a specimen to be inspected, such as a steel plate or a paint film on a metal disk, the specimen to be inspected is imaged with a television camera, etc., and the obtained video signal is converted to a threshold value of 2.
Defects such as scratches and protrusions are recognized by converting them into values. When the state of the inspection surface is stable, the detection signal from the normal surface is constant, so it is possible to extract defects by binarizing with a fixed threshold value. However, when the condition of the inspection surface is unstable, for example when the coating thickness of the magnetic disk coating surface changes, the detection signal S changes as shown in Figure 5, and defects are recognized using a fixed threshold. It is impossible to do so.

これに対処する方法としては、例えば特開昭54−56
58に示されているような浮動形2値化法がある。これ
は、検出信号Sを縮小、平滑し、更に一定レベルを加減
算したものを閾値として2値化している。これによれば
、例えばプリント板の欠陥検査等の場合には、パターン
および微小欠陥が検出可能である。しかし、第5図に示
したような検出信号Sの場合において、微小欠陥イ〜ホ
を弁別しようとすると背景の変化まで2値化することに
なり、欠陥検出を行なうことができない。この場合には
第5図に示すように、信号の縮小平滑信号L1.L2を
小さくし、固定レベルを加減することにより欠陥イ9口
、二を弁別することができるが、欠陥ハ、ホは検出する
ことができない。欠陥ハ、ホも検出するためには閾値L
1′、(L2#)を第6図のようくしなければならない
。この場合にはハ、ホの2値化の他に、R景も2値化し
てしまい誤検出となる。
As a method to deal with this, for example, JP-A-54-56
There is a floating binarization method as shown in No. 58. This is done by reducing and smoothing the detection signal S, and then adding and subtracting a certain level, which is then binarized using a threshold value. According to this, patterns and minute defects can be detected, for example, in the case of defect inspection of printed circuit boards. However, in the case of the detection signal S shown in FIG. 5, when attempting to discriminate between minute defects I to H, even changes in the background are binarized, making it impossible to detect defects. In this case, as shown in FIG. 5, the reduced smoothed signal L1. By reducing L2 and adjusting the fixed level, defects A9 and 2 can be distinguished, but defects C and E cannot be detected. Threshold value L is required to detect defects C and H.
1', (L2#) must be as shown in FIG. In this case, in addition to the binarization of C and E, the R scene is also binarized, resulting in false detection.

また、一般に浮動闇値法は電気回路の動的応答を利用し
ているので、@食速度を大幅に変化させたい場合や、背
景の変動周期(周波tBL)が異なる試料を検査したい
場合には、電気的時定数を変更せねばならない。これは
手間を要する。
In addition, since the floating dark value method generally utilizes the dynamic response of an electric circuit, it can be , the electrical time constant must be changed. This takes time.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、上記従来の問題点に鑑みて、検出信号
のレベルが欠陥信号の変化に比べて緩やかに大きく変動
し、更に欠陥信号と同程度の周期で変化するノイズ成分
を含む場合にも欠陥信号を感度よく抽出することができ
るようにした欠陥検査方法及びその装置を提供すること
にある。
In view of the above-mentioned conventional problems, it is an object of the present invention to detect a detection signal when the level of the detection signal fluctuates more slowly and greatly than the change in the defect signal, and further includes a noise component that changes at the same period as the defect signal. Another object of the present invention is to provide a defect inspection method and an apparatus therefor, which are capable of extracting defect signals with high sensitivity.

〔発明の概要〕[Summary of the invention]

本発明は撮像装置が被検査試料と相対的に走査して撮像
する際、欠陥にもとづいて得られる欠陥信号はその大き
さは不定であるが、単位時間内の変化量は背景による変
化に比べて著しく大きな値となることに着目し、一定時
間内の映像信号の最大値と最小値の差の絶対値、即ち変
化量を求め、その絶対値がある閾値以上になれば欠陥と
して判定し、ノイズ成分を含む映1象信号から欠陥信号
を感度よ(検出するようにしたことを特徴とするもので
ある。
In the present invention, when the imaging device scans and images the sample to be inspected relative to the sample, the defect signal obtained based on the defect has an indeterminate magnitude, but the amount of change within a unit time is compared to the change due to the background. Focusing on the fact that the value becomes extremely large, the absolute value of the difference between the maximum and minimum values of the video signal within a certain period of time, that is, the amount of change, is determined, and if the absolute value exceeds a certain threshold, it is determined as a defect. It is characterized in that a defect signal is sensitively detected from an image signal containing a noise component.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の実施例を磁気ディスク塗膜検査を例にと
り、第1図から第4図により具体的に説明する。
Embodiments of the present invention will be specifically described below with reference to FIGS. 1 to 4, taking magnetic disk coating inspection as an example.

まず、本発明による欠陥検査方法を第4図により説明す
る。第4図において(A)は欠陥信号イ〜ホを含む検出
信号Sを示し、磁気ディスク塗膜面等の被検査試料の反
射率の変化を光電素子により検出した場合の例である。
First, the defect inspection method according to the present invention will be explained with reference to FIG. In FIG. 4, (A) shows a detection signal S including defect signals A to H, which is an example in which a change in reflectance of a sample to be inspected, such as a coated surface of a magnetic disk, is detected by a photoelectric element.

検出信号Sは欠陥信号イ〜ホの変化に比べて緩やかに大
きく変動しており、更に欠陥信号と同程度の周期で変化
するノイズ成分を含んでいる。これらの検出映像信号の
変動は、塗膜の塗布むらや照°明光の明るさ変動、塗膜
面の表面粗さ等が原因である。(B)は(A)における
欠陥信号二の周辺を時間tの範囲に渡って拡大した検出
信号Sを示しており、欠陥信号二が1時間で変化してい
る様子を示している。(B) において欠陥信号二以外
の検出映像信号Sの微小な変動はノイズ成分である。(
C) ttx時間Wのゲート幅を有するゲート信号をシ
、ハ4 、L、tnの順に走査してい(様子を示してお
り、ゲート幅W時間は、(B) Kおける欠陥信号の変
化時間Tと同等、もしくは僅かに大きい値に設定しであ
る。また次々と発生するゲート信号は、欠陥信号の見落
しをなくすため互いにオーバラップさせることが肝要で
ある。
The detection signal S fluctuates more slowly and greatly than the changes in the defect signals I to H, and further includes a noise component that changes at a period comparable to that of the defect signals. These fluctuations in the detected video signal are caused by uneven coating of the paint film, fluctuations in the brightness of the illumination light, surface roughness of the paint film surface, and the like. (B) shows a detection signal S in which the periphery of defect signal 2 in (A) is expanded over a range of time t, and shows how defect signal 2 changes over an hour. In (B), minute fluctuations in the detected video signal S other than defect signal 2 are noise components. (
C) A gate signal having a gate width of ttx time W is scanned in the order of C, C4, L, and tn. It is important that the gate signals that are generated one after another overlap with each other to avoid overlooking defective signals.

(C)の例ではオー・バラツブ時量子の場合な示曳この
ゲート幅W時間内の検出映像信号Sの信号変化量の絶対
値をノ屓次抽出してい(ことにより欠陥信号イ〜ホを容
易に抽出することが本発明のポイントである。即ち、ゲ
ート幅W時間を欠陥信号の変化時間Tと同等にしたこと
により、検出映像信号Sの緩やかで大きな変動の影響を
受けずに、ゲート幅W時間内での信号変化量の絶対値の
みを正確に抽出できるわけである。
In the example of (C), the absolute value of the signal change amount of the detected video signal S within the gate width W time is extracted every step of the way (thereby, the defect signals I to H are The key point of the present invention is to easily extract the signal.That is, by making the gate width W equal to the change time T of the defect signal, the gate width W can be easily extracted without being affected by gradual and large fluctuations in the detected video signal This means that only the absolute value of the amount of signal change within the time width W can be accurately extracted.

(D)はゲート信号’*/m’、’*気に対応した検出
映像信号Sのゲート幅W時間内における信号変化量の絶
対値SL、〜おと閾値りを示したもので、欠陥信号二の
部分を走査した4、iのゲート信号において閾値りを超
える変化量の絶対値84.Sノが抽出され、他のノイズ
成分のみの変化量の絶対値SA、S、i−,Smとを工
っきり区別できることが判る3以上の原理により、検出
映像信号のレベルが欠陥信号の変化に比べて緩やかに大
きく変動し、更に欠陥信号と同程度の周期で変化するノ
イズ成分を含む場合にも欠陥信号のみを感度よ(安定に
抽出できるようになった。
(D) shows the absolute value SL of the signal change amount within the gate width W time of the detected video signal S corresponding to the gate signal '*/m' and '*Q, and the defect signal The absolute value of the amount of change exceeding the threshold value in the gate signal of 4 and i when scanning the second part is 84. Based on the above three principles, the level of the detected video signal is determined by the change in the defect signal. It is now possible to extract only the defect signal with high sensitivity (and stability) even when it contains a noise component that fluctuates slowly and greatly compared to the defect signal and also changes at a period comparable to that of the defect signal.

第1図乃至第6図は本発明に係る磁気ディスク塗膜面等
の被検査試料の面をyJA旋状に走査して光電素子によ
り欠陥検出を行なう外観検査装置の一実施例について説
明する。
1 to 6 illustrate an embodiment of the visual inspection apparatus according to the present invention, which scans the surface of a sample to be inspected, such as a magnetic disk coating surface, in a yJA spiral shape and detects defects using a photoelectric element.

第1図は本実施例の全体構成を示したもので1はi気デ
ィスク、2は直進テーブル、5をニスビンドル、4,5
はモータ、6.は光電素子、7はリニアエンコーダ、8
はロータリエンコーダ、9は増幅器、10はA/D変換
器、11.12はカウンタ、15は分周回路、14f’
E、0ctd回路、 15 k’L evan回路、1
6.17は信号処理器、18は閾値設定器、19はOR
回路、20はメモリである。
FIG. 1 shows the overall configuration of this embodiment, in which 1 is an i-disk, 2 is a straight table, 5 is a varnished binder, 4, 5
is a motor, 6. is a photoelectric element, 7 is a linear encoder, 8
is a rotary encoder, 9 is an amplifier, 10 is an A/D converter, 11.12 is a counter, 15 is a frequency dividing circuit, 14f'
E, 0ctd circuit, 15 k'L evan circuit, 1
6.17 is a signal processor, 18 is a threshold value setter, 19 is an OR
The circuit 20 is a memory.

欠陥検出は、磁気ディスク1を@進テーブル2上に設け
たスピンドル5に取付け1.駆動モータ4及び5により
光電素子6に対して螺旋状に走査して行なう(第2図)
この検出動作により光を素子6からは塗膜面の明るさに
応じて第4図(A)の如き検出信号Sが増幅器9に、リ
ニアエンコーダ7からは直進テーブル2のR座標がカウ
ンタ11に、ロータリエンコーダ8からはスピンドル5
(磁気ディスク1)のび座標がカウンタ12に出力され
る。第4図(B)は第4図(A)に示す二の部分を拡大
して示した図である。光電素子6からの検出信号は増幅
器9で増幅した後、A/D変換器10に入力する。A/
D変換器1oにおいて1丁、ロータリエンコーダ8から
の出力信号(第4図(E))をクロックとして用い、検
出信号を//Df換して信号処理器16及び信号処理器
17に出力する。信号処理器16,17ではA/D変換
器10からのEOC信号(第4図(F))が入力する毎
に検出信号の最大値、最小値の判定と更新及び差の演算
を行ない、分局回i!l115 、 ocLcL回路1
4、 ay−ル回路15を介して創成したゲート信号時
間内の検出信号変化量の絶対値と閾値設定器18により
設定した闇値を比較し、閾値より大きい場合のみ蒼き込
み命令50によりメモリ20に信号変化量の絶対値を曹
き込む。この時、カウンタ11,12からのR15g 
、θ座標を欠陥の位置情報として用いる。分周回路15
からの出力信号を第4図(G)に、odd回路14から
の出力信号を第4図(H)に、−?−が回路15からの
出力信号を第4図(I)に示す。これらは、第4図(C
)に示したゲート信号を創成するための信号で、ocL
d信号により第4図(C)に示すり、A、m、のゲート
信号を、ttpaル信号により第4図(C)に示すj、
ノのゲート信号を創成する。本実施例においては、分局
クロックの周期を4 、 Od(を信号、#?$3信号
の周期をW 、 odCL信号と一?−か信号の位相差
をIとした。第4図(F)にA/ID変換器1Gからめ
力されるEOe信号を示す。この信号は、検出信号のA
/D変換が終了する毎に出力される信号で、第4図(F
) K示すエンコーダ出力よりΔtだげ遅れて出力され
る。
Defect detection is carried out by attaching the magnetic disk 1 to the spindle 5 provided on the @adc table 2.1. The photoelectric element 6 is scanned in a spiral manner by the drive motors 4 and 5 (Fig. 2).
Through this detection operation, light is transmitted from the element 6 to the amplifier 9 as shown in FIG. , spindle 5 from rotary encoder 8
(Magnetic disk 1) The elongation coordinates are output to the counter 12. FIG. 4(B) is an enlarged view of the second part shown in FIG. 4(A). The detection signal from the photoelectric element 6 is amplified by an amplifier 9 and then input to an A/D converter 10. A/
In the D converter 1o, the output signal from the rotary encoder 8 (FIG. 4(E)) is used as a clock, and the detected signal is converted into //Df and outputted to the signal processor 16 and the signal processor 17. Each time the EOC signal (FIG. 4 (F)) from the A/D converter 10 is input, the signal processors 16 and 17 judge and update the maximum value and minimum value of the detected signal, and calculate the difference. Time i! l115, ocLcL circuit 1
4. Compare the absolute value of the amount of change in the detected signal within the gate signal time created via the ay-leur circuit 15 with the dark value set by the threshold value setter 18, and only if it is larger than the threshold value, write it to the memory 20 by the blue filling command 50. Add the absolute value of the amount of signal change to . At this time, R15g from counters 11 and 12
, θ coordinates are used as defect position information. Frequency dividing circuit 15
The output signal from the odd circuit 14 is shown in FIG. 4 (G), and the output signal from the odd circuit 14 is shown in FIG. 4 (H). - indicates the output signal from the circuit 15 in FIG. 4(I). These are shown in Figure 4 (C
) is a signal for creating the gate signal shown in ocL.
The gate signals of A, m, shown in FIG. 4(C) are controlled by the d signal, and the gate signals of j, shown in FIG. 4(C) are controlled by the ttpal signal.
Creates a gate signal for In this embodiment, the period of the branch clock is 4, the period of the Od(signal is W), the period of the #?$3 signal is W, and the phase difference between the odCL signal and the 1?-C signal is I. Fig. 4 (F) shows the EOe signal input from the A/ID converter 1G.
This is a signal output every time /D conversion is completed, as shown in Figure 4 (F
) The output is delayed by Δt from the encoder output indicated by K.

第S図により信号処理器16.17の構成及び動作を詳
述する。信号処理器16と信号処理器17はゲート信号
かT周期ずれて動作する以外は、構成、動作共全く同一
であるため、信号処理器16につい℃のみ説明する。
The configuration and operation of the signal processors 16 and 17 will be explained in detail with reference to FIG. Since the signal processor 16 and the signal processor 17 are completely the same in structure and operation except that they operate with a T period difference in gate signal, only the signal processor 16 will be explained in terms of degrees Celsius.

図において、21.22はラッチ回路、25,24゜2
6は比較器、25は演算器、27.28.29&工AN
D回路である。
In the figure, 21.22 are latch circuits, 25.24°2
6 is a comparator, 25 is arithmetic unit, 27.28.29 & engineering AN
This is the D circuit.

A//D変換された検出信号(以後A7.信号と記述す
る)は、ラッチ回路21.22及び比較器25゜24i
C入力される。ラッチ回路216ヱ、ocLtL回路1
4からadd信号(第4図(Hン)が出力さ九る毎に、
ラッチをゼロクリアし、ラッチ回路221工adct信
号(第4図(H))が出力される毎に、最大値をセット
する。比較器25つエラッチ回路21にラッチしたデー
タ(MAX )と9o変換器10から出力されたA7.
信号デー タを常時比較し、A7.信号データが大きい
場合(A/D>MAX)には、比較器25から@1”な
る信号を出力し、M山グー) 27カE(X、)”1’
 fL ル(N号ヲANDが取れ、このデータをラッチ
回路21にラッチし、更新する。比軟器24ではラッチ
回路22にラッチしたデータ(MXN )とA’D変換
器10から出力されたA、/6信号データを常時比較し
、A7.信号データが小さい場合(A’D (MIN 
)には、比較器24から”1”なる信号を出力し、AN
Dゲート28がEOeの“1″なる信号とANDが取れ
、このデータをラッチ回路22にラッチし、更新する。
The A//D converted detection signal (hereinafter referred to as A7. signal) is sent to the latch circuits 21 and 22 and the comparator 25°24i.
C is input. Latch circuit 216ヱ, ocLtL circuit 1
Every time the add signal (Figure 4 (H)) is output from 4,
The latch is cleared to zero and the maximum value is set every time the latch circuit 221 outputs the adct signal (FIG. 4(H)). 25 comparators The data (MAX) latched in the error latch circuit 21 and the A7.
Constantly compare signal data, A7. When the signal data is large (A/D>MAX), the comparator 25 outputs a signal @1", and
fL (N) is ANDed, this data is latched in the latch circuit 21, and updated. In the converter 24, the data (MXN) latched in the latch circuit 22 and the A' output from the A'D converter 10 are , /6 signal data are constantly compared, and if A7. signal data is small (A'D (MIN
), a signal of "1" is output from the comparator 24, and the AN
The D gate 28 performs an AND operation with the EOe signal "1", and this data is latched into the latch circuit 22 and updated.

即ち、これらのラッチは比較器25 、24のラッチ信
号とる変挽器10がらのEOC信号の論理積(AND回
路2728でとって行なう)が@1”となった時に行な
う。
That is, these latches are performed when the logical product of the latch signals of the comparators 25 and 24 and the EOC signal of the transformer 10 (which is performed by the AND circuit 2728) becomes @1''.

以上の動作により、任意のゲート内においてラッチ回路
21からはodd M号(第4図(H)によりラッチが
ゼロクリアされた後のA7.信号のMAX値が、ラッチ
回路Z2からはodd信号(第4図(H) Kよりラッ
チに最大値をセットした後のAろ信号のMIN値が出力
される。このA7.信号のhw値と?、iI 閾値を演
算器25に入力し、次のodd信号(第4図(H)が出
力されるまでのる信号のぬ■値とMIN値の差、即ちゲ
ート幅内の検出信号の信号変化量の絶対1直を演算して
比較器26に出力するう比較器26で・工、演算器25
から出力されたゲート幅内の信号変化量の絶対値と閾値
設定器18で設定した閾値を比較し、演算器25から出
力された信号変化量の絶対値が大きい場合(MAX −
MIN )閾値)のみ°1′なる信号をANDゲート2
9【て出力し、od、d−の”1“なる信号とANDを
取り、OR回路19を介してメモリ2oに省き込む。こ
の時、同時にリニアエンコーダ7及びロータリエンコー
ダ8のカウンタ11,12から検出位置のR座像、θ座
標も取り込み、欠陥の位置情報として用いる。メモリ2
oへのデータの書き込みはAND回路29により、比較
器26からの誉き込み信号とodd回路14からのod
d信号(第4図(H))の論理積をとって書き込み命令
5oにより行なう。
As a result of the above operation, the MAX value of the odd M signal (A7. signal after the latch is cleared to zero by FIG. Figure 4 (H) The MIN value of the A filter signal after setting the maximum value in the latch is output from K. The hw value of this A7. signal and the iI threshold are input to the calculator 25, and the next odd The difference between the MIN value and the MIN value of the signal that continues until the signal (Fig. In the comparator 26, the calculation unit 25
The absolute value of the amount of signal change within the gate width outputted from the calculator 25 is compared with the threshold set by the threshold value setter 18, and if the absolute value of the amount of signal change outputted from the arithmetic unit 25 is large (MAX -
AND gate 2
9 and outputs it, ANDs it with the "1" signal of od and d-, and stores it in the memory 2o via the OR circuit 19. At this time, the R-seated image and θ coordinate of the detection position are also taken in from the counters 11 and 12 of the linear encoder 7 and rotary encoder 8, and used as defect position information. memory 2
Data is written to O by an AND circuit 29 using the input signal from the comparator 26 and the odd signal from the odd circuit 14.
The logical AND of the d signal (FIG. 4(H)) is performed by the write command 5o.

以上の説明では、add信号によって信号処理を行なう
信号処理器16についてのみ説明したが、本実施例にお
いては、第1図に示した如(#?’#ル信号によって信
号処理を行なう信号処理器17が併設しである、信号処
理器16と信号処理器17の違いは、前述した如(od
、ct倍信号第4図(H))とgygn信号(第4図(
1))の位相が七周期ずれていることである。これは、
ゲート信号を互いにオーバラップさせて欠陥信号の見落
しを防止したもので、オーバラップ量はゲート@Wの+
以外でもよい。
In the above explanation, only the signal processor 16 that performs signal processing based on the add signal has been explained, but in this embodiment, as shown in FIG. The difference between the signal processor 16 and the signal processor 17, in which the signal processor 17 is installed, is as described above (odd
, ct multiplied signal (Fig. 4 (H)) and gygn signal (Fig. 4 (H))
1) The phase of (1)) is shifted by seven periods. this is,
The gate signals are overlapped with each other to prevent defective signals from being overlooked, and the amount of overlap is the + of gate @W.
Anything other than that is fine.

要はat己、j?−ルの処理が時間的に交互していれば
よい。
The point is at yourself, j? - It is sufficient that the processing of the files alternates in time.

以上、本実施例によれば、前述の欠陥信号抽出を簡単な
回路構成のみで実現したことにより、前記した効果に加
えて欠陥検出の高速化が図れる特徴を有する。
As described above, according to the present embodiment, since the above-mentioned defect signal extraction is realized using only a simple circuit configuration, in addition to the above-described effects, the defect detection speed can be increased.

本実施例でハ磁気ディスクを引例として、検査方法を説
明したが、本発明は8気ディスク以外の試料の検査にも
適用できることは明白である。
In the present embodiment, the inspection method has been explained using a magnetic disk as an example, but it is obvious that the present invention can be applied to inspection of samples other than 8K disks.

更に、本実施例では、A/DK換を用いて検出映像信号
のぬα、MIN値を演算し℃いるが、ピークホールド等
のアナログ的な方法により行うことも出来る。又、本実
施例ではエンコーダクロックを基本にゲートの発生を行
っているが、必ずしも、これを用いる必要はない。即ち
、回転速度が一定のモータを用いた場合には、水晶発振
器などにより非同期なりロックによりA/D変換、ゲー
ト発生等を行っても酵わない。この様にすればより安価
な構成となるが、欠陥の位置情報は実施例に比べて不正
確になる。
Further, in this embodiment, the α and MIN values of the detected video signal are calculated using A/DK conversion, but they can also be performed using an analog method such as peak hold. Further, in this embodiment, the gate is generated based on the encoder clock, but it is not necessarily necessary to use this. That is, when a motor with a constant rotational speed is used, even if A/D conversion, gate generation, etc. are performed asynchronously or locked by a crystal oscillator or the like, no problems occur. This will result in a cheaper configuration, but the defect position information will be more inaccurate than in the embodiment.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、欠陥の大きさと同
等の幅を有するゲート信号を互いにオーバラップするよ
うに実時間で発生させ、該ゲート幅内での検出信号の変
化量の絶対値が設定した閾値を超えた時、欠陥信号と判
定するようにしたので、撮像装置より得られる映像信号
のレベルが欠陥信号の変化に比べて緩やかに大きく変動
し、更に欠陥信号と同程度の周期で変化するノイズ成分
を含む場合においても、欠陥信号を見落しな(感度よく
抽出できる効果を奏する。また本発明によれば簡単な回
路構成でもって欠陥を感度よく検査できる効果を奏する
As explained above, according to the present invention, gate signals having a width equivalent to the size of a defect are generated in real time so as to overlap with each other, and the absolute value of the amount of change in the detection signal within the gate width is When the set threshold is exceeded, it is determined to be a defect signal, so the level of the video signal obtained from the imaging device fluctuates more slowly and greatly compared to the change in the defect signal, and furthermore, the level of the video signal obtained from the imaging device fluctuates more slowly and with a period similar to that of the defect signal. Even when changing noise components are included, defect signals can be extracted with high sensitivity without being overlooked.Furthermore, according to the present invention, defects can be inspected with high sensitivity using a simple circuit configuration.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る欠陥検査方法を実施する実施例を
示した全体構成図、第2図は被検査試料の走査方法を説
明するための平面図、第5図は第1図における信号処理
器の内部構成及び動作を説明するための図、第4図は本
発明の詳細な説明するための図、第5図及び第6図は従
来例を説明するための信号波形図である。 1・・・−気ディスク、2・・・直進テーブル、5・・
・スピンドル、4,5・・・モータ、6・・・光′直管
、7・・・リニアエンコーダ、8・・・ロータリエンコ
ーダ、9・・・アンプ、10・・・A7.変換器、11
,12・・・カウンタ、15・・・分周回路、14・・
・ocht回路、15・・・at6ル回路、16.17
・・・信号処理器、18・・・閾値設定器、19・・・
OR回路、20・・・メモリ、21.22・・・ラッチ
回路、25j24.26・・・比較器、25・・・演算
器、27 、28 、29・・・AND回路、60・・
・曹き込み命令。 第 2 図    第 7 図 第 3 図 EOCOに      L、)υ 第 仝 図
FIG. 1 is an overall configuration diagram showing an embodiment of the defect inspection method according to the present invention, FIG. 2 is a plan view for explaining the method of scanning a sample to be inspected, and FIG. 5 is a signal diagram of the signal shown in FIG. 1. FIG. 4 is a diagram for explaining the internal structure and operation of the processor, FIG. 4 is a diagram for explaining the present invention in detail, and FIGS. 5 and 6 are signal waveform diagrams for explaining the conventional example. 1...-Ki disk, 2... Straight table, 5...
- Spindle, 4, 5...Motor, 6...Optical straight tube, 7...Linear encoder, 8...Rotary encoder, 9...Amplifier, 10...A7. converter, 11
, 12... Counter, 15... Frequency divider circuit, 14...
・ocht circuit, 15...at6 circuit, 16.17
... Signal processor, 18... Threshold value setter, 19...
OR circuit, 20...Memory, 21.22...Latch circuit, 25j24.26...Comparator, 25...Arithmetic unit, 27, 28, 29...AND circuit, 60...
・Soaking command. Fig. 2 Fig. 7 Fig. 3 EOCO L, )υ Fig.

Claims (1)

【特許請求の範囲】 1、被検査試料と撮像装置とを相対的に走査し、欠陥の
大きさと同等の幅を有するゲート信号を互いにオーバラ
ップさせて発生させ、該ゲート信号時間内で上記撮像装
置から得られる映像信号の最大値と最小値の差が、設定
した閾値を超えた時、欠陥として判定することを特徴と
する欠陥検査方法。 2、被検査試料と相対的に走査して撮像する撮像装置と
、ゲート信号をオーバラップして発生するゲート発生回
路、該ゲート発生回路で発生した各ゲート内において上
記撮像装置から得られる映像信号の最大値と最小値の差
信号を演算する演算回路と、該演算回路で演算された差
信号と予め設定された閾値とを比較して欠陥として判定
する比較回路とを設けたことを特徴とする欠陥検査装置
[Claims] 1. The inspection sample and the imaging device are scanned relative to each other, gate signals having a width equivalent to the size of the defect are generated in an overlapping manner, and the above-mentioned imaging is performed within the gate signal time. A defect inspection method characterized in that a defect is determined when a difference between a maximum value and a minimum value of a video signal obtained from a device exceeds a set threshold value. 2. An imaging device that scans and images relative to the sample to be inspected, a gate generation circuit that generates gate signals by overlapping them, and a video signal obtained from the imaging device within each gate generated by the gate generation circuit. The present invention is characterized by being provided with an arithmetic circuit that calculates a difference signal between the maximum value and the minimum value of , and a comparison circuit that compares the difference signal calculated by the arithmetic circuit with a preset threshold value and determines it as a defect. Defect inspection equipment.
JP9771885A 1985-05-10 1985-05-10 Method and apparatus for inspecting flaw Granted JPS61256242A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9771885A JPS61256242A (en) 1985-05-10 1985-05-10 Method and apparatus for inspecting flaw

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9771885A JPS61256242A (en) 1985-05-10 1985-05-10 Method and apparatus for inspecting flaw

Publications (2)

Publication Number Publication Date
JPS61256242A true JPS61256242A (en) 1986-11-13
JPH0525061B2 JPH0525061B2 (en) 1993-04-09

Family

ID=14199670

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9771885A Granted JPS61256242A (en) 1985-05-10 1985-05-10 Method and apparatus for inspecting flaw

Country Status (1)

Country Link
JP (1) JPS61256242A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05273141A (en) * 1992-03-30 1993-10-22 Taiyo Yuden Co Ltd Optical disk inspecting device
JP2006194900A (en) * 2005-01-13 2006-07-27 Komag Inc Method and device for selectively supplying data from test head to processor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05273141A (en) * 1992-03-30 1993-10-22 Taiyo Yuden Co Ltd Optical disk inspecting device
JP2006194900A (en) * 2005-01-13 2006-07-27 Komag Inc Method and device for selectively supplying data from test head to processor

Also Published As

Publication number Publication date
JPH0525061B2 (en) 1993-04-09

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