JPS5821110A - Inspecting device for pattern - Google Patents

Abstract

PURPOSE:To reduce the information contents to be stored and to make the constitution of an inspecting device for patterns simple by storing only the characteristics that patterns ought to be provided for design purposes in a reference data memory and the presence or absence of the design characteristics on scanning lines into a flag memory. CONSTITUTION:Only the pattern codes corresponding to the characteristics that the patterns of every two scanning lines corresponding to scanning windows ought to be provided for design purposes are stored in the respective lines L1, L2- of a reference data memory 137 and the binary coded scanning images are compressed and stored. At the same time, the high level flags generated in accordance with whether >=1 design characteristics on the scanning lines such as edge parts exist or not are stored in a flag memory 138 corresponding to the scanning lines, and the lines of the memory 137 not stored with pattern codes are discriminated. By said system, the information contents to be stored for the purpose of comparison with video patterns are reduced and the constitution of the detecting device for patterns is made simple.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pattern defect inspection method in which a pattern transferred to a mask or reticle is compared with design data forming the pattern in the IC manufacturing process to check whether the pattern has been transferred normally. It is related to the device.

Conventionally, this type of equipment has been inspected by comparing chips with the same pattern group on the same mask, or by developing design data as bit patterns on an image memory.
An inspection method has been devised in which image data obtained from a mask or reticle is compared pixel by pixel.

However, according to the former method, the same defect (
It is impossible to recognize it as a defect if it has a common defect (common defect), and when looking at the reticle die, which is the original plate for creating the mask (2), there are many single patterns of melting, and the chip Comparative method tests were not possible. On the other hand, according to the latter method, since the comparison is made with the data of one head shot for which a pattern is created, it is possible to recognize common defects among chips, and it is possible to inspect even a reticle. However, it takes too much time for the computer to input and output the data, which requires converting the design data into direct weight units and storing it in the image memory. It had the disadvantage of being large and complex.

The present invention solves these shortcomings and provides access to a vast amount of information.
It is an object of the present invention to provide an inspection device that can quickly determine the presence or absence of a defect in a pattern by referring to set d↑ data without worrying about the device storing the pattern.

The gist of the present invention to achieve the above object is to scan a pattern formed on an object to be inspected based on design data, and
(3) scanning means for generating image binary information for converting the image of the pattern into a single image;
and an image generation means for generating design binary information for generating a designed binary image of the pattern based on the design data π, and based on the M-image binary information and the design binary information. In an apparatus that compares the characteristics of an Air AF pattern with the characteristics that the pattern is provided with to check whether or not the pattern is not produced as designed, based on the design binary information, Detecting means for detecting the design features of the Mtl pattern to appear on the scanning gauze of the front H-pi scanning means, and then applying a predetermined binary pressure to the micro-pressure;
When the pixels on the scanning line are divided into a predetermined number of pixels, the number of bits corresponding to the number of divisions is provided, and the detecting means starts from the bit corresponding to the pixel position where the design feature of the pattern should appear. The pattern inspection apparatus is characterized in that it has a storage means for storing a binary stroke symbol of the pattern, and compresses information regarding the design characteristics of the pattern and holds it at 1.

(4) Detailed explanation of the embodiments of the present invention with reference to the drawings below LI,
do.

FIG. 1 is a block diagram showing an embodiment of the present invention.
The object to be inspected, for example, the reticle 1, which is placed on the moving stage 14 and has a pattern drawn thereon, is imaged by the imaging device 2 in only a predetermined small area on the reticle 1. This area becomes one screen to be inspected. Also, reticle 1 is
Transmission illumination is performed by a strobe device 15. Imaging device 2
The analog video signal is converted into a binary image signal by the next binarization circuit 3, and noise removal processing such as smoothing is performed as necessary.

The cutting circuit 4 cuts out binary information corresponding to a local area in one screen, for example, a rectangular area, based on the input of the binary image signal.

This local rectangular area is - for example 16X1 in the image
It is composed of an area corresponding to 6 pixels. This will be explained in more detail with reference to FIG. In FIG. 2, one screen image to be inspected (elephant 100 is the scanning line 1 of the imaging device f2).
Rask scanning is performed by 01. In this embodiment, it is assumed that the number of scanning lines in the image 100 is 1024 in the vertical direction.

Since the pattern on the reticle 1 is generally drawn using chrome on a glass plate, the analog image fψ signal is a time-series signal corresponding to brightness or darkness, that is, a black and white image. The control circuit 5 generates clock pulses 1024 times for each scanning line in the image 1oo, and the binarization circuit 3 samples the analog video signal for each clock pulse and generates a pixelated binary image signal. Output.

The cutout circuit 4 has a 16-bit shift register 104 and a 16-bit shift register 104.
15 stages of 024-bit shift registers 105 are connected in series, and finally a 16-bit shift register 104 is connected in series. The binary image signal is input to the first 16-bit shift register 104, and is sequentially transferred into the serial register array in synchronization with a clock pulse generated by the control circuit 5. As mentioned above, since the analog video signal for one scanning line is binarized by sampling 1024 times, the binary image signal converts the image 100 into 1024 times.
The time series signal is divided into x1024 pixels and each pixel is expressed as a binary logic of "0" or "1".When sampling is performed once in the binarization circuit 3, the serial register string is 1
The logic value corresponding to each pixel is transferred to the next bit. In the embodiment, the binarization circuit 3 samples one scanning line with 1024 clocks, and then samples with 16 clocks during the retrace period, and the extraction circuit 4 also shifts 16 times during the retrace period. be done. And 1
The cutting section 103 consisting of six shift registers 104 is
Binary pixel information of a local rectangular area (hereinafter referred to as a window) 102 of 16×16 pixels in the image 100 is held. Further, as the scanning progresses, the window 102 moves in the image 100 at a rate of one pixel (every one clock pulse), and sequentially extracts binary pixel information from the entire surface of the image 100. Now, this window 10
The binary information of 16×16 pixels extracted in step 2 is input to the corner detection circuit 6 and edge detection circuit 7 shown in FIG. When the bright and dark edges in the window 102 (corresponding to the pattern edges on the reticle 1) are in a predetermined corner pattern prepared in advance, the corner detection circuit 6 detects four edges according to the corner.
Classified into 4, (Outputs information on key players.

The edge detection circuit 7 detects edges that appear to be corners within the window 102 even when, for example, the corners of the imaged pattern on the reticle 1 are rounded due to the influence of the imaging source and are not detected by the corner detection circuit 6. On the other hand, the design data at the time of pattern creation of the reticle 1 stored on the magnetic tape (hereinafter referred to as MT) 9 is stored in the computer 1.
Reads to 0.

As an example, the design data of MT9 stores the entire surface of the reticle as a set of rectangular patterns as shown in FIG. The actual circuit pattern consists of these rectangular patterns.
It is created in combination with Ml&. Here, one rectangular pattern is represented by five parameters: width W, height H, center coordinate values (X, Y) in a predetermined xy coordinate system on the reticle, and rotation angle θ.

In FIG. 1, a WE computer 10 outputs design data corresponding to one screen area on a reticle 1 imaged by an imaging device 2. Based on the input of the design data, the storage circuit 11 detects only the corners of the designed pattern edges at the same time as the above-mentioned corner detection circuit 6, and extracts and stores the 4s type corner information.

At this time, the storage circuit 11 sequentially stores corner information that should be present in one screen from the design data in an order according to the movement of the window 102 described above. And in the memory circuit 11,
For example, all corner information of pattern edges existing on one screen is held. The corner information for one screen is stored in a storage device (not shown) of the computer 10 as information for one screen. During this time, a total of 3! The machine 1θ outputs design data for the next one screen.

As described above, the angle information is extracted from the design data, and the memory circuit 1
The operation of storing the angle information corresponding to all the screens of the reticle 1 in the storage device in the reticle 10 is performed before the actual comparative inspection.

Once the angle information has been accumulated in the storage device of the computer 10 in this manner, the actual inspection is then started. At this time, the computer 10 controls the driving means 13 that moves the stage 14 two-dimensionally to align it with an area corresponding to one screen on the reticle 1 to be imaged. At the same time, the computer 10 transfers the angle information for one screen from the storage device 4 to the storage circuit 11.

Then, in accordance with the clock pulse of the control circuit 5, the angle information in the storage circuit 11 is sent to the angle information extraction circuit 12 for the 11th time. The cutting area of the corner information cutting circuit 12 (hereinafter referred to as the corner cutting circuit 12) is set to be smaller than the window 1□02 described above. The corner cutting circuit 12 sequentially cuts out corner information based on design data in synchronization with clock pulses.

As mentioned earlier, the clock pulse of the control circuit 5 is
Since the window 1θ2 is moved within one screen, the corner cutting circuit 12
The cutout area (hereinafter referred to as a reference window) and the window 102 move in the same direction in synchronization with the clock pulse.

The comparison circuit 8 receives the corner information output from the corner detection circuit 6, the detection result output from the edge detection circuit T, and the corner extraction circuit 12.
When the pattern on the reticle and the pattern on the design data are different, defect information is output to a total of 'x, i10.

Specifically, if there is even one corner information of the same type as the corner information of the corner detection circuit 60 in the reference window information, it is determined that there is no defect. Further, when the corner information is located at the center of the reference window, if the edge detection circuit T detects what appears to be a corner edge or a straight line edge in the window 102, it is determined that there is no defect.

As described above, the comparison circuit 8 compares the corner information obtained from one captured screen with the corner information held in the storage circuit 11, and outputs defect information to the computer 10 in real time. .

Then, if you perform this operation on the entire surface of the reticle,
Thus, defect inspection of one reticle is completed.

In FIG. 1, the control of the strobe device 15 will be described later.

Next, the angle detection circuit 6 will be explained in detail, but before that, the characteristics of the IC pattern will be explained. in general,
The IC pattern is made by combining many rectangular patterns as shown in FIG.

Further, the IC pattern is determined so that the rotation angle θ of the rectangular pattern is 45° or 135° with respect to the xy coordinate system on the reticle. It is extremely rare for the rotation angle θ to be any other value. Therefore, we will consider 9o0 and 135° as the angles of the pattern edges on the reticle 1 or in the design created by combining these rectangular patterns.

FIG. 4 is a diagram showing the classification of corners of pattern edges.

In the figure, 32 squares A to FF indicate areas corresponding to the windows 102 cut out by the cutout circuit 4. In each square, the shaded area indicates a logic "1" area corresponding to, for example, a chrome surface, and the white area indicates a logic "0" area corresponding to a glass surface. 9 corner of pattern edge
If the angles are limited to 0' and 135 degrees, the angles appearing within the window 102 are limited to 32 types as shown in FIG. As a method of classifying angles, it is possible to classify these 32 types as they are into 32, that is, to give them 32 different codes.
Doing so will result in 5 in binary representation for 32 classifications.
Bits (25=32) are required. Therefore, as shown in Figure 4, these 32 types are classified into four.

First, the corner of the pattern edge is classified into two categories (according to angles of 900° and 135°), and for these two classifications, the center point in the window 102 ((approximately the center pixel) of the cut out 16 x 16 pixels) Patterns that are symmetrical with respect to each other are classified into two categories so that they do not fall into the same group, and each of the four categories is given a different code.Furthermore, inverted patterns with the same angle are placed in the same group.In other words, the same In the figure, for example, angles A and B are in an inverted relationship, and these two angles are in the same group.

Thus, among the 90° angles, the angle A-H is OO in binary
The angle I-P is classified as 01 in binary and is 135°.
Among the angles, the angle Q-X is 10 in binary, and the angle Y-FF
As shown in example 11, it is classified into four categories and expressed in 2 bits. Visit,
Binary numbers representing the following four classifications (00,01°10.1
1) is called a code. For example, both angles B and B are 90°.
Although it is an angle, it is given a different code because it has a point-symmetrical relationship. The classification based on point symmetry even in the same horn layer is related to the appearance of corner defects and the comparison operation of the comparator circuit 8. This will be discussed later.

The corner detection circuit 6 is provided with these 32 types of corner patterns as reference patterns, so-called templates, and performs matching with the pattern (bit pattern) appearing in the window 102.

FIG. 5 shows 16×16 bits by a 16-stage register 104 corresponding to the window 102 cut out by the cutout circuit 4 described in FIG.

Here, for example, to detect the corner A or B shown in FIG.
All you have to do is check the logical value of the bit.

Figure 6 shows an AND circuit that detects the corner of A of this person or B. When inputs ■ to ■ are all ``1'' and inputs ■ to 0 are all ``0,''1" is output. Listen, B
In order to detect the angle of , it is sufficient to remove the inverters of inputs 1 to 0 and pass an inverter to each of inputs 2 to 2.

Thirty-two such AND circuits are prepared for each of the 32 (//) type corner patterns shown in Figure 4, and the cutout circuit 4
Binary information from predetermined bits of the 16×16 bits corresponding to the reference pattern is input.

FIG. 7 shows the configuration of an angle detection circuit 6 that detects an angle using the AND circuit as described above and outputs a 2-bit code. The matching circuit 106 is connected to the A-ZZ 32 shown in FIG.
It is composed of 32 AND circuits that each output a logic "1" when a different corner is detected. Each AND circuit is connected to the cut-out section 103 of the cut-out circuit 4 shown in FIG.
Enter value information.

The 32 output signals of matching circuit 106 are divided into four groups. That is, the outputs of the eight AND circuits that detect A-H shown in FIG. 4 are converted into 8-bit data D,
, the outputs of the eight AND circuits that detect I to P are the 8-bit data Dt, the outputs of the eight AND circuits that detect Q-X are the 8-bit data DB, and the eight AND circuits that detect Y to FF are the 8-bit data Dt. Assuming that the output of the circuit is 8-bit data D, each OR circuit 107, 1 has 1.4 8-bit inputs.
Enter 08,109°110. The encoder 111 inputs the four output signals of each OR circuit, encodes the 4-bit binary code, and outputs it as codes C1 and C.

Next, the operation of this circuit will be explained.

For example, when corner 90 appears in the window 102 as shown in FIG. The AND circuit outputs "0". Therefore, among the 8 bits of data D1, 1 bit becomes "1" and 7 bits become rOJ, so the output of OR circuit 107 outputs "1", and the other three OR circuits 108, 109, and 110 output "1". Both output rOJ. At this time, the encoder 111 receives input B.

is "1" and input Bt w Bs * B4 is "0" 2
The binary number obtained by subtracting 1 from the binary number encoded with the value code is output as a 2-bit code C,,C,. That is, in the above case, c, c, =oo.

Moreover, when the corner of the FF shown in FIG. 4 appears in the window 102, the inputs of the encoder 111 are set to "0"
, input B4 becomes "1", so the code is C, C2=1
It becomes 1. The encoder 111 receives inputs B, ~B4.
When any one of these becomes "1", that is, when a corner is detected, a flag F is output. Flag F is set to "1" if a corner is detected, and "0" if not detected.

Next, the edge release circuit 7 shown in FIG. 1 will be explained. Figure 8 shows the 9X9 set for edge detection.
Shows a rectangular area of pixels. This area is located approximately at the center of the aforementioned 16×16 pixels. Therefore, of the 16 x 16 bit cutting section 103 that cuts out information of 16 x 16 pixels shown in FIG.
Edge detection is performed based on information from 20. 9×
The position of the center bit (corresponding to the center pixel) (//) of the 9-bit area 120 is determined to be the (H, 9) bit in the vertical and horizontal directions of the 16×16 bits shown in FIG. The bits to be focused on for bond 11 edge detection are eight bits (2) to (2) located every four bits around the 9×9 bits.

FIG. 9 is a circuit diagram specifically showing the configuration of the edge detection circuit 7. As shown in FIG. Eight exclusive OR circuits (hereinafter referred to as EX-O
Let it be R. ) 121 inputs the binary code from the surrounding 8 bits (1) to (2) of the 9×9 bit area 120. Therefore, if even one of these 8 bits has a different logical value, the OR circuit 122 outputs a logical value "1", indicating that some edge has been detected at each of the 08 inputs of the EX-OR 121. is the focused 8 in the 9×9 bit area 120.
Two bits located next to each other are extracted from among the two bits.

For example, suppose that something like a corner appears in the 9×9 bit area 120 as shown in FIG.

The shaded area is an area of logical value "1". Then, since the inputs ■ and ■ of the (2σ) edge detection circuit 7 and the inputs <1) and ■ have different logical values, the OR circuit 122 has a logical value of "1".
" is output. Further, even if a linear edge simply appears in the region 120, the OR circuit 122 outputs a logical value of "1" by the above-described operation.

The edge detection circuit 7 described above operates in real time as the imaging device 2 scans during reticle inspection. However, in order to more reliably detect that some pattern edge appears in this 9x9 bit area 120, input all the 32-bit binary codes located around the 9x9 bit. Then, check its status as described above. In this case, if all the surrounding 32 bits have the same logical value, it is not an edge of the pattern, but if even one of the 32 bits has a different logical value, an edge is detected.

Next, the storage circuit 11 that reads design data from the MT 9 shown in FIG. 1 and holds corner information will be explained with reference to FIG. 11.

The storage circuit 11 includes a 1024 x 1024 bit frame memory 13 that converts design data into a binary image of "O" and "1" as a design pattern corresponding to one screen.
0 and a frame memory 130 thereof, a successive circuit 131 is provided which reads out time-series binarized codes according to the order of set meals in the imaging device 2. The switch SI is switched to the a(lIIl side when not inspecting, and to the b side when inspecting.b(
A binary image signal from the binarization circuit 3 shown in FIG. 2 is input to Ill. Binary information @133 of a local rectangular area in the frame memory 130 is extracted from the output signal of the readout circuit 131 by the above-mentioned extraction circuit 4.

However, since the bit pattern generated in the frame memory 130 is based on the design data, the rectangular area has good linearity at the boundary between "1" and "0", and the corners are rounded and cut. It can be extracted from an area smaller than the 16×16 bits of the output circuit 4. The extracted binary information 133 is input to a detection circuit 135 similar to the above-mentioned corner detection circuit 6, and the corners are classified into four types. The output 134 of the detection circuit 135 is a code for skipping classification (00, 01, 10°11
) and a flag indicating whether or not a corner has been detected. The input/output control circuit (hereinafter referred to as 110 circuit) 136 is the output 134
Based on the 0 input, the code is stored in the reference data memory 137 and the flag is stored in the flag memory 138.

The above storage operation is performed during non-inspection.

At the time of inspection, V soil, switch 81 is set to B side, and cutout circuit 4
The output information becomes input to the angle detection circuit 6 and edge detection circuit 7 described above. At the same time, the Ilo circuit 136 outputs the code and flag stored in the reference data memory 137 and flag memory 138 as reference information 139.

The readout circuit 131, the Ilo circuit 136, and the cutout circuit 4 operate based on the clock pulse of the control circuit 5 shown in FIG. 111g1. Further, the reference data memory 131 holds corner information only for bit strings in the horizontal direction (scanning direction) in which corners exist in the frame memory 130(2)), and the flag memory 138 holds corner information for bit strings in the horizontal direction (scanning direction) in which corners exist in the frame memory 130 (2). number, here it consists of the same number of bits as 1024 bits, and the frame memory 13
If there is a corner in the horizontal bit string (1024 columns) of 0, "1" is held in the corresponding bit of the flag memory 138, otherwise "0" is held. This operation is all done by Ilo
This is done by circuit 136.

Next, referring to FIG. 12, the operation of the reference data memory 137 to hold corner information will be described.

In FIG. 12, the binary information 133 extracted by the extraction circuit 4 corresponds to a rectangular area 140 (hereinafter referred to as window 140) in the figure. This window 140, as shown by the arrow,
The frame memory 130 is scanned. The reference data memory 137 stores data for one horizontal scan of the window 140.
512 bits are available.

<, 4) (Hereinafter, these 512 bits will be referred to as one line's worth of memory.) When the window 140 horizontally scans a portion with corners as shown in the figure, there are no corners at the beginning of the scan, so The flag of the detection circuit 135 is rOJ, and "0" is written in the first part of the memory for one line.

Then, every time the window 140 scans two bits, one line of memory stores binary logic in the adjacent bits one bit at a time. Therefore, one line of memory compresses 1024 bits of information in the horizontal direction of the frame memory 130 to 1/2 and holds it.

When the movement further advances and the window 140 captures the upper left corner of the pattern 132, the corresponding bit in the memory for one line holds "1" indicating the presence of a corner, and the two bits following that bit hold: Codes C and C output by the detection circuit 135
, is held. And the place where there is no corner is 1
"0" is written to the corresponding bit of the memory for the line. When the window 140 scans the corner area one time in this manner, reference data for one line is created as shown in FIG. 12.

Therefore, if the bit pattern 132 converted into a binary image based on the design data exists as an actual pattern in the frame memory 130 shown in FIG. Information as shown in the diagram is retained. There are four corners on the bit pattern 132, and the detection circuit 135 outputs the code of each corner according to the classification shown in FIG. The reason why there is a corner in the bit pattern in the frame memory 130 is 2.
Since the reference data is only on the horizontal bit string of the book, reference data is held in the reference data memory 137 only in the memory I'l + L2 for two lines. On the other hand, the flag memory 138
Of the 1024 bits, flag data for one screen is created by setting "1" to two bits corresponding to the two horizontal bit strings of the frame memory 130 and setting "0" to all other bits. Ru. In the above explanation, the reference data memory 137 and flag memory 138 are 1024×102
Only the area corresponding to one screen of 4 bits is held, but in reality, before inspecting the reticle for defects based on the input of the video signal of the imaging device 2, one screen of the reticle is calculated from the design data into ησ. Reference data and flag data are created,
It is held in the storage device of the computer 10 mentioned above. For example, if the entire surface of the reticle is divided into 10 x 10, or 100 screens,
If tested, the storage device would require a fixed bit length memory capacity of 1024 x 100 bits for flag data storage. On the other hand, for storage of reference data, a memory capacity of one line of 512 bits is required, corresponding to the number of bits of logic mrB in the flag memory 138. Therefore, for example, 1024X in flag memory 138
If there are 1000 "1"s in 100 bits, a capacity of 512 bits x 1000 lines is required for storing reference data.

By the way, the Ilo circuit 136 is connected to the reference data memory 1
37 and the output 13 of the detection circuit 135 to the flag memory 138.
4, store the data as described above. ``Also, when testing is performed, the stored data is controlled to be sequentially output from each memory as reference information 139. The reference information 139 indicates that the flag in the flag memory 138 is “0”.
If so, output 512 bits of "0" as a time-series logical signal, and if the flag is "1", output one line of data in the reference data memory 137 corresponding to that flag in a time-series manner. .

Next, the corner cutting circuit 12 and comparison circuit 8 which operate during the inspection shown in FIG. 1 will be explained with reference to FIG. 14.

The corner cutting circuit 12 is composed of a series shift register array. A reference window 150 is defined as nine stages of 10-bit registers 160 in the series shift register array.

A 512-bit register 161 is connected in series to each 10-bit register 160.

Reference information 139 from Ilo circuit 136 is sent from 10-bit register 160 to fU! In synchronization with the clock pulse of the I control circuit 5, each bit is transferred to a series of serial shift registers and shifted. The timing of shifting in the direction is such that for the real I yarn, it is shifted once every two clock pulses. 10×9 reference window 150
The binary information 151 for 90 bits is input to the comparator circuit 8 as is.

Here, the operations of the Ilo circuit 136, the corner cutting circuit 12, and the comparison circuit 8 will be explained.

The control circuit 5 controls the first one of one horizontal scanning line shown in FIG.
Before outputting the clock, the circuit 136 checks whether the flag of the bit corresponding to the scanning line in the flag memory 13B is "0" or "1", and if it is "1", the reference data One line of reference data (512 bits) in the memory 137 is output as reference information 139 one bit at a time every two clock pulses. If the flag is "0"
Then, during the horizontal scanning period (1024 clocks), 512 bits of rOJ are output as reference information 139 every two clock pulses. These outputs are sequentially shifted by a series of shift registers. Furthermore, during the retrace time of the imaging device 2, 10 bits of "0" are generated as the reference information 139, and the serial shift register array is also shifted 10 times. In this manner, in response to the start of an examination, the reference data in the reference data memory 138 is sequentially stored in the reference window 1.
It is cut out by 50. From the start of the inspection, the corner detection circuit 6 and the edge detection circuit 7 also operate to output corner information of the pattern on the reticle.

FIG. 15(a) is an example of corner information appearing in the reference window 150. If the bit position of 10×9 bits of the rectangular reference window 150 is expressed as (xy), 3F=4 and y=
The bit string of 8 in the X direction is a logical value taken in from the reference data, and the y column of the function has a logical value "0" taken in due to the flag "0". This is indicated by a "・" mark in the diagram.

As mentioned above, in synchronization with the cutting operation of the corner cutting circuit 12,
The window 102 in one screen showing the reticle pattern shown in FIG. 2 also moves. At this time, the window 102 is the 15th
When a corner of the pattern as shown in FIG.
=00 is output.

When the comparison circuit 8 detects "1" of the flag F, the binary information 151 of the reference window 150 is converted from (x, y) - (1, 1) to 1 at lx, y) = (10, 9)t: Each bit is examined, and when a bit that is set to ``1'' is found, the logical value of the following two bits is compared with the code output by the angle detection circuit 6. If no such code exists in the reference window 150, the comparison circuit 8 outputs information ERR indicating that there is a defect. This comparison is performed when the corners of the pattern (,?/) are formed on the reticle according to the design data.

However, if the corners of the pattern are formed unreliably and the corner detection circuit 6 does not output the flag F, this comparison will not be performed. It is considered that Considering such a case, when the center bit of the reference window 150 in FIG. When there is a corner in the data, the edge detection circuit 7 detects some kind of edge, and if the result is 11'', the comparison circuit 8 determines that there is no defect. Information E
Output RR. Similarly, this information ERR includes not only information regarding the presence or absence of a defect, but also information regarding the location of the defect. This can be easily obtained by counting the clocks of the control circuit 5.

The four classification methods of the corner detection circuit 6 referred to above are related to the above-mentioned comparison method. This will be explained with reference to FIG.

In the figure, the shaded area indicates the pattern on the reticle corresponding to the area of the reference (θ2) window 150, and the dotted line indicates the corner D1 on the design data. Some corners of the pattern on the reticle are missing as a defect. The angle detection circuit 6 detects the angle R+! of the pattern on the reticle.
When classifying R2+ Rs, the code is R1(01)
, R2(oo).

R, (01) Nitoru. On the other hand, only D+(01) exists as a code in the reference window 150.

When the corner R2 of the pattern is detected from the operation of the comparison circuit 8 described above, it is detected as a defect because no identical code exists in the reference window 150.

In this way, if some of the corners of the pattern on the reticle are missing or deformed within the area corresponding to the reference window 150, corners like R1y& and corners like R2 are classified into different categories, i.e. By using different codes, defects can be detected even with a small number of codes.

In this way, the comparison circuit 8 checks the flags and codes present in the reference window 150 when the corner detection circuit 6 outputs a code, so that one screen to be imaged by the imaging device 2 is determined in advance from the design data. Even when there is a slight deviation from the designed design area, inspection can be performed without any correction of the deviation.

In the embodiment of the present invention, the matching circuit in the corner detection circuit 6 detects one corner pattern by, for example, as shown in FIG.
The binary code is extracted from the bits. As shown in this figure, among the 16×16 bits, there is a margin of 1 bit between the extraction bits through which the edge of the bit pattern passes, for example between bits ■ and 0, and between bits ■ and ■. In general, I.T.
A bit pattern imaged and binarized using v or the like does not have smooth straight lines and tends to have irregularities. Therefore,
In order to allow this unevenness and prevent angle detection from becoming impossible, a margin is provided.

Although not shown in the above description of the embodiment, the stage 14
The two-dimensional position of is always measured as coordinate values using a light wave interferometer or the like. The coordinate values of this stage 14 are
If'in machine 10 has 0 power. As an imaging device,
For example, when the ITV 2 images the reticle 1 and starts actual inspection, the machine 10 controls the driving means 13 by +171j in accordance with the coordinate value of the stage 140.

That is, in stage 14, ITv2 is 1 of reticle 1.
When an area corresponding to one screen is imaged and the comparison operation as described above is completed, it moves to image an adjacent area corresponding to one screen. At this time, the ITv2 inputs one screen by the light emission of the strobe device 15 shown in FIG. This will be explained based on FIG. 17.

In FIG. 17, waveform 1 indicates the light emission timing of the strobe device 15, waveform (n) indicates the operation timing of the comparison test as described above, and waveform (C) indicates the timing for one screen from the storage device of the computer 10. The operation timing for transferring reference data and flag data to the storage circuit 11, and ITV2
(v) represents the timing of so-called afterimage erasure, in which the light-receiving surface is charged with discharged charges according to the image.

Now, the area for one screen to be inspected on reticle 1 is ITV
2, that is, when the computer 10 determines that the coordinate value of the stage 14 is a predetermined value, it outputs a light emission start signal to the strobe device 15 at time t. Then, at time t2, charge is generated on the light receiving surface of the ITV 2 in accordance with the pattern image of the area on the reticle 1 to be inspected. From time t, the ITv2 starts scanning, and as described above, the code in the reference data of the storage circuit 11 and
The comparison circuit 8 compares the code output from the corner detection circuit 6 to begin the inspection. Then, at time t3, 1
The inspection of the screen is completed. After time t3, the computer 10
The data for the next one screen (references and flags) accumulated in the storage device of is stored in the reference data memory 137 of the storage circuit 11.
, are transferred to the flag memory 138. When the transfer is completed at time t4, the computer 10 again outputs the light emission amount (p, etc.) start signal to the strobe device 15. time t, and t4
During the so-called transfer period, afterimage erasure of the ITV2 is performed. Here, the stage 14 that moves the reticle 1 is moved by the g-movement means 13 between times t2 and t4 so that the ITV 2 images the next screen.

The above operation is repeated over the entire surface of the reticle 1.

In this way, only when the strobe device 15 emits a flash, the I
Since the Tv2 inputs the image, the stage 14 can actually be moved by continuously controlling the speed, rather than moving it step by step. Then, the coordinate values of the stage 14 measured by the interferometer are
When the value corresponds to one 0th-order screen, the computer 10 may output a light emission start signal. Also, stage 1
4 may be moved at a constant speed, and the strobe device@15 may emit flash light at regular intervals according to the speed, and the above-mentioned comparative inspection, transfer, and afterimage erasing operations may be performed during the flash interval. can. If you do this, stage 14
can be inspected faster than moving in steps.

Further, in the above-described embodiment, the screen on which the ITV 2 images the reticle 1 needs to match the designed area prepared in advance as one screen based on the design data. Therefore, when placing the reticle 1 on the stage 14, the rotational deviation of the reticle is corrected and the origin of the coordinates of the stage 14 is set. This will be explained with reference to FIG.

FIG. 18(a) shows the pattern drawing area 2 in the reticle 1.
01 is subdivided into a matrix. In the figure, one square of the matrix corresponds to one screen area imaged by the ITV2. Reticle 1 is the first
When placed on the stage 14 shown in the figure by simple positioning, the two-dimensional movement of the stage 14, that is, the origin serving as the coordinate reference is set. The origin is set by clearing a counter (not shown) in the drive means 13 to zero. This counter is stage 14
VC is set to represent the coordinate 1 axis, and stage 14
The count value increases or decreases as .

This origin is determined from, for example, an area 202 corresponding to 3×3 screens located at a corner of the drawing area 201. Normally, the origin can be set in only one screen area a in the upper left corner, but if no pattern is formed in area a, the origin is difficult to determine, so just in case, nine areas a = i of the 3 x 3 screen.
Taking this into account, any one of these nine areas is selected and used for setting the origin.

Now, if it is assumed that a pattern 206 is formed in one screen area i of the nine areas, one screen area l is determined as the origin. The solid line shown in FIG. 18(b) represents area 11, that is, one screen shot by ITV2.

Therefore, the needle setting data corresponding to one screen area i is read out from the machine 10 as described above, and stored in the frame memory 130 in the storage circuit 11 shown in FIG. Expand the desired pattern as a bit pattern. Then, the time-series binary code outputted by the readout circuit 131 is input to an image reproduction device, that is, a monitor television, and a designed pattern corresponding to one screen area i is reproduced on the television screen. This area of the television screen is represented by a design area 205 indicated by a broken line in FIG. 18(b). When the image signals of ITV2 are simultaneously reproduced on this television screen, the overlapping state of pattern 206 on reticle 1 and designed pattern 207 can be observed.

The pattern 206 on the reticle 1 moves across the TV screen as the stage 14 moves, so to actually determine the origin, move the stage 14 and align it with the designed pattern 207 on the TV screen. Now, all you have to do is clear the counter mentioned above.

Next, a minute rotational error of the reticle 1 is corrected (diρ). For this, an area corresponding to one screen in areas 203 and 204 located at two locations as far apart as possible from the periphery of the reticle 1 is used.

Now, if we consider the virtual xy coordinates shown in FIG. 18(,) on the reticle 1, each screen area subdivided into a matrix follows these xy coordinates. This x
If each axis of the y-coordinate is not made to coincide with the two-dimensional movement direction of the stage 14, as the stage 14 moves, the I T
V-1) One screen to be captured is out of alignment with the designed area.

Therefore, as explained in FIG. 18(b), a pattern tI having a specific edge parallel to the X axis (referred to as the first horizontal edge) in one screen area j in the area 203 is created without a trench.
Find out by TV. At this time, from the design data,
Also find the y-coordinate value of the edge. When a horizontal edge is found, this one screen area j is reproduced on the television screen as described above. Then, from the design data corresponding to one screen area m in the area 204, a design pattern having a second horizontal edge with the same y coordinate value as the first horizontal edge found in one screen area j is found. This operation is performed by the computer 10. If the pattern is found, stage 14 is performed.
Move parallel to the X axis. Then, one screen area m is IT
An image is taken at V and reproduced on a television screen, so that the first horizontal edge and the second horizontal edge are superimposed.

If there is no second horizontal edge with the same -y coordinate value, the process is repeated by finding the first horizontal edge for one screen area k in area 203. Note that this superposition is achieved by a minute rotation mechanism (not shown) provided on the stage 14.
This is done by slightly rotating the reticle 1 with respect to the stage 14. At this time, the center of rotation is the area 20 of the reticle 1.
A value near 3 is desirable.

In addition, as mentioned above, when setting the origin, it is necessary to select the area on one screen in which the pattern is formed from the nine areas a-1, but this is due to the design of each area prepared during non-inspection. This can be done extremely easily by checking the feature information on the ion computer.

As mentioned in the explanation of FIG. 11, the frame memory 130 and readout circuit 131 do not operate during actual inspection, but by connecting them as shown in FIG. The comparison operation of the comparator circuit 8 can be prohibited for dust and scratches. FIG. 19 shows the connections during actual testing, with switch S being switched to side b. Before the actual comparison inspection, the imaging device 2 scans a plain image without a pattern, that is, an image of only dust and scratches on the light receiving surface. The binary image signal output at this time is input to the frame memory 130 to generate a binary image corresponding to dust and scratches.

If dust or scratches are present, a logic "1" is input to the corresponding bit of the frame memory 130, for example, and if there is no dirt or scratches, a logic "0" is input. Next, when the imaging device 2 starts scanning the original image of the pattern, in synchronization with this scanning,
The succession circuit 131 outputs the logic value of the bit corresponding to one pixel being scanned from the frame memory 130 in time series. The binary decoding of this time series is input to the comparator circuit 8 as the inhibition signal INH. The comparison circuit 8 performs the ratio comparison as described above, and at this time, the inhibition signal INH
For example, if is logic "1", prohibit the comparison operation or
Even if a comparison operation is performed, defect information ERR indicating that there is a defect is not output.

By using the frame memory 130 in this manner, it is possible to prevent dust or dirt on the light-receiving surface from being inspected as if it were a defect in real time. Further, in addition to prohibition due to dust or scratches, it is also possible to manipulate the binary image generated in the frame memory 130 to set an arbitrary area in one screen to be inspected as a comparison prohibition area.

Similarly, it is not necessary to generate a binary image of dust or scratches on the light-receiving surface of the frame memory 130 by capturing it with the imaging device 2 every time one screen is inspected. This is because the position of dust or scratches on the light receiving surface does not change in a short period of time. Therefore, the binary image data of dust and scratches in the frame memory 30 is stored in the computer 1.
0 storage device and transfer it to the frame memory 30 when necessary. Since the amount of garbage increases over time, it is a good idea to update the data from time to time.

/ /'/' / (46) In the embodiment of the present invention, semiconductor 1c manufacturing holes and masks are used for inspection, but the present invention can also be applied to masks for making printed circuit boards by making slight changes. Can apply inventions. In this case, the pattern of the printed circuit board is created using CAD (σ).
The format (computer-aided tesain) is designed so that the take can be handled as design information for this device.
Patterns on reticles and masks, which can be converted (format), are converted into images by scanning the image with an imaging device such as an ITV, but it is also possible to convert the pattern into an image by scanning the pattern directly with a spot such as a laser beam. An image signal may be generated by detecting reflected light, transmitted light, or the like that changes depending on the pattern. In addition, in the embodiment, one corner was detected as a pattern feature, but in addition to that, features related to shapes such as triangles, squares, and circles, and tP! related to changes in edges that appear in the scanning direction when scanning a pattern! It is also possible to detect F characteristics (number of edges, number of pixels from edge to edge 1, etc.) and apply it to the present invention.

Hereinafter, the embodiments of the present invention have been described, but the present invention is based on scanning a pattern on an object to be inspected such as a reticle or a mask using an imaging device 2 and a binarization circuit 3. The frame memory 130 and the readout circuit 131, which serve as image generation means, generate design binary image information for pixelizing the pattern image from the design take to generate a designed binary image of the pattern. After obtaining the information, compare the characteristics of the pattern detected based on the image binary information with the design characteristics of the pattern detected based on the design binary information, and also compare the characteristics of the pattern detected based on the image binary information with the design characteristics of the pattern detected based on the design binary information. When inspecting whether or not the pattern exists, based on the designed binary information, the detecting means and the cutout circuit 4 and the detecting circuit 135 detect design features of the pattern that should appear on the scanning line of the scanning means, such as corners. ℃, and its characteristics are given a flag F as a predetermined binary code and codes C,C.

When the pixels on the scanning line of the scanning means, for example, 1024 pixels, are divided into a predetermined number of pixels, for example, every two pixels, the number of bits corresponding to the number of divisions, for example, 512 bits, is provided, and the design characteristics of the pattern are A reference data memory 137 is provided as a storage means for storing the binary code of the detection means from the bit corresponding to the pixel position where the detection means should appear.

As described above, according to the present invention, the setting fi + binary information is not stored as it is and used for temperature inspection, but only the characteristics that the pattern should have in terms of design are detected, encoded into binary values, and used as a storage means. Since the BC memory is stored in the reference take memory, the amount of information that must be stored is smaller than in the past, and there is an advantage that the space for the storage means can be smaller.Furthermore, the storage means is designed to be stored on the scan line. Since the binary code related to the feature corresponds to the pixel position of the scan line and is compressed and stored, the information related to the actual feature of the pattern detected based on the image binary information can be stored in the feature stored in the storage means. When comparing and collating the information stored in the storage means, the information stored in the storage means can simply be read bit by bit in conjunction with the scanning of the scanning means. It can be realized with less inspection equipment.

Furthermore, as described in the embodiment, a flag memory is provided to indicate whether or not one or more design features exist on a scanning line. Since the information is not stored, the amount of information is further reduced.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing a part of FIG. 1 in detail, especially the cutting circuit 4, and FIG. FIG. 4 is a diagram showing the classification of corners of pattern edges, and FIG. 5 is a diagram showing a window cut out by the cutting circuit 4 shown in FIG. 2. 16x16 bit diagram corresponding to , Figure 6 is a diagram showing an AND circuit that detects the angle to the one shown in Figure 4, Figure 7 is a diagram that detects the corner with the AND circuit shown in Figure 6, and generates a 2-bit code. Figure 8 is a diagram showing a rectangular area of 9 x 9 pixels set for edge detection. Figure 9 is a circuit diagram showing the configuration of the edge detection circuit. Figure 10 is a diagram showing the configuration of the edge detection circuit. FIG. 11 is a diagram showing details of the memory circuit, FIG. 12 is a diagram showing the frame memory in the memory circuit, and FIG. 13 is a diagram showing the 9x9 bit area.
If the bit pattern 132 converted into a value image exists and runs,
A diagram showing information held in the reference data memory 137 and the flag memory 138. FIG. 14 shows the corner cutting circuit 12 and comparison circuit 8 that operate during inspection.
15(a) is a diagram showing an example of angle information appearing in the reference window 150, and FIG. 15(b) is a diagram for explaining with emphasis.
) is a diagram showing a state in which the window 102 captures the corner of the pattern,
FIG. 16 is a diagram showing the pattern on the reticle (hatched area) corresponding to the area of the reference window 150 and the corner (dotted line) on the design data. FIG. 17 is a diagram showing the light emission timing of the strobe device (waveform (A)
FIG. Figure 18 (a) is a diagram showing how the pattern drawing area in the reticle is subdivided into a matrix; Figure 18 (b)
18(a) is a diagram of one screen area l shown in FIG. 18(a) and the corresponding design data reproduced on a television screen. FIG. FIG. 3 is a diagram showing connections during actual inspection of the circuit 8 and the like. (Praise 1 [Explanation of the symbols of the main J9 part] 1・・・・・・・・・・・・・・・・・・・・・・・・
・・・Object to be inspected 2・・・・・・・・・・・・・・・・・・
...... Imaging device 3...
・・・・・・・・・・・・・・・ Binarization circuit −Dou・・・・・・・・・・・・・・・・・・・・・
・ Cutting means 6・・・・・・・・・・・・・・・・・・
......Angle detection circuit 7...
・・・・・・・・・・・・・・・Edge detection circuit 8・
・・・・・・・・・・・・・・・・・・・・・・・・
Comparison circuit 9・・・・・・・・・・・・・・・・・・
・・・・・・Magnetic tape 10・・・・・・・・・・・・
・・・・・・・・・・・・・・・fffit calculator 11・
・・・・・・・・・・・・・・・・・・・・・・・・
・Memory circuit 12・・・・・・・・・・・・・・・・・・
...... Square cutting circuit 130 ......
・・・・・・・・・・・・・・・・・・ Frame memory 131・・・・・・・・・・・・・・・・・・・・・
The readout circuit 133...
・・・・・・・・・・・・・・・ Binary information 135・
・・・・・・・・・・・・・・・・・・・・・・・・
Detection circuit 136・・・・・・・・・・・・・・・
...... I/, 0 circuit 137...
・・・・・・・・・・・・・・・・・・Reference data memory 138・・・・・・・・・・・・・・・・・・
・・・・・・・・・ Flag memory (♂gu) Ro, mouth, mouth 2 insenshin − Sen・■〜し′=■ Obstacle・Seki・Zu・Hi g Kō・【１山巳toren −■・口・藎情国・連・連・口尰閑・■・国・reason・例】ku1mon・爾YO・■士・ ■Usuji Nikken - F list of adventures F-1 and one fujigo ２」 く [JO田L(σneeHiJΣ2ΩL

Claims (1)

[Scope of Claims] A scanning means for scanning a pattern formed on an object to be inspected based on design data to generate image binary information for pixelizing an image of the pattern, and the design data and an image generating means for generating design binary information for generating a design binary image of the pattern based on the image binary information and the design binary information. In an apparatus for inspecting whether or not the pattern is created as designed by comparing the pattern with features that should be provided by the designer, the pattern that should appear on the scanning line of the scanning means is determined based on the design binary information. Detecting means for detecting a design feature of a pattern and assigning a predetermined binary symbol to the feature; The design feature of the pattern (11^ corresponds to the pixel position where it should appear, and a storage means for storing the binary symbol of the detection means from the bit that corresponds to the pixel position where 11^ should appear), 1. A pattern inspection device characterized by compressing and retaining information regarding the pattern.