JPH0224323B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pattern defect inspection in which a pattern transferred to a mask or reticle is compared with design data forming the pattern in the IC manufacturing process to check whether the pattern has been transferred normally. It is related to the device.

Conventionally, this type of equipment has been inspected by comparing chips that have the same pattern group on the same mask, or by developing design data as bit patterns on an image memory and comparing it with image data obtained from a mask or reticle. , an inspection method that compares pixel by pixel was considered. However, according to the former method, if each chip has the same defect (common defect), it is impossible to recognize it as a defect. In many cases, it is a pattern, and tests such as the chip comparison method are not possible. On the other hand, according to the latter method, since the pattern is compared with design data, it is possible to recognize common defects between chips, and it is also possible to inspect a reticle. However, the amount of data that must be prepared by converting the design data into image memory pixel by pixel, that is, the capacity of the image memory, is enormous, and it takes too much time for the computer to input and output it, and the equipment is also large. , it had the disadvantage of being complicated.

It is an object of the present invention to solve these drawbacks and provide an inspection device that can quickly determine the presence or absence of pattern defects by referring to design data without requiring a device that stores a huge amount of information. do.

The gist of the present invention for achieving the above object is a scanning means that scans a pattern formed on an object to be inspected based on design data and generates image binary information for pixelizing an image of the pattern. and image generation means for generating design binary information for generating a designed binary image of the pattern based on the design data,
In an apparatus that compares the characteristics of the pattern and the characteristics that the pattern should have in terms of design based on value information to check whether the pattern is created as designed, based on the design binary information,
detecting means for detecting a design feature of the pattern to appear on the scanning line of the scanning means and giving a predetermined binary code to the feature; A memory means having a number of bits corresponding to the number of divisions and storing a binary code of the detecting means from bits corresponding to pixel positions where design features of the pattern should appear; This pattern inspection device is characterized by compressing and retaining information regarding the above characteristics.

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 1a shows the configuration of a pattern inspection device during inspection, and FIG. 1b shows the configuration of the pattern inspection device before inspection. It is a block diagram. An object to be inspected, for example, a reticle 1, which is placed on the moving stage 14 and has a pattern drawn thereon, is imaged by the imaging device 2 in only a predetermined small area on the reticle 1. This area becomes one screen to be inspected. Further, the reticle 1 is transmitted and illuminated by a strobe device 15. The analog video signal of the imaging device 2 is converted into a binary image signal by the next binarization circuit 3, and is subjected to noise removal processing such as smoothing as necessary.

Based on the input of the binary image signal, the extraction circuit 4
Binary information corresponding to a local area in one screen to be inspected, for example a rectangular area, is extracted. This local rectangular area is composed of, for example, an area corresponding to 16×16 pixels in the image. This will be explained in more detail with reference to FIG. In FIG. 2, one screen of an image 100 to be inspected is raster-scanned by a scanning line 101 of an imaging device 2. In FIG. In the embodiment, it is assumed that the number of scanning lines in the image 100 is 1024 in the vertical direction.

Since the pattern on the reticle 1 is generally drawn using chrome on a glass plate, the analog video signal is a time-series signal corresponding to brightness or darkness, that is, a black and white image. The control circuit 5 is one of the images 100.
Generates 1024 clock pulses per scan line,
The binarization circuit 3 samples the analog video signal for each clock pulse and outputs a pixelated binary image signal.

The cutout circuit 4 includes a 16-bit shift register 10.
It consists of a serial register array in which 15 stages of 4 and 1024-bit shift registers 105 are connected in series, and finally a 16-bit shift register 104 is connected in series. The binary image signal is input to the first 16-bit shift register 104, and is sequentially transferred into the serial register array in synchronization with the clock pulses generated by the control circuit 5. As mentioned above, the analog video signal for one scanning line is binarized by sampling 1024 times, so the binary image signal consists of 100 images 1024×
It is divided into 1024 pixels and becomes a time-series signal in which each pixel is represented by binary logic of "0" or "1". When the binarization circuit 3 performs sampling once, the serial register array is shifted once, and the logical value corresponding to each pixel is transferred to the next bit. In the embodiment, the binarization circuit 3 samples one scanning line with 1024 clocks, and then samples 16 clocks during the retrace period, and the extraction circuit 4 also shifts 16 times during the retrace period. be done. Then, the cutting unit 103 consisting of 16 shift registers 104 extracts the image 10.
0, holds binary pixel information of a local rectangular area (hereinafter referred to as a window) 102 of 16×16 pixels. Further, as the scanning progresses, the window 102 moves in the image 100 pixel by pixel (every clock pulse).
Binary pixel information is sequentially extracted from the entire surface of the image 100. Now, the binary information of 16×16 pixels extracted by this window 102 is input to the corner detection circuit 6 and edge detection circuit 7 shown in FIG. The corner detection circuit 6 is connected to the window 1
When the bright and dark edges in 02 (this corresponds to the pattern edges on reticle 1) are a predetermined corner pattern prepared in advance, 4
Outputs four types of information categorized into: The edge detection circuit 7 uses the window 102 even when the corners of the imaged pattern on the reticle 1 are rounded due to the influence of the imaging optical system and are not detected by the corner detection circuit 6.
Detects the presence of an edge that looks like a corner.

On the other hand, the design data at the time of pattern creation of the reticle 1 stored on the magnetic tape (hereinafter referred to as MT) 9 is read into the computer 10. As an example, the design data of MT9 stores the entire reticle area as a set of rectangular patterns as shown in FIG. Actual circuit patterns are created by complexly combining these rectangular patterns. Here, one rectangular pattern is represented by five parameters: width W, height H, center coordinate values (X, Y) in a predetermined xy coordinate system on the reticle, and rotation angle θ.

In FIG. 1, a computer 10 outputs design data corresponding to one screen area on a reticle 1 imaged by an imaging device 2. In FIG. Based on the input of the design data, the storage circuit 11 detects only the corners of the designed pattern edges simultaneously with the above-mentioned corner detection circuit 6, extracts four types of corner information, and stores them.

Incidentally, at this time, the memory circuit 11 selects one of the design data from the design data in the order according to the movement of the window 102 described above.
Corner information that should exist on the screen is stored sequentially. The memory circuit 11 stores, for example, all corner information of pattern edges present on one screen. The corner information for one screen is stored in a storage device (not shown) of the computer 10 as information for one screen. During this time, the computer 10 outputs design data for the next one screen.

As described above, the operations of extracting the angle information from the design data and storing the angle information corresponding to all the screens of the reticle 1 from the storage circuit 11 to the storage device in the computer 10 are performed before the actual comparison inspection. It will be done.

Once the angle information has been accumulated in the storage device of the computer 10 in this manner, the actual inspection is then started. At this time, the computer 10 controls the driving means 13 that moves the stage 14 two-dimensionally to align it with an area corresponding to one screen on the reticle 1 to be imaged. At the same time, the computer 10 transfers the corner information for one screen from the storage device to the storage circuit 11.

Then, in response to the clock pulse of the control circuit 5, the angle information in the memory circuit 11 is stored in the angle information extraction circuit 1.
2 is sent sequentially. The cutting area of the corner information cutting circuit 12 (hereinafter simply referred to as the corner cutting circuit 12) is set to be smaller than the window 102 described above. The corner cutting circuit 12 sequentially cuts out corner information based on design data in synchronization with clock pulses.

As mentioned earlier, the clock pulse of the control circuit 5 moves the window 102 within one screen.
The cutting area (hereinafter referred to as a reference window) of the corner cutting circuit 12 and the window 102 move in the same direction in synchronization with the clock pulse.

The comparison circuit 8 inputs the corner information outputted by the corner detection circuit 6, the detection result outputted by the edge detection circuit 7, and the information from the corner cutting circuit 12, and detects when the pattern on the reticle differs from the pattern on the design data. outputs defect information to the computer 10.

Specifically, if there is even one corner information of the same type as the corner information of the corner detection circuit 6 in the reference window information, it is determined that there is no defect. Further, when the corner information is located at the center of the reference window, if the edge detection circuit 7 detects something that looks like a corner edge or a simple straight edge in the window 102, it is determined that there is no defect.

As described above, the comparison circuit 8 sequentially compares the corner information obtained from one captured screen with the corner information held in the storage circuit 11, and outputs defect information to the computer 10 in real time. By performing such operations on the entire surface of the reticle, defect inspection of one reticle is completed.

In FIG. 1, the control of the strobe device 15 will be described later.

Next, the angle detection circuit 6 will be described in detail, but before that, the characteristics of the IC pattern will be described. Generally, an IC pattern is made by combining a large number of rectangular patterns as shown in FIG.

In addition, the IC pattern has a rectangular pattern with a rotation angle θ of 45° or
It is set to be 135°. It is extremely rare for the rotation angle θ to be any other value. Therefore, here we will consider 90° and 135° as the angles of the pattern edges on the reticle 1 or in the design created by combining these rectangular patterns.

FIG. 4 is a diagram showing the classification of corners of pattern edges. In the figure, 32 squares A to FF indicate areas corresponding to the windows 102 cut out by the cutout circuit 4. And in each square,
For example, the shaded area indicates a logic "1" area corresponding to a chrome surface, and the white area indicates a logic "0" area corresponding to a glass surface.
Indicates the area of If the angles of the pattern edges are limited to angles of 90° and 135°, the angles appearing within the window 102 are limited to 32 types as shown in FIG. As a method of classifying angles, it is possible to classify these 32 types as they are into 32, that is, give them 32 different codes, but in this case, in order to classify the 32, a 5-bit (2 ⁵ = 32) is required. Therefore, these 32 types are classified into four as shown in Figure 4.

First, the corner of the pattern edge is classified into two categories depending on the angle of 90° and 135°, and for these two classifications, a point is added to the center point in the window 102 (approximately the center pixel of the cut out 16×16 pixels). Things that have a symmetrical relationship are classified into two so that they do not fall into the same group, and each of the four classifications is given a different code. Further, inverted patterns having the same angle are placed in the same group.
That is, in the figure, for example, angles A and B are in an inverted relationship, and these two angles are considered to be in the same group. Thus, among the 90° angles, angles A to H are classified as 00 in binary, angles I to P are classified as 01 in binary, and among the 135° angles, angles Q to X are classified as 10 in binary. , angle Y~
FF is set to 11, and is classified into four categories and expressed in 2 bits. In addition, the binary numbers (00,
01, 10, 11) are called codes. For example, angles B and L are both 90° angles, but because they are point symmetrical, they are given different codes. The reason why even the same angles are classified based on point symmetry is related to the condition of corner defects and the comparison operation of the comparator circuit 8. This will be discussed later.

The corner detection circuit 6 has these 32 types of corner patterns as reference patterns, so-called templates, and performs matching with the patterns (bit patterns) appearing in the window 102.

FIG. 5 shows 16×16 bits formed by a 16-stage register 104 corresponding to the window 102 cut out by the cutout circuit 4 described in FIG.

Here, in order to detect the angle A or B shown in FIG. 4, for example, it is sufficient to check the logical values of the bits . . . and the bits . . .

Figure 6 shows an AND circuit that detects the corner of A or B, and all inputs are "1".
, and when the input ~ is all "0", "1"
Output. Incidentally, in order to detect the angle of B, it is sufficient to remove the inverter at the input ~ and pass the inverter through each of the input ~.

Thirty-two such AND circuits are prepared for each of the 32 types of corner patterns shown in Fig. 4, and are used in cutout circuit 4.
Binary information from predetermined bits corresponding to a reference pattern among 16×16 bits is input.

FIG. 7 shows the configuration of an angle detection circuit 6 that detects an angle using the AND circuit as described above and outputs a 2-bit code. The matching circuit 106 is composed of 32 AND circuits that each output a logic "1" when the 32 types of angles A to ZZ shown in FIG. 4 are detected. Note that each AND circuit receives binary information from the extraction section 103 of the extraction circuit 4 shown in FIG. 2. The 32 output signals of the matching circuit 106 are divided into four groups. That is, the outputs of the _eight AND circuits that detect A to H shown in FIG.
The output of the two AND circuits is converted into 8-bit data D ₂ ,
The outputs of the eight AND circuits that detect Q to X are converted into 8-bit data _D3 , and the
The outputs of the two AND circuits are used as 8-bit data _D4 , and the OR circuits 10 each have four 8-bit inputs.
Enter 7, 108, 109, 110. The encoder 111 inputs the four output signals of each OR circuit, encodes the 4-bit binary signals, and outputs them as codes C ₁ and C ₂ .

Next, the operation of this circuit will be explained.

For example, when the corner of C shown in FIG. The AND circuit outputs "0". Therefore, among the 8 bits of data _D1 ,
Since 1 bit is "1" and 7 bits is "0",
The output of the OR circuit 107 outputs "1", and the other 3
The OR circuits 108, 109, and 110 all output "0". At this time, the encoder 111 is
Input B ₁ is “1” and inputs B ₂ , B ₃ , B ₄ are “0”.
2 minus 1 from the binary number that encoded the value signal
Outputs the base number as 2-bit codes C ₁ and C ₂ .
That is, in the above case, C ₁ C ₂ =00.

Moreover, when the corner of FF shown in FIG. 4 appears in the window 102, the input of the encoder 111 becomes the input B ₁
~B ₃ becomes "0" and input B ₄ becomes "1", so the code becomes C ₁ C ₂ =11. Note that the encoder 111 is
When any one of the inputs _B1 to _B4 becomes "1", that is, when a corner is detected, a flag F is output. Flag F is "1" if a corner is detected,
If not detected, "0" is set.

Next, the edge detection circuit 7 shown in FIG. 1 will be explained. FIG. 8 shows a rectangular area of 9×9 pixels set for edge detection. This area is located approximately at the center of the 16×16 pixels mentioned above.
Therefore, edge detection is performed based on information from an area 120 made up of 9 x 9 bits out of the 16 x 16 bit cutting section 103 that cuts out information of 16 x 16 pixels shown in FIG. . Furthermore, 9x9 bit area 1
The position of the 20 center bits (corresponding to the center pixel) is determined to be (H, 9) bits in the vertical and horizontal directions of the 16×16 bits shown in FIG. Note that the bits to be focused on for edge detection are eight bits located every four bits around the 9×9 bits.

FIG. 9 is a circuit diagram specifically showing the configuration of the edge detection circuit 7. As shown in FIG. Eight exclusive OR circuits (hereinafter referred to as EX-OR) 121 receive binary signals from the peripheral 8 bits of the 9×9 bit area 120. If even one of these 8 bits has a different logical value, the OR circuit 122 outputs a logical value of "1", indicating that some edge has been detected. Each of the inputs of the eight EX-ORs 121 is taken out from two bits located next to each other among the eight bits of interest in the 9×9 bit area 120.

For example, something that looks like a corner as shown in Figure 10 is 9x9
Suppose that it appears in the bit area 120. The shaded area is an area of logical value "1". Then, since the input of the edge detection circuit 7 and the input have different logic values, the OR circuit 122 outputs a logic value of "1". Furthermore, even if a straight edge simply appears in the region 120, the above operation will allow
The OR circuit 122 outputs a logical value of "1".

The edge detection circuit 7 described above operates in real time as the imaging device 2 scans during reticle inspection. Note that in this 9x9 bit area 120,
In order to more reliably detect the appearance of some pattern edge, it is sufficient to input all the binary signals of 32 bits located around the 9×9 bits and check their states as described above. In this case, the surrounding
If all 32 bits have the same logical value, it is not an edge of the pattern, but if even one of the 32 bits has a different logical value, an edge is detected.

Next, the memory circuit 11 that reads design data from the MT 9 shown in FIG. 1 and holds corner information will be explained with reference to FIG. 11.

The storage circuit 11 includes a 1024 x 1024 bit frame memory 130 that converts design data into a binary image of "0" and "1" as a design pattern corresponding to one screen, and from the frame memory 130, A readout circuit 131 that reads out time-series binary signals according to the scanning order of the imaging device 2 is provided. The switch _S1 is switched to the a side during non-inspection and to the b side during inspection. A binary image signal from the binarization circuit 3 shown in FIG. 2 is input to the b side. Binary information 133 of a local rectangular area in frame memory 130 is extracted from the output signal of readout circuit 131 by cutout circuit 4 described above. however,
Since the bit pattern generated in the frame memory 130 is based on the design data, the rectangular area has good linearity at the boundary between "1" and "0" and has sharp corners, making it easy to cut out the circuit. It can be extracted from an area smaller than the 16 x 16 bits of 4. The extracted binary information 133 is input to a detection circuit 135 similar to the above-mentioned corner detection circuit 6, and the corners are classified into four types. The output 134 of the detection circuit 135 consists of a code (00, 01, 10, 11) representing the classification and a flag indicating whether or not a corner has been detected. The input/output control circuit (hereinafter referred to as I/O circuit) 136 is based on the input of the output 134, and the code is stored in the reference data memory 137.
The flag is stored in the flag memory 138.

The above storage operation is performed during non-inspection. At the time of inspection, switch _S1 is set to the b side, and the cutout circuit 4 is
The output information becomes input to the angle detection circuit 6 and edge detection circuit 7 described above. At the same time, I/O circuit 136
The reference data memory 137 and the flag memory 13
Reference information 139 for the code and flag stored in 8
Output as . In addition, the readout circuit 131, I/O
The circuit 136 and the cutout circuit 4 operate based on the clock pulses from the control circuit 5 shown in FIG. Further, the reference data memory 137 includes the frame memory 1
The flag memory 13 holds corner information only for bit strings in the horizontal direction (scanning direction) where corners exist in the flag memory 13.
8 is the same number of bits as the vertical bit number of the frame memory 130, here 1024 bits, and if the horizontal bit rows (1024 columns) of the frame memory 130 have a corner, the corresponding flag memory 138 If the bit is "1", it is "0"
is retained. This operation is all performed by the I/O circuit 13.
6.

Next, using FIG. 12, reference data memory 1
The operation of No. 37 to hold angle information will be described.

In FIG. 12, the binary information 133 extracted by the extraction circuit 4 corresponds to a rectangular area 140 (hereinafter referred to as window 140) in the figure. This window 14
0 scans through the frame memory 130 like the arrow. The reference data memory 137 has a window 140
512 bits are prepared for one horizontal scan. (Hereinafter, these 512 bits will be referred to as one line's worth of memory.) When the window 140 horizontally scans a portion with corners as shown in the figure, there are no corners at the beginning of the scan, so the detection circuit 135 The flag is "0", and "0" is written in the first part of the memory for one line. It should be noted that every time the window 140 is scanned for 2 bits, binary logic is stored in the adjacent bit by 1 bit in the memory for one line. Therefore, one line of memory compresses 1024 bits of information in the horizontal direction of the frame memory 130 to 1/2 and holds it.

As the scanning progresses further, the window 140 becomes the pattern 132.
When the upper left corner of
The code C ₁ C ₂ output by 35 is retained. Then, where there is no corner, "0" is written to the corresponding bit in the memory for one line. When the window 140 scans the corner area one time in this manner, reference data for one line is created as shown in FIG. 12.

Therefore, if the bit pattern 132 converted into a binary image based on the design data exists in the frame memory 130 shown in FIG. 11 as an actual pattern, the reference data memory 137 and the flag memory 138 contain Information as shown in the diagram is retained. There are four corners on the bit pattern 132,
The detection circuit 135 outputs the code of each corner according to the classification shown in FIG. Incidentally, since the bit pattern in the frame memory 130 has corners only on two horizontal bit strings, the reference data memory 137 has memory for two lines.
Reference data is held only in L ₁ and L ₂ . on the other hand,
The flag memory 138 stores flags for one screen, out of 1024 bits, two bits corresponding to the two horizontal bit strings of the frame memory 130 are set to "1", and all other bits are set to "0". Data is created. In addition, in the above explanation, reference data memory 1
37 and flag memory 138 hold only an area corresponding to one screen of 1024 x 1024 bits, but in reality, before inspecting the reticle for defects based on the input of the video signal of the imaging device 2, Reference data and flag data are created from the design data for each screen and are held in the storage device of the computer 10 described above. For example, if the entire surface of the reticle is divided into 10 x 10, or 100 screens, for inspection, the storage device will be used to store flag data in 1024
A fixed bit length memory capacity of 100 bits is required. On the other hand, for storing reference data,
A memory capacity corresponding to one line of 512 bits is required for the number of logic "1" bits in the flag memory 138. Therefore, for example, in the flag memory 138
If there are 1000 "1"s in 1024 x 100 bits, a capacity of 512 bits x 1000 lines is required for storing reference data.

By the way, the I/O circuit 136 includes the detection circuit 13 in the reference data memory 137 and the flag memory 138.
Based on the output 134 of 5, the data is stored as described above. Further, during inspection, control is performed so that the stored data is sequentially output from each memory as reference information 139. The reference information 139 is
If the flag in the flag memory 138 is "0", 512 bits of "0" are output as a time-series logic signal, and if the flag is "1", one line of the reference data memory 137 corresponding to that flag is output. Output the data in chronological order.

Next, the corner cutting circuit 12 and comparison circuit 8 which operate during the inspection shown in FIG. 1 will be explained with reference to FIG. 14.

The corner cutting circuit 12 is composed of a series shift register array. Of the series shift registers,
A reference window 150 is defined as nine stages of 10-bit registers 160 arranged in a row. A 512-bit register 161 is connected in series to each 10-bit register 160.

The reference information 139 from the I/O circuit 136 is 10
One bit at a time is transferred from the bit register 160 to the serial shift register array and shifted in synchronization with the clock pulse of the control circuit 5. Incidentally, the timing of the shift is actually such that it shifts once every two clock pulses. The binary information 151 for 90 bits (10×9 bits) of the reference window 150 is input to the comparator circuit 8 as is.

Here, the operations of the I/O circuit 136, the corner cutting circuit 12, and the comparison circuit 8 will be explained.

Before the control circuit 5 outputs the first clock of one horizontal scanning line shown in FIG.
36 checks whether the flag of the bit corresponding to the scanning line in the flag memory 138 is "0" or "1", and if it is "1", the reference data memory 13
Reference data for that one line in 7 (512 bits)
is output as reference information 139 one bit at a time every two clock pulses. If the flag is "0", during that horizontal scan period (1024 clocks),
512 bits of “0” as reference information 139
Output every clock pulse. These outputs are sequentially shifted by a series of shift registers. Also, during the retrace time of the imaging device 2, 10 bits of "0" are generated as reference information 139, and the serial shift register array is also shifted 10 times. In this way, in response to the start of the test, the reference data memory 1
The 38 reference data are sequentially extracted by the reference window 150. Note that from the start of the inspection, the corner detection circuit 6 and edge detection circuit 7 are also activated to output corner information of the pattern on the reticle.

FIG. 15a appears in the reference window 150. This is an example showing angle information. The rectangular reference window 150
If the bit position of 10×9 bits is expressed as (x, y), the bit strings in the x direction at y=4 and y=8 are logical values taken from the reference data, and the other y columns are flags. The logical value “0” is captured by “0”. In addition, this is represented by a mark "・" in the figure.

As described above, in synchronization with the cutting operation of the corner cutting circuit 12, the window 102 in one screen in which the reticle pattern is imaged, shown in FIG. 2, also moves. At this time, when the window 102 captures a corner of the pattern as shown in FIG. 15b, the corner detection circuit 6 sets the flag F to "1" and outputs C ₁ C ₂ =00 as the code.

When the comparison circuit 8 detects "1" in the flag F, the comparison circuit 8 converts the binary information 151 of the reference window 150 into (x, y).
Check each bit from = (1, 1) to (x, y) = (10, 9), and if you find a bit that is set to "1", check the logical value of the following 2 bits and the angle detection circuit. Compare with the code output by 6. if,
If no such code exists in the reference window 150, the comparison circuit 8 outputs information ERR indicating that there is a defect. This comparison is performed when the corners of the pattern are formed on the reticle in accordance with the design data. However, if the corners of the pattern are formed uncertainly and the corner detection circuit 6 does not output the flag F, this comparison will not be performed. It is considered that Considering such cases, the first
When the center bit of the reference window 150 in Fig. 5a, for example, the bit of (x, y) = (6, 5), becomes "1", that is, when there is a corner in the design data,
When the edge detection circuit 7 detects some kind of edge,
If the result is "1", the comparison circuit 8 outputs information ERR indicating that there is no defect. Furthermore, this information
ERR includes information not only about the presence or absence of defects, but also about the location of the defects. This can be easily obtained by counting the clocks of the control circuit 5.

Furthermore, the four classification methods of the corner detection circuit 6 are related to the above-mentioned comparison method. This will be explained with reference to FIG. In the figure, the hatched area indicates a pattern on the reticle corresponding to the area of the reference window 150, and the dotted line indicates the corner _D1 on the design data. Some corners of the pattern on the reticle are missing as a defect. When the angle detection circuit 6 classifies the angles R ₁ , R ₂ , and R ₃ of the pattern on the reticle, the code is R ₁
(01), R ₂ (00), R ₃ (01). On the other hand, reference window 1
50, only D ₁ (01) exists as a code.

From the operation of the comparison circuit 8 described above, the pattern angle R ₂
When this is detected, since no identical code exists in the reference window 150, this is detected as a defect.

In this way, if some of the corners of the pattern on the reticle are missing or deformed within the area corresponding to the reference window 150, corners such as R ₁ and R ₃ and corners such as R ₂ are separated. By classifying the code into different codes, defects can be detected even with a small number of codes.

In this way, the comparison circuit 8 checks the flags and codes present in the reference window 150 when the corner detection circuit 6 outputs a code, so that one screen to be imaged by the imaging device 2 is determined in advance from the design data. Even when there is a slight deviation from the designed design area, inspection can be performed without any correction of the deviation.

Further, in the embodiment of the present invention, the angle detection circuit 6
In order to detect one corner pattern, the matching circuit inside extracts a binary signal from bits out of 16×16 bits, as shown in FIG. 5, for example.
As shown in this figure, among the 16×16 bits, there is a margin of 1 bit between the extraction bits, such as bits, through which the edge of the bit pattern passes. Generally, a bit pattern imaged and binarized by an ITV or the like does not have smooth straight lines and tends to have irregularities. Therefore, in order to allow this unevenness and prevent angle detection from becoming impossible, a margin is provided.

Although not shown in the above description of the embodiment, the two-dimensional position of the stage 14 is always measured as coordinate values using a light wave interferometer or the like. The coordinate values of this stage 14 are input to the computer 10. When the imaging device, for example ITV 2, images the reticle 1 and starts an actual inspection, the computer 10 controls the driving means 13 according to the coordinate values of the stage 14. That is, stage 14 is
When the ITV 2 images an area of one screen of the reticle 1 and completes the comparison operation as described above, it moves to image an adjacent area of one screen. At this time, one screen is input to the ITV 2 by the light emission of the strobe device 15 shown in FIG. This will be explained based on FIG. 17.

In FIG. 17, waveform A is the strobe device 15.
Waveform B is the operation timing of the comparison test as described above, and waveform C is the operation timing of transferring one screen worth of reference data and flag data from the storage device of the computer 10 to the storage circuit 11. , and the timing of so-called afterimage erasure, in which the light-receiving surface of the ITV 2 is charged with discharged charges according to the image.

Now, when the area for one screen to be inspected on the reticle 1 is located directly under the ITV 2, that is, when the computer 10 determines that the coordinate values of the stage 14 are predetermined values, the strobe device 15 starts emitting light at time _t1 . Output a signal. And at time t ₂ ITV
Charge is generated on the light-receiving surface of 2 according to the pattern image of the area on the reticle 1 to be inspected. From time _t2 , the ITV 2 starts scanning, and as mentioned above, the code in the reference data of the storage circuit 11 and
The comparison circuit 8 compares the code outputted by the corner detection circuit 6 to begin the inspection. Then, at time _t3 , the inspection for one screen is completed. The next one stored in the storage device of the computer 10 after time _t3
Data for the screen (references and flags) is stored in memory circuit 1
1 reference data memory 137, flag memory 13
Transferred to 8. When the transfer is completed at time _t4 , the computer 10 again sends the light emission start signal to the strobe device 1.
Output to 5. Between times t ₃ and t ₄ , during the so-called transfer period, afterimage erasure of the ITV 2 is performed. Here, the stage 14 that moves the reticle 1 starts at time t ₂
to _t4 , the ITV 2 is moved by the driving means 13 so as to capture the next screen.

The above operations are repeated over the entire surface of the reticle 1.

In this way, since the ITV 2 inputs images only when the strobe device 15 emits a flash, the stage 14 is not moved step by step, but is moved by continuously controlling the speed. Can be done. Then, when the coordinate value of the stage 14 measured by the interferometer is a value corresponding to the next one screen of the reticle 1, the computer 10 may output a light emission start signal. Further, the stage 14 is moved at a constant speed, and the flashing device 15 is emitted at fixed intervals according to the speed, and the above-mentioned comparative inspection, transfer, and afterimage erasing operations are performed during the flashing interval. You can also do that. In this way, inspection can be performed faster than when the stage 14 is moved step by step.

In addition, in the above embodiment, ITV2 is the reticle 1
One screen to be imaged needs to match a designed area prepared in advance as one screen based on design data. For this reason, reticle 1
When placing the reticle on the stage 14, the rotational deviation of the reticle is corrected and the origin of the coordinates of the stage 14 is set. This will be explained with reference to FIG.

FIG. 18a is a diagram showing how the pattern drawing area 201 in the reticle 1 is subdivided into a matrix. In the figure, one square of the matrix corresponds to one screen area imaged by the ITV2. The reticle 1 is at the stage 14 shown in FIG.
When the stage 14 is placed on the stage 14 through simple positioning, an origin serving as a reference for two-dimensional movement of the stage 14, ie, coordinates, is set. The origin is set by clearing a counter (not shown) in the drive means 13 to zero. This counter is designed to represent the coordinate value of the stage 14, and the counted value increases or decreases as the stage 14 moves.

This origin is determined from, for example, an area 202 corresponding to 3×3 screens located at a corner of the drawing area 201. Normally, the origin can be set in only one screen area a in the upper left corner, but if no pattern is formed in area a, the origin cannot be determined, so just in case, nine areas a to i of the 3 x 3 screen are set. Considering this 9
Select one of these areas and use it for setting the origin.

Now, among these nine areas, in one screen area i,
Assuming that some pattern 206 is formed, one screen area i is determined as the origin. The solid line shown in FIG. 18b represents area i, that is, one screen imaged by ITV2. Therefore, the design data corresponding to one screen area i is read out from the computer 10 as described above, and the bit pattern that should exist in the design is stored in the frame memory 130 in the storage circuit 11 shown in FIG. Expand as. Then, the time-series binary signal outputted by the readout circuit 131 is input to an image reproduction device, that is, a monitor television, and a designed pattern corresponding to one screen area i is reproduced on the television screen. This area of the television screen is represented by a design area 205 shown in broken lines in FIG. 18b. When the image signals of ITV2 are simultaneously reproduced on this television screen, the overlapping state of pattern 206 on reticle 1 and designed pattern 207 can be observed.

The pattern 206 on reticle 1 is stage 1
4 moves across the TV screen, so in order to actually determine the origin, move the stage 14 to find the designed pattern 207 on the TV screen.
When the above is superimposed, the above-mentioned counter can be cleared.

Next, minute rotation errors of the reticle 1 are corrected. For this purpose, areas corresponding to one screen of areas 203 and 204 located at two locations on the reticle 1 as far apart as possible from the periphery are used.

Now, if we consider the virtual x and y coordinates shown in FIG. 18a for the reticle 1, each screen area subdivided into a matrix follows these x and y coordinates. Each axis of this xy coordinate is
If the two-dimensional movement direction of the stage 14 is not matched, one screen captured by the ITV will deviate from the designed area as the stage 14 moves.

Therefore, as explained in FIG. 18b, first, a pattern having a specific edge parallel to the x-axis (referred to as the first horizontal edge) is created in one screen area j in the area 203 using ITV. Find it. At this time, the y-coordinate value of the edge is also determined from the design data. When a horizontal edge is found, this one screen area j is reproduced on the television screen as described above.
Then, from the design data corresponding to one screen area m in the area 204, a design pattern having a second horizontal edge having the same y coordinate value as the first horizontal edge found in one screen area j is found. Note that this operation is performed by the computer 10. If the pattern is found, the stage 14 is moved parallel to the x-axis.
Then, one screen area m is imaged by the ITV, reproduced on the television screen, and the first horizontal edge and the second horizontal edge are superimposed. If there is no second horizontal edge with the same y-coordinate value, the process is repeated by finding the first horizontal edge for one screen area k in area 203. Note that this superposition is performed by slightly rotating the reticle 1 with respect to the stage 14 by a minute rotation mechanism (not shown) provided on the stage 14. At this time, the center of rotation is preferably near the area 203 of the reticle 1. In addition, as mentioned above, when setting the origin, it is necessary to select the area on one screen in which the pattern is formed from nine areas a to i, but this is due to the design of each area prepared during non-inspection. This can be done extremely easily by examining the feature information using the computer 10.

Furthermore, as described in the explanation of FIG. 11, during actual inspection, the frame memory 130, the readout circuit 1
31 does not operate, but by connecting it as shown in FIG. 19, it is possible to prohibit the comparison operation of the comparison circuit 8 with respect to dust or scratches attached to the light receiving surface of the imaging device 2. FIG. 19 shows the connections during actual testing, with switch _S1 being switched to side b.
Before the actual comparative inspection, the imaging device 2 scans a plain image without a pattern, that is, an image showing only dust and scratches on the light receiving surface. The binary image signal output at this time is input to the frame memory 130 to generate a binary image corresponding to dust and scratches. If dust or scratches are present, a logic "1" is input into the corresponding bit of the frame memory 130, for example, and if there is no dirt or scratches, a logic "0" is input. Next, when the imaging device 2 starts scanning the original image of the pattern, in synchronization with this scanning, the readout circuit 131 reads the logic value of the bit corresponding to one pixel being scanned from the frame memory 130 in time series. Output. This time-series binary signal is input to the comparison circuit 8 as the inhibition signal INH. The comparison circuit 8 performs the comparison test as described above, and at this time, the inhibition signal
For example, if INH is logic "1", the comparison operation is prohibited, or even if the comparison operation is performed, the defect information ERR indicating that there is a defect is not output.

By using the frame memory 130 in this manner, it is possible to prevent in real time from being inspected as if there were defects due to dust or scratches on the light receiving surface. Further, in addition to prohibition due to dust or scratches, it is also possible to manipulate the binary image generated in the frame memory 130 to set an arbitrary area in one screen to be inspected as a comparison prohibition area.

Note that the binary image of dust and scratches on the light-receiving surface of the frame memory 130 does not need to be captured and generated by the imaging device 2 every time one screen is inspected. This is because the position of dust or scratches on the light receiving surface does not change in a short period of time. Therefore, the binary image data of dust and scratches in the frame memory 130 is stored in the storage device of the computer 10, and is stored in the frame memory 1 when necessary.
You can transfer it to 30. Since the amount of garbage increases over time, it is a good idea to update the data from time to time.

As described above, in the embodiments of the present invention, a reticle for manufacturing semiconductor ICs was used as a mask to be inspected, but the present invention can also be applied to masks for manufacturing other printed circuit boards with slight modifications. At this time, if the printed circuit board pattern is designed using pattern creation data using CAD (computer aided design), the format should be changed so that the data can be handled as design information for this device.
Just convert it. In addition, patterns on reticles and masks are imaged by scanning the image with an imaging device such as an ITV, but it is also possible to scan the pattern directly with a spot such as a laser beam, and to generate reflected light or light that changes depending on the pattern. An image signal may be generated by detecting transmitted light or the like. In addition, in the embodiment, corners were detected as pattern features, but in addition, features related to shapes such as triangles, squares, and circles, and features related to changes in edges that appear on a scanning line when a pattern is scanned (number of edges) are also detected. , the number of pixels from edge to edge, etc.) can also be applied to the present invention.

The embodiments of the present invention have been described above, but in short, the present invention scans a pattern on an object to be inspected, such as a reticle or a mask, using an imaging device 2 and a binarization circuit 3 as scanning means to create an image of the pattern. generates image binary information for pixelizing the pattern, and obtains design binary information for generating a designed binary image of the pattern from the design data using the frame memory 130 and readout circuit 131 as image generating means. Then, the features of the pattern detected based on the image binary information and the design features of the pattern detected based on the design binary information are compared to determine whether the pattern is created as designed. When inspecting, based on the design binary information, the cutout circuit 4 and the detection circuit 135 as detection means detect design features of the pattern to appear on the scanning line of the scanning means, such as corners, and
A flag F as a predetermined binary code and a code C ₁ C ₂ are given to the feature. Then, pixels on the scanning line of the scanning means, for example, 1024 pixels, are converted to a predetermined number of pixels, for example, 2
When each pixel is divided, the number of bits corresponds to the number of divisions, for example, 512 bits, and the memory stores the binary code of the detection means from the bits corresponding to the pixel positions where the design features of the pattern should appear. A reference data memory 137 is provided as a means.

As described above, according to the present invention, design binary information is not stored as is and used for inspection, but only the features that the pattern should have in terms of design are detected,
Since the data is binary-encoded and stored on the reference data memory as a storage means, the amount of information to be held is smaller than in the past, and the capacity of the storage means is also small. Furthermore, since the storage means compresses and stores binary codes related to design features that should appear on one scanning line in correspondence with the pixel positions of the scanning line, the actual pattern detected based on the image binary information is When comparing and collating the information regarding the characteristics of the data with the information regarding the characteristics stored in the storage means, the information stored in the storage means can simply be read out bit by bit in conjunction with the scanning of the scanning means, resulting in an extremely simple configuration. Based on this, an inspection device with a small amount of information to be stored can be realized.

Furthermore, as described in the embodiment, by providing a flag memory that indicates whether or not one or more design features exist on a scanning line, the storage means does not store any information regarding a scanning line that has no features. Since it is not stored, the amount of information is further reduced.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 1a shows the configuration of a pattern inspection device during inspection, and FIG. 1b shows the configuration of the pattern inspection device before inspection. 2 is a block diagram showing a part of FIG. 1, especially the cutout circuit 4 in more detail, and FIG.
FIG. 4 is a diagram showing the classification of corners of pattern edges; FIG. 5 is a 16×16 bit diagram corresponding to the window cut out by the cutout circuit 4 shown in FIG. 2; FIG. 6 shows an AND circuit that detects the corner of A shown in FIG. 4, and FIG. 7 shows an angle detection circuit that detects the corner using the AND circuit shown in FIG. 6 and outputs a 2-bit code. 8 is a diagram showing a rectangular area of 9×9 pixels set for edge detection, FIG. 9 is a circuit diagram showing the configuration of the edge detection circuit, and FIG.
Figure 0 shows the 9x9 bit area, Figure 11 shows the details of the memory circuit, Figure 12 shows the frame memory in the memory circuit, and Figure 13 shows the frame memory based on the design data. 14 is a diagram showing the information held in the reference data memory 137 and the flag memory 138 when the bit pattern 132 converted into a binary image exists. FIG. 15A is a diagram showing an example of corner information appearing in the reference window 150, FIG. 15B is a diagram showing a state where the window 102 captures the corner of the pattern, and FIG. 16 is a diagram showing the reference window Figure 17 shows the pattern on the reticle (hatched area) corresponding to the 150 area and the corner (dotted line) on the design data, and Figure 17 shows the light emission timing of the strobe device (waveform A) and the operation timing for comparison inspection (waveform B).
FIG. 18a shows the operation timing (waveform C) of transferring one screen worth of reference data and flag data from the storage device to the storage circuit. FIG. 18b is a diagram showing one screen area i shown in FIG. 18a and the corresponding design data reproduced on a television screen, and FIG. 19 is a diagram showing the imaging device 2, frame memory 130, and readout circuit. 131 is a diagram showing the connections of the comparison circuit 8 and the like during actual testing. [Explanation of symbols of main parts], 1...Object to be inspected,
2... Imaging device, 3... Binarization circuit, 4... Cutting means, 6... Corner detection circuit, 7... Edge detection circuit, 8... Comparison circuit, 9... Magnetic tape, 10...
... Computer, 11 ... Memory circuit, 12 ... Corner cutting circuit, 130 ... Frame memory, 131 ... Readout circuit, 133 ... Binary information, 135 ... Detection circuit, 136 ... I/O circuit, 137 ...Reference data memory, 138...Flag memory.

Claims (1)

[Claims] 1 scanning means for scanning a pattern formed on an object to be inspected based on design data and generating binary image information for pixelizing an image of the pattern; an image generation means for generating design binary information for generating a design binary image, and the feature of the pattern and the design characteristics of the pattern based on the image binary information and the design binary information. In the device for inspecting whether the pattern is created as designed by comparing the characteristics with the desired characteristics, the device detects the design characteristics of the design data for the scanning line of the scanning means based on the design binary information. and detecting means for giving a predetermined binary code to the feature; when the pixels on the scanning line are divided by a predetermined number of pixels, the detection means has a number of bits corresponding to the number of divisions; a storage means for storing a binary code of the detection means from a bit corresponding to a pixel position where the pattern should appear, and compressed and retains information regarding design features of the pattern. Device.