JPS61251293A - クロスポイント・スイツチアレ−装置 - Google Patents

クロスポイント・スイツチアレ−装置

Info

Publication number
JPS61251293A
JPS61251293A JP61015991A JP1599186A JPS61251293A JP S61251293 A JPS61251293 A JP S61251293A JP 61015991 A JP61015991 A JP 61015991A JP 1599186 A JP1599186 A JP 1599186A JP S61251293 A JPS61251293 A JP S61251293A
Authority
JP
Japan
Prior art keywords
latch
signal
switch
crosspoint
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61015991A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0525440B2 (cg-RX-API-DMAC10.html
Inventor
クリストス・ジヨン・ジヨージオウ
ヨング−チヤング・リユーク・リエン
キヨシ・マルヤマ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS61251293A publication Critical patent/JPS61251293A/ja
Publication of JPH0525440B2 publication Critical patent/JPH0525440B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/52—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements
    • H04Q3/521—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements using semiconductors in the switching stages

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Electronic Switches (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
JP61015991A 1985-04-26 1986-01-29 クロスポイント・スイツチアレ−装置 Granted JPS61251293A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/727,468 US4879551A (en) 1985-04-26 1985-04-26 Switching array with concurrent marking capability
US727468 1985-04-26

Publications (2)

Publication Number Publication Date
JPS61251293A true JPS61251293A (ja) 1986-11-08
JPH0525440B2 JPH0525440B2 (cg-RX-API-DMAC10.html) 1993-04-12

Family

ID=24922791

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61015991A Granted JPS61251293A (ja) 1985-04-26 1986-01-29 クロスポイント・スイツチアレ−装置

Country Status (5)

Country Link
US (1) US4879551A (cg-RX-API-DMAC10.html)
EP (1) EP0199601B1 (cg-RX-API-DMAC10.html)
JP (1) JPS61251293A (cg-RX-API-DMAC10.html)
CA (1) CA1266716A (cg-RX-API-DMAC10.html)
DE (1) DE3682699D1 (cg-RX-API-DMAC10.html)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005525737A (ja) * 2002-05-13 2005-08-25 フェアチャイルド セミコンダクター コーポレイション シリアライザ及びデシリアライザ機能を有するクロスポイントスイッチ
JP2011045136A (ja) * 2000-06-06 2011-03-03 Vitesse Semiconductor Corp スイッチマトリクスモジュールを備えたクロスポイントスイッチ

Families Citing this family (49)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
LU86660A1 (de) * 1986-02-14 1987-05-04 Siemens Ag Breitbandsignal-raumkoppeleinrichtung
US5367208A (en) 1986-09-19 1994-11-22 Actel Corporation Reconfigurable programmable interconnect architecture
US4897641A (en) * 1986-12-04 1990-01-30 Pascom Pty. Ltd. Space switch
US5361373A (en) * 1992-12-11 1994-11-01 Gilson Kent L Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfigurable instruction execution means and method therefor
US5867666A (en) * 1994-12-29 1999-02-02 Cisco Systems, Inc. Virtual interfaces with dynamic binding
US5793978A (en) * 1994-12-29 1998-08-11 Cisco Technology, Inc. System for routing packets by separating packets in to broadcast packets and non-broadcast packets and allocating a selected communication bandwidth to the broadcast packets
US6097718A (en) * 1996-01-02 2000-08-01 Cisco Technology, Inc. Snapshot routing with route aging
US6147996A (en) 1995-08-04 2000-11-14 Cisco Technology, Inc. Pipelined multiple issue packet switch
US6182224B1 (en) 1995-09-29 2001-01-30 Cisco Systems, Inc. Enhanced network services using a subnetwork of communicating processors
US7246148B1 (en) 1995-09-29 2007-07-17 Cisco Technology, Inc. Enhanced network services using a subnetwork of communicating processors
US6917966B1 (en) 1995-09-29 2005-07-12 Cisco Technology, Inc. Enhanced network services using a subnetwork of communicating processors
US6091725A (en) 1995-12-29 2000-07-18 Cisco Systems, Inc. Method for traffic management, traffic prioritization, access control, and packet forwarding in a datagram computer network
US6035105A (en) 1996-01-02 2000-03-07 Cisco Technology, Inc. Multiple VLAN architecture system
US6308148B1 (en) 1996-05-28 2001-10-23 Cisco Technology, Inc. Network flow data export
US6243667B1 (en) 1996-05-28 2001-06-05 Cisco Systems, Inc. Network flow switching and flow data export
US5751710A (en) * 1996-06-11 1998-05-12 Cisco Technology, Inc. Technique for connecting cards of a distributed network switch
US6212182B1 (en) 1996-06-27 2001-04-03 Cisco Technology, Inc. Combined unicast and multicast scheduling
US6434120B1 (en) 1998-08-25 2002-08-13 Cisco Technology, Inc. Autosensing LMI protocols in frame relay networks
US6240084B1 (en) 1996-10-10 2001-05-29 Cisco Systems, Inc. Telephony-enabled network processing device with separate TDM bus and host system backplane bus
US6904037B2 (en) 1996-11-05 2005-06-07 Cisco Technology, Inc. Asymmetric implementation of DSVD for voice/data internet access
US6304546B1 (en) 1996-12-19 2001-10-16 Cisco Technology, Inc. End-to-end bidirectional keep-alive using virtual circuits
US6122272A (en) * 1997-05-23 2000-09-19 Cisco Technology, Inc. Call size feedback on PNNI operation
US6356530B1 (en) 1997-05-23 2002-03-12 Cisco Technology, Inc. Next hop selection in ATM networks
US6862284B1 (en) 1997-06-17 2005-03-01 Cisco Technology, Inc. Format for automatic generation of unique ATM addresses used for PNNI
US6078590A (en) 1997-07-14 2000-06-20 Cisco Technology, Inc. Hierarchical routing knowledge for multicast packet routing
US6330599B1 (en) 1997-08-05 2001-12-11 Cisco Technology, Inc. Virtual interfaces with dynamic binding
US6212183B1 (en) 1997-08-22 2001-04-03 Cisco Technology, Inc. Multiple parallel packet routing lookup
US6157641A (en) * 1997-08-22 2000-12-05 Cisco Technology, Inc. Multiprotocol packet recognition and switching
US6512766B2 (en) 1997-08-22 2003-01-28 Cisco Systems, Inc. Enhanced internet packet routing lookup
US6343072B1 (en) 1997-10-01 2002-01-29 Cisco Technology, Inc. Single-chip architecture for shared-memory router
US7570583B2 (en) 1997-12-05 2009-08-04 Cisco Technology, Inc. Extending SONET/SDH automatic protection switching
US6424649B1 (en) 1997-12-31 2002-07-23 Cisco Technology, Inc. Synchronous pipelined switch using serial transmission
US6111877A (en) * 1997-12-31 2000-08-29 Cisco Technology, Inc. Load sharing across flows
US6853638B2 (en) 1998-04-01 2005-02-08 Cisco Technology, Inc. Route/service processor scalability via flow-based distribution of traffic
US6920112B1 (en) 1998-06-29 2005-07-19 Cisco Technology, Inc. Sampling packets for network monitoring
US6370121B1 (en) 1998-06-29 2002-04-09 Cisco Technology, Inc. Method and system for shortcut trunking of LAN bridges
US6377577B1 (en) 1998-06-30 2002-04-23 Cisco Technology, Inc. Access control list processing in hardware
US6182147B1 (en) 1998-07-31 2001-01-30 Cisco Technology, Inc. Multicast group routing using unidirectional links
US6308219B1 (en) 1998-07-31 2001-10-23 Cisco Technology, Inc. Routing table lookup implemented using M-trie having nodes duplicated in multiple memory banks
US6389506B1 (en) 1998-08-07 2002-05-14 Cisco Technology, Inc. Block mask ternary cam
US6101115A (en) * 1998-08-07 2000-08-08 Cisco Technology, Inc. CAM match line precharge
US6771642B1 (en) 1999-01-08 2004-08-03 Cisco Technology, Inc. Method and apparatus for scheduling packets in a packet switch
US7065762B1 (en) 1999-03-22 2006-06-20 Cisco Technology, Inc. Method, apparatus and computer program product for borrowed-virtual-time scheduling
US6757791B1 (en) 1999-03-30 2004-06-29 Cisco Technology, Inc. Method and apparatus for reordering packet data units in storage queues for reading and writing memory
US6760331B1 (en) 1999-03-31 2004-07-06 Cisco Technology, Inc. Multicast routing with nearest queue first allocation and dynamic and static vector quantization
US6603772B1 (en) 1999-03-31 2003-08-05 Cisco Technology, Inc. Multicast routing with multicast virtual output queues and shortest queue first allocation
US7076543B1 (en) 2002-02-13 2006-07-11 Cisco Technology, Inc. Method and apparatus for collecting, aggregating and monitoring network management information
US7713218B2 (en) * 2005-06-23 2010-05-11 Celleration, Inc. Removable applicator nozzle for ultrasound wound therapy device
US8514637B2 (en) * 2009-07-13 2013-08-20 Seagate Technology Llc Systems and methods of cell selection in three-dimensional cross-point array memory devices

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2707591A (en) * 1952-05-07 1955-05-03 Hughes Aircraft Co Multiple-stable-state storage devices
FR2155120A5 (cg-RX-API-DMAC10.html) * 1971-10-08 1973-05-18 Labo Cent Telecommunicat
JPS51148307A (en) * 1975-06-16 1976-12-20 Hitachi Ltd Speech path network control system
JPS582513B2 (ja) * 1978-03-03 1983-01-17 株式会社日立製作所 ネットワ−ク駆動方式
JPS55143652A (en) * 1979-04-25 1980-11-10 Hitachi Ltd Series-parallel signal converter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011045136A (ja) * 2000-06-06 2011-03-03 Vitesse Semiconductor Corp スイッチマトリクスモジュールを備えたクロスポイントスイッチ
JP2005525737A (ja) * 2002-05-13 2005-08-25 フェアチャイルド セミコンダクター コーポレイション シリアライザ及びデシリアライザ機能を有するクロスポイントスイッチ

Also Published As

Publication number Publication date
US4879551A (en) 1989-11-07
EP0199601B1 (en) 1991-12-04
CA1266716A (en) 1990-03-13
JPH0525440B2 (cg-RX-API-DMAC10.html) 1993-04-12
EP0199601A2 (en) 1986-10-29
DE3682699D1 (de) 1992-01-16
EP0199601A3 (en) 1988-03-16

Similar Documents

Publication Publication Date Title
JPS61251293A (ja) クロスポイント・スイツチアレ−装置
EP0073920B1 (en) Multi-stage switching network
US4630045A (en) Controller for a cross-point switching matrix
EP0789950B1 (en) Apparatus for programmable circuit and signal switching
KR100301921B1 (ko) 다중포트ram용의확장가능한데이타폭을가진직렬억세스메모리
JP2679028B2 (ja) データ受信装置
KR960700599A (ko) 데이타 전달 스위치, 억세스 제어형 비동기식 전달 모드(ATM)스위치 및 정보 셀 흐름 제어 방법(Controlled Access ATM Switch)
JPS5875078A (ja) Ｌｓｉデバイス試験用テスト・デ−タ供給装置
US20240020043A1 (en) Memory system including a memory controller
US4954994A (en) FIFO memory capable of simultaneously selecting a plurality of word lines
US6356111B1 (en) Crosspoint switch array with broadcast and implied disconnect operating modes
US3991276A (en) Time-space-time division switching network
JPH0361276B2 (cg-RX-API-DMAC10.html)
EP0465160B1 (en) Multiport memory
US11631446B2 (en) Low power memory device with column and row line switches for specific memory cells
US6166952A (en) Read-only memory having specially output circuits and word line connected to a group of memory cells
US3408637A (en) Address modification control arrangement for storage matrix
GB925707A (en) Improvements in or relating to memory devices
EP0427689B1 (en) A method and apparatus for switching data information through a digital selector
KR100262003B1 (ko) 반도체 메모리
KR890008840A (ko) 반도체 기억장치
JP2788250B2 (ja) ディジタル信号交換器及びディジタル信号交換器の選択モジュール
JPH05336555A (ja) 三段スイッチパス設定方式
JPH06250766A (ja) 可変配線素子及び可変配線バックボード
JPH05130130A (ja) Ｓｒｍ間ハイウエイ接続方法および装置

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees