JPS61248458A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To allow a high capacity value through with a high reliability and with a relatively small occupied area by a method wherein the second metal electrode and a semiconductor substrate are electrically connected to be used as the one electrode and the first metal electrode is used as the other electrode and an insulation film is used as a dielectric. CONSTITUTION:An insulation film 2 such as a silicon dioxide film is formed on a semiconductor substrate 1. A contact hole 3 for lead-out of a metal electrode is formed by a photoresist technology and the first metal electrodes 4 and 4' are formed. Then a layer insulation film 5 such as a plasma nitride film is formed over the whole surface including the first metal electrodes 4 and 4'. A layer connection hole 7 through which the second metal electrode 6 is connected to the first metal electrode 4' is formed, and finally the second metal electrode 6 is formed. A capacity element is composed of the first metal electrode 4 as the one electrode and the second metal electrode 6 and the semiconductor substrate 1 as the other electrode. The first metal electrode 4' is used for connecting the second metal electrode 6 to the semiconductor substrate 1 electrically. With this constitution, a capacity value can be increased without increasing the surface occupation area of the capacity element.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device, and particularly to a semiconductor integrated circuit device including a capacitive element.

[Conventional technology]

An example of a dielectric capacitive element conventionally used in a bipolar linear circuit semiconductor integrated circuit device will be described with reference to the cross-sectional views of FIGS. 3 and 4.

In FIG. 3, an insulating film 2 is provided on a semiconductor substrate 1, and the film thickness of the insulating film 2 in a region Z used as a capacitive element is reduced.

The reason for reducing the film thickness is that when the capacitance value is C, C is the dielectric constant, d is the distance between electrodes, and S is the electrode area, C-6
This is because the distance d between the electrodes needs to be small in order to obtain a large capacitance value with the same electrode area. That insulation g! In order to reduce the thickness of the film 2, a method is used in which K is etched using a photoresist as a mask and then oxidized.

Next, a connection hole 3 is provided in the thick part of the insulating film 2, and finally,
One electrode 12 and the other electrode 11 of the semiconductor substrate 1 are formed using aluminum or the like to complete a capacitive element.

Next, another conventional example will be explained using FIG.

An insulating film 2 such as a silicon dioxide film is provided on a semiconductor substrate 1,
A first metal electrode 4 is provided on the insulating film 2, and the first metal electrode 4 is
An interlayer insulating film 5 such as plasma-cured glue is provided on the entire surface including the metal electrode 4, and finally a second metal electrode 6 is provided on the interlayer insulating film 5. The capacitive element includes a first metal electrode 4 as one metal electrode, a second metal electrode 5 as the other metal electrode, and an interlayer insulation 5 as a dielectric.

[Problem that the invention seeks to solve]

In order to increase the capacitance value in the structure of the conventional capacitive element shown in FIGS. 3 and 4, there is a method of decreasing the distance between the electrodes or increasing the area of the electrodes as described above.

However, although the method of reducing the distance between the electrodes can be achieved by reducing the thickness of the dielectric, there is a limit to the reliability since the withstand voltage between the electrodes of the capacitive element decreases.

On the other hand, increasing the area of one pole has the disadvantage of increasing the area occupied within the semiconductor integrated circuit device.

An object of the present invention is to provide a semiconductor integrated circuit device having a capacitive element having high reliability and a high capacitance value in spite of a small occupied area.

[Means for solving problems]

The semiconductor integrated circuit device of the present invention includes an insulating film provided on a surface of a semiconductor substrate, a first metal electrode provided on the insulating film, and a first metal electrode provided on the surface of the semiconductor substrate.
An insulating film is provided on the entire surface including the metal electrode, a second metal electrode is provided on the insulating film, the second metal electrode and the semiconductor substrate are electrically connected to form one electrode, and the first metal and a capacitive element having an electrode as the other electrode and the insulating film as a dielectric.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view of a first embodiment of the invention.

In FIG. 1, an insulating film 2 made of silicon dioxide or the like is provided on a semiconductor substrate 1. Next, a connection hole 3 for taking out the metal electrode is formed by photoresist technology, and the first metal electrode 4 is
．． 4' is provided. Next, an interlayer insulating film 5 such as a plasma nitrided film is provided over the entire surface including the first metal electrode 4° 4'. Next, an interlayer connection hole 7 for connecting the first metal electrode 4' and the second metal electrode 6 is provided, and finally the second metal electrode 6 is provided.

The capacitive element according to the first embodiment has a first electrode as one electrode.
It is composed of a metal electrode 4, a second metal electrode 6 as the other electrode, and a semiconductor substrate 1. The fourth metal electrode 4' is provided to electrically connect the second metal electrode 6 and the semiconductor substrate 1. Therefore, according to the above embodiment, the capacitance value can be increased without increasing the planar area occupied by the capacitive element. The reason for this is that the capacitance between the first metal electrode 4 and the semiconductor substrate 1 and the capacitance between the first metal electrode 4 and the second metal electrode 6 are
This is because it is configured in parallel to the first metal electrode 4.

FIG. 2 is a sectional view of a second embodiment of the invention.

In FIG. 2, an N-type epitaxial layer 8 is grown on a P-type semiconductor substrate 1. Next, a p-type insulating isolation layer 9 is formed, a KN-type high concentration region 10, which is one of the N-type island regions, is provided, and the main surface thereof is oxidized to provide an insulating film 2, and an insulating film 2 is provided on the region X used as a capacitive element. Form the insulating film thinly. Next, an electrode extraction connection hole 3 for the N-type high concentration region 10 is provided, and then a first metal electrode 4.4' is formed, and a first interlayer of alumina or the like is formed on the entire surface including the top of the first metal electrode 4.4'. An insulating film 13 is provided. The first interlayer insulation [113] on the Y region used as a capacitive element and on the interlayer connection hole 7 for connection to the second metal electrode 6 is removed using a photoresist technique. Next, plasma all over ♀
Second interlayer insulation such as chemical film 11! T! x4 is provided, an interlayer connection hole 7 is provided in the second interlayer insulating film 14, and finally a second metal electrode 6 is formed. The g1 metal electrode 41 includes the second metal electrode 6 and the N-type high concentration region 1, as in the first embodiment of the present invention.
This is for electrically connecting to 0.

Therefore, in the second embodiment of the present invention, the capacitance between the first metal electrode 4 and the N-type high concentration region 10, and the capacitance between the first metal electrode 4' and the second
Since the space between the metal electrodes 6 and the capacity (2) are parallel to the first metal electrode 14, the same effect as in the first embodiment of the present invention is produced. - The difference between the first embodiment of the power grid invention and the second embodiment of the present invention is that the distance between the electrodes of the two parallel capacitive elements described above is small, thereby obtaining a large capacitance value. Is possible. In the second embodiment of the present invention, a silicon dioxide film is used as the dielectric between the first metal electrode 4 and the N-type high concentration region 10. A nitride film may be formed by vapor phase growth. Plasma-perforated films and vapor-grown nitride films have a high dielectric constant (compared to silicon dioxide), can be formed with small variations, and even if the thickness of the pancreas is thinner than that of silicon dioxide, the withstand voltage between capacitive element electrodes is high. It has excellent properties as a dielectric material used in integrated circuit devices. In the description of the present invention, the first metal electrode 4゜4' and the second metal electrode 6 constitute one capacitor, but if the electrodes are combined in layers with more metal wiring, the same element will be occupied exclusively by the electrodes. It becomes possible to obtain a much larger capacitance value in terms of area.

〔Effect of the invention〕

As described in detail above, according to the present invention, it is possible to obtain a semiconductor integrated circuit device including a capacitive element that is highly reliable and has a high capacitance value even with a small area occupied by the element, so that the present invention has great effects.

[Brief explanation of drawings]

FIG. 1 is a sectional view of a first embodiment of the invention, FIG. 2 is a sectional view of a second embodiment of the invention, and FIGS. 3 and 4 are sectional views of a conventional semiconductor integrated circuit device. be. 1... Semiconductor base, 2... Insulating film, 3
...Connection hole, 4. 4'...First metal electrode, 5...Interlayer insulation, 6...Second
Metal electrode, 7... Interlayer connection hole, 8...
Epitaxial layer, 9... P-type insulation separation layer, 1
0... High concentration region, 11... Extraction electrode, 12... Electrode, 13... First interlayer insulating film, 14... Second interlayer insulating film. Pre-20 electrode grass 4 areas

Claims (1)

[Claims] An insulating film is provided on the surface of the semiconductor substrate, and a first insulating film is provided on the insulating film.
A metal electrode is provided, an insulating film is provided on the entire surface including on the first metal electrode, a second metal electrode is provided on the insulating film, and the second metal electrode and the semiconductor substrate are electrically connected to each other. A semiconductor integrated circuit device comprising a capacitive element having an electrode, the first metal electrode as the other electrode, and the insulating film as a dielectric.