JPS61247048A - Port for vertical diffusion furnace - Google Patents

Port for vertical diffusion furnace

Info

Publication number
JPS61247048A
JPS61247048A JP8796585A JP8796585A JPS61247048A JP S61247048 A JPS61247048 A JP S61247048A JP 8796585 A JP8796585 A JP 8796585A JP 8796585 A JP8796585 A JP 8796585A JP S61247048 A JPS61247048 A JP S61247048A
Authority
JP
Japan
Prior art keywords
wafer
supporting plates
support plate
diffusion furnace
vertical diffusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8796585A
Other languages
Japanese (ja)
Inventor
Yasushi Shiraishi
白石　靖志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP8796585A priority Critical patent/JPS61247048A/en
Publication of JPS61247048A publication Critical patent/JPS61247048A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/67303—Vertical boat type carrier whereby the substrates are horizontally supported, e.g. comprising rod-shaped elements
    • H01L21/67309—Vertical boat type carrier whereby the substrates are horizontally supported, e.g. comprising rod-shaped elements characterized by the substrate support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Abstract

PURPOSE:To reduce the degree of absorbing the heat in a furnace to circular supporting plates by providing the supporting plates at the support of a wafer, thereby preventing the wafer from slipping, cracking, or collapsing. CONSTITUTION:Annular supporting plates 12 for placing semiconductor wafers 10 are provided in ports 11 at a slight slope so as not to drop the wafers. With this structure, a local load is not applied to the wafers 10, and the plates 12 are formed annularly, thereby reducing the area of the supporting plates to reduce the absorption of the heat and to reduce the weight in the amount of forming the disks annularly.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、縦型拡散炉用セードに係シ、特に半導体ＬＳ
Ｉを製造する拡散・酸化工程で使用される縦型拡散炉用
のテートに関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a shade for a vertical diffusion furnace, and particularly to a shade for a semiconductor LS.
This invention relates to a Tate for a vertical diffusion furnace used in the diffusion/oxidation process for producing I.

〔従来の技術〕[Conventional technology]

従来、縦型拡散炉用のボートの半導体ウェハー支持部分
は、第２図（ａ）に示すウェハーを支える溝を設けた構
造、あるいは第２図（ｂ）に示すウェハーを載せる円盤
状の支持板を設けた構造となっていた。Conventionally, the semiconductor wafer support part of a boat for a vertical diffusion furnace has a structure with a groove for supporting the wafer as shown in FIG. 2(a), or a disk-shaped support plate on which the wafer is placed as shown in FIG. 2(b). It had a structure with

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の縦型拡散炉用の？−トは第２図（、）に
示すように半導体ウェハー２０を？−ト２１の溝２２に
入れて支持する場合、ウェハー２０とｚ−ト２１との熱
膨張率の違いによって、半導体ウェハーにスリ、プ又は
ワレ、カケを生じるという欠点がある。また、第２図（
ｂ）に示すようにｙＮ−ト２０に設けた円、盤′状の支
持板２３の上にウェハー２０を載せる構造の場合、熱が
支持板２３に吸収されてしまい、またが−ト自体の重量
が重くなってしまうという欠点があった。For the conventional vertical diffusion furnace mentioned above? - The semiconductor wafer 20 is placed as shown in FIG. When the semiconductor wafer is supported by being placed in the groove 22 of the wafer 21, there is a drawback that the semiconductor wafer may be scratched, cracked, or chipped due to the difference in thermal expansion coefficient between the wafer 20 and the z-shaped wafer 21. Also, Figure 2 (
In the case of the structure in which the wafer 20 is placed on the circular or disk-shaped support plate 23 provided on the tray 20 as shown in b), heat is absorbed by the support plate 23, and the heat is also absorbed by the tray itself. The drawback was that it was heavy.

本発明は前記問題点を解消した装置を提供するものであ
る。The present invention provides an apparatus that solves the above problems.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、縦型拡散炉用のボートの半導体ウェハーを支
持する部分に円環状の支持板を有することを特徴とする
ホードである。The present invention is a hoard characterized by having an annular support plate in a portion of a boat for a vertical diffusion furnace that supports semiconductor wafers.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.

第１図は本発明の一実施例である。第１図に示すように
、ｙｔ’　−ト１１に半導体ウェア’ｔ−１０を載せる
だめの円環状の支持板１２を、ウェハーがすベシ落ちな
いようにわずかな傾斜を持たせて設ける。この構造にす
ることにより、ウェノ・−１０に局所的な負担がかかる
ことはなく、また、支持板１２が円環状となって龜るこ
とにより、支持板の面積が小さい分だけ、熱の吸収も少
なくなり、重量も円盤を円環にした分だけ軽くなる。FIG. 1 shows an embodiment of the present invention. As shown in FIG. 1, an annular support plate 12 on which a semiconductor wafer 't-10 is placed is provided on a yt'-t 11 with a slight inclination to prevent the wafer from falling. By adopting this structure, there is no local burden on the Weno-10, and since the support plate 12 is annular, heat absorption is absorbed by the small area of the support plate. The weight is also reduced by making the disc into a ring.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、ウェノ・−の支持部分に
円環状の支持板を設けることにより、ウェハー支持のた
めの自重の負担が分散されて、ウェハーのスリップやワ
レ・カケが生じ難くなる。また、支持板の部分を円環状
とすることにより、炉内の熱が支持板に吸収される度合
を小さくでき、かつ、ボートの重量が、円盤状の支持板
を設けた場合に比べ軽くできるという効果がある。As explained above, in the present invention, by providing an annular support plate on the supporting portion of the wafer, the burden of the own weight for supporting the wafer is dispersed, making it difficult for the wafer to slip, crack, or chip. . In addition, by making the support plate part circular, the degree to which the heat in the furnace is absorbed by the support plate can be reduced, and the weight of the boat can be reduced compared to when a disk-shaped support plate is provided. There is an effect.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明の一実施例を示す斜視図、第２図（ａ）
　？　（ｂ）は従来技術を示す斜視図である。・１０・
・・半導体ウェハー、１１・・・＝１−’　−ト、１２
・・・円環状支持板。 （ｄ） Ｃｂ） 第２図Fig. 1 is a perspective view showing an embodiment of the present invention, Fig. 2(a)
? (b) is a perspective view showing the prior art.・10・
...Semiconductor wafer, 11...=1-'-to, 12
...An annular support plate. (d) Cb) Figure 2

Claims (1)

【特許請求の範囲】[Claims] （１）縦型拡散炉用の半導体ウェハーを支持するボート
において、該ボートの半導体ウェハー支持部分に円環状
の支持板を有することを特徴とする縦型拡散炉用ボート
。(1) A boat for a vertical diffusion furnace that supports semiconductor wafers, characterized in that the boat has an annular support plate in a semiconductor wafer support portion of the boat.
JP8796585A 1985-04-24 1985-04-24 Port for vertical diffusion furnace Pending JPS61247048A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8796585A JPS61247048A (en) 1985-04-24 1985-04-24 Port for vertical diffusion furnace

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8796585A JPS61247048A (en) 1985-04-24 1985-04-24 Port for vertical diffusion furnace

Publications (1)

Publication Number Publication Date
JPS61247048A true JPS61247048A (en) 1986-11-04

Family

ID=13929566

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8796585A Pending JPS61247048A (en) 1985-04-24 1985-04-24 Port for vertical diffusion furnace

Country Status (1)

Country Link
JP (1) JPS61247048A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS647263U (en) * 1987-06-26 1989-01-17
JPH0338051A (en) * 1989-06-29 1991-02-19 Applied Materials Inc Handling method and device for semiconductor wafer
US5162047A (en) * 1989-08-28 1992-11-10 Tokyo Electron Sagami Limited Vertical heat treatment apparatus having wafer transfer mechanism and method for transferring wafers
US5310339A (en) * 1990-09-26 1994-05-10 Tokyo Electron Limited Heat treatment apparatus having a wafer boat
US5316472A (en) * 1991-12-16 1994-05-31 Tokyo Electron Limited Vertical boat used for heat treatment of semiconductor wafer and vertical heat treatment apparatus
JPH08298246A (en) * 1995-04-27 1996-11-12 Nec Kyushu Ltd Wafer boat
KR100448084B1 (en) * 1997-04-11 2004-12-03 삼성전자주식회사 Method for protecting substrate of semiconductor device to prevent substrate from being broken
JP2006303512A (en) * 2006-04-27 2006-11-02 Hitachi Kokusai Electric Inc Semiconductor manufacturing apparatus and method, and boat

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS647263U (en) * 1987-06-26 1989-01-17
JPH057240Y2 (en) * 1987-06-26 1993-02-24
JPH0338051A (en) * 1989-06-29 1991-02-19 Applied Materials Inc Handling method and device for semiconductor wafer
US5162047A (en) * 1989-08-28 1992-11-10 Tokyo Electron Sagami Limited Vertical heat treatment apparatus having wafer transfer mechanism and method for transferring wafers
US5310339A (en) * 1990-09-26 1994-05-10 Tokyo Electron Limited Heat treatment apparatus having a wafer boat
US5316472A (en) * 1991-12-16 1994-05-31 Tokyo Electron Limited Vertical boat used for heat treatment of semiconductor wafer and vertical heat treatment apparatus
JPH08298246A (en) * 1995-04-27 1996-11-12 Nec Kyushu Ltd Wafer boat
KR100448084B1 (en) * 1997-04-11 2004-12-03 삼성전자주식회사 Method for protecting substrate of semiconductor device to prevent substrate from being broken
JP2006303512A (en) * 2006-04-27 2006-11-02 Hitachi Kokusai Electric Inc Semiconductor manufacturing apparatus and method, and boat

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