JPS61246624A - Event analysis recorder - Google Patents

Event analysis recorder

Info

Publication number
JPS61246624A
JPS61246624A JP60088110A JP8811085A JPS61246624A JP S61246624 A JPS61246624 A JP S61246624A JP 60088110 A JP60088110 A JP 60088110A JP 8811085 A JP8811085 A JP 8811085A JP S61246624 A JPS61246624 A JP S61246624A
Authority
JP
Japan
Prior art keywords
signal
circuit
condition
start condition
oscillograph
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60088110A
Other languages
Japanese (ja)
Inventor
Masashige Yamada
山田 正成
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP60088110A priority Critical patent/JPS61246624A/en
Publication of JPS61246624A publication Critical patent/JPS61246624A/en
Pending legal-status Critical Current

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  • Testing Electric Properties And Detecting Electric Faults (AREA)
  • Testing And Monitoring For Control Systems (AREA)
  • Recording Measured Values (AREA)

Abstract

PURPOSE:To restart an oscillograph by another start condition even when a start condition for the oscillograph continues to be established, by providing an automatic reset circuit which resets the start condition determined by an input signal, as well as an external start condition, when every condition signals is received. CONSTITUTION:An input signal A1 is converted into a bit signal A2 by an input converter 1 and stored in an analog memory 2 for a prescribed time, and then it is outputted as an analog signal A3 to an oscillograph 3. Meanwhile, the signal A1 is determined as to the presence of abnormality by an abnormality determination circuit 4, and when it has any abnormality, an abnormality determination signal D1 is outputted. When either of the signal D1 or an external start condition E1 is established, it is outputted to an OR circuit 6 through an automatic reset circuit 56, and a start signal S1 is outputted to the oscillograph OS3, so as for it to operate for a prescribed time. An output D3 of the circuit 5 disappears after a prescribed time even when either of the signal D1 or the condition E1 continues to be established. In the case when any abnormality occurs in another input signal thereafter, the signal S1 is given again to OS3 through the circuit 5 and 6, and thereby OS3 operates again for a prescribed time.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は1発電所等の主として電気事故の故障原因を
解析するための事象解析記録計に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an event analysis recorder for analyzing the causes of failures of electrical accidents, mainly in power plants and the like.

〔従来の技術〕[Conventional technology]

第3図は従来の事象解析記録計を示すブロック図であり
、図に2いて、1tj:アナログ信号A1をビット化さ
れた入力信号A2に変換する入力変換器%2はビット化
された入力信号A2を一定時間記憶し念後、アナログ信
号A3として出力するアナログメそり、3はアナログ信
号A3を記録紙に書き出すオシログラフであ〕、このオ
シログラフ3は起動信号S1が与えられたとき一定時間
のみ起動する。4#′i入力信号A1を分析して異常発
生を検出する異常判定回路、6は異常判定回路4の出力
D1と外部起動条件E1のOR条件を作シ起動信号S1
を出力するOR回路である。
FIG. 3 is a block diagram showing a conventional event analysis recorder. 3 is an oscillograph that memorizes A2 for a certain period of time and then outputs it as an analog signal A3. 3 is an oscillograph that writes the analog signal A3 on a recording paper. This oscillograph 3 only outputs the analog signal A3 for a certain period of time when the activation signal S1 is given. to start. 4#'i An abnormality determination circuit that analyzes the input signal A1 and detects the occurrence of an abnormality; 6 is a start signal S1 that generates the OR condition of the output D1 of the abnormality determination circuit 4 and the external start condition E1;
This is an OR circuit that outputs

なお、第3図では簡単のために入力信号AI。In addition, in FIG. 3, input signal AI is used for simplicity.

入力信号A2.アナログ信号A3、異常判定出力D1が
夫々3人力又は3出力の場合を示したが実際には8から
16の入力又は出力が一般に#i良く用いられている。
Input signal A2. Although the case where the analog signal A3 and the abnormality determination output D1 are respectively 3 manual inputs or 3 outputs is shown, in reality, 8 to 16 inputs or outputs are commonly used #i.

次に動作について説明する。入力信号A1は入力変換器
1でビット化された入力信号A2に変換され、アナログ
メそり2に一定時間記憶された後。
Next, the operation will be explained. The input signal A1 is converted into a bit-formatted input signal A2 by the input converter 1, and is stored in the analog memory 2 for a certain period of time.

アナログ信号A3として、オシログラフ3に出力される
。一方、入力信号A1は異常判定回路4で異常の有無が
判定されて異常があれば異常判定出力D1が出力される
。異常判定出力D1と外部起動条件E1のいずれかが成
立すれば、OR回路6でORの結果、起動信号S1が出
力され、オシログラフ3の起動条件が成立し、その後オ
シログラフ3は所定の時間のみ動作して異常発生前後の
記録を出力する。ここで、入力信号A1は複数入力して
$P9.相互の影響を解析するが、一方で異常が起って
も、他方が健全状態を維持していることは十分に起こシ
得る。
It is output to the oscilloscope 3 as an analog signal A3. On the other hand, the input signal A1 is judged by the abnormality determination circuit 4 as to whether or not there is an abnormality, and if there is an abnormality, an abnormality determination output D1 is output. If either the abnormality determination output D1 or the external activation condition E1 is satisfied, the OR circuit 6 outputs the activation signal S1 as a result of the OR operation, the activation condition for the oscillograph 3 is satisfied, and the oscillograph 3 is then activated for a predetermined period of time. only operates and outputs records before and after the error occurs. Here, multiple input signals A1 are input and $P9. We will analyze their mutual influence, but even if an abnormality occurs in one, it is quite possible that the other will remain in a healthy state.

〔発すが解決しようとする問題点〕[Problems that are raised but sought to be solved]

従来の起動装置は以上のように構成されているので、一
度異常条件が成立すると、事故要因が解除されない限り
、起動条件が成立し続けるので。
Since the conventional starting device is configured as described above, once the abnormal condition is established, the starting condition continues to be satisfied unless the cause of the accident is removed.

新たに他の入力信号で異常が起ってもオシログラフは起
動しないという問題点があった。
There was a problem in that the oscilloscope would not start even if an abnormality occurred in another input signal.

この発明は上記のような問題点を解消するためになされ
たもので、一方で異常条件が成立し続けても祈念な他の
入力信号、若しくは他の外部起動条件で、オシログラフ
が再起動できる事象解析記録計を得ることを目的とする
This invention was made to solve the above-mentioned problems. On the other hand, even if the abnormal condition continues to be established, the oscilloscope can be restarted by another input signal or other external start condition. The purpose is to obtain an event analysis recorder.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係る事象解析記録計は、事故等の事象発生時
に一定時間過去のデータにさかのぼって記録する記録計
に訃いて、入力信号から判定した異常判定出力による起
動条件と、外部より入力する外部起動条件を条件信号毎
に自動的にリセットする自動リセット回路を備え、新た
に発生した異常に対してオシログラフが再起動できるよ
うにしたものである。
The event analysis recorder according to the present invention is a recorder that retroactively records past data for a certain period of time when an event such as an accident occurs. It is equipped with an automatic reset circuit that automatically resets the starting conditions for each condition signal, so that the oscilloscope can be restarted in response to a newly occurring abnormality.

〔作用〕[Effect]

この発明における事象解析記録計は、自動リセット回路
を持つことによシ1個々の起動条件成立時、一度オシロ
グラフに起動指令を出し、最初の起動条件が成立し続け
るが、他の起動条件が成立した時には、リセットされて
いるので再度オシログラフに起動指令を出すことが可能
となる。
The event analysis recorder according to the present invention has an automatic reset circuit.1 When each starting condition is satisfied, a starting command is issued to the oscilloscope once, and the first starting condition continues to be satisfied, but other starting conditions are When it is established, it has been reset and it is possible to issue a start command to the oscilloscope again.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。第1
図においてslはアナログ信号A1をビット信号A2に
変換する入力変換器、2#iビット信号A2を一定時間
記憶したのち、アナログ信号A3として出力するアナロ
グメモリ、3はアナログ信号ム3を記憶紙に書き出すオ
シログラフ、4は入力信号A1を分析して異常発生を検
出する異常判定回路、5は異常判定回路4の異常判定出
力D1と外部起動条件E1を個々に自動リセットする自
動リセット回路、6は自動リセット回路5の出力D3の
OR条件を作9、オシログラフ3への起動指令として起
動信号S1を出力するOR回路である。
An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, sl is an input converter that converts analog signal A1 to bit signal A2, 2#i is an analog memory that stores bit signal A2 for a certain period of time and then outputs it as analog signal A3, and 3 is analog signal M3 that is stored on storage paper. The oscilloscope to be written out, 4 is an abnormality determination circuit that analyzes the input signal A1 and detects the occurrence of an abnormality, 5 is an automatic reset circuit that automatically resets the abnormality determination output D1 of the abnormality determination circuit 4 and the external starting condition E1 individually, 6 is an This is an OR circuit that creates an OR condition for the output D3 of the automatic reset circuit 5 and outputs a start signal S1 as a start command to the oscilloscope 3.

次に動作について説明する。入力信号Alt!入力変換
器1でビット信号A2に変換され、アナログメそり2に
一定時間記憶された後、アナログ信号A3としてオシロ
グラフ3に出力される。一方、入力信号A1は異常判定
回路4で異常の有無が判定され、異常があれば異常判定
出力D1が出力される。この異常判定出力D1と外部起
動条件E1のいずれかが成立すれば、自動リセット回路
5を介してOR回路6に出力され、オシログラフ3に起
動指令として起動信号S1が出力される。このオシログ
ラフ3は一定時間動作する。ここで、自動リセット回路
5を1例えば信号をパルス化する回路で構成する。この
場合には、自動リセット回路5の出力D3は、入力する
起動条件の異常判定出力D11!たけ外部起動条件E1
のいずれかが成立し続けても一定時間後には消滅する。
Next, the operation will be explained. Input signal Alt! The signal is converted into a bit signal A2 by the input converter 1, stored in the analog memory 2 for a certain period of time, and then outputted to the oscilloscope 3 as an analog signal A3. On the other hand, the input signal A1 is judged by the abnormality determination circuit 4 as to whether or not there is an abnormality, and if there is an abnormality, an abnormality determination output D1 is output. If either the abnormality determination output D1 or the external starting condition E1 is satisfied, it is output to the OR circuit 6 via the automatic reset circuit 5, and a starting signal S1 is output to the oscilloscope 3 as a starting command. This oscilloscope 3 operates for a certain period of time. Here, the automatic reset circuit 5 is constituted by, for example, a circuit that pulses a signal. In this case, the output D3 of the automatic reset circuit 5 is the abnormality determination output D11 of the input startup condition! Take external start condition E1
Even if either of these continues to hold true, it will disappear after a certain period of time.

そののち。after that.

別の入力信号で異常が発生した場合、前回向様に自動リ
セット回路5を介してOR回路6に出力され、再びオシ
ログラフ3に起動指令が与えられてオシロダラ73が再
び一定時間動作する。
If an abnormality occurs in another input signal, it is output to the OR circuit 6 via the automatic reset circuit 5 in the same way as before, and a start command is given to the oscillograph 3 again to cause the oscillograph 73 to operate again for a certain period of time.

なお、上記実施例では自動リセット回路5として、信号
をパルス化する回路を示したが、この自動リセット回路
5を一方の条件成立で出力がONを続け、他の条件成立
で一定時間のみ、出力がOFFとなるような回路として
も構わない。また。
In the above embodiment, a circuit that pulses the signal is shown as the automatic reset circuit 5, but the automatic reset circuit 5 keeps the output ON when one condition is satisfied, and outputs only for a certain period of time when the other condition is satisfied. It is also possible to use a circuit that turns OFF. Also.

上記実施例では起動信号S1で動作するオシログラフを
一台として説明し九が、オシログラフが複数台であって
も同様の効果を奏する。
In the above embodiment, the explanation will be made assuming that there is one oscillograph operated by the activation signal S1, but the same effect can be obtained even if there are a plurality of oscillographs.

また、上記実施例では、自動リセット回路50入力条件
を同レベルとして、起動する条件としたが、この起動条
件を第2図に示すようにグループ弁別回路7でグループ
別けして、グループ毎KOR条件をとシ、自動リセット
回路5に入力してもよく、グループ相互において上記実
施例と同様の効果が得られ、この場合、特に自動リセッ
ト回路5を簡単にできる効果が得られる。
Further, in the above embodiment, the input conditions of the automatic reset circuit 50 are set at the same level as the activation condition, but this activation condition is divided into groups by the group discrimination circuit 7 as shown in FIG. 2, and the KOR condition is set for each group. may also be input to the automatic reset circuit 5, and the same effect as in the above embodiment can be obtained for each group, and in this case, the effect that the automatic reset circuit 5 can be particularly simplified is obtained.

〔発明の効果〕〔Effect of the invention〕

以上のように1この発明によればオシログラフを起動す
る条件回路として自動リセット回路を設けたので、一度
起動したオシログラフをその起動条件が成立し続けても
、別の起動条件の成立で再起動させることができるとい
う効果がある。
As described above, 1.According to the present invention, since an automatic reset circuit is provided as a condition circuit for starting the oscillograph, even if the oscillograph once started continues to be satisfied, it can be restarted when another starting condition is satisfied. It has the effect of being able to be activated.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例による事象解析記録計を示
すブロック図、第2図はこの発明の他の実施例を示すブ
ロック図、第3図は従来の事象解析記録計を示すブロッ
ク図である。 図Ks?いて、1は入力変換器、2はアナログメ七す、
3はオシログラフ、4は異常判定回路、5は自動リセッ
ト回路、6はOR回路、7はグループ判別回路である。 なお、図中、同一符号は同一、または相轟部分を示す。 特許出願人  三菱電機株式会社 I−−□−” 代理人 弁理士   1) 澤  博  昭゛   j
(外2名)1
FIG. 1 is a block diagram showing an event analysis recorder according to one embodiment of the present invention, FIG. 2 is a block diagram showing another embodiment of the invention, and FIG. 3 is a block diagram showing a conventional event analysis recorder. It is. Figure Ks? 1 is the input converter, 2 is the analog input converter,
3 is an oscilloscope, 4 is an abnormality determination circuit, 5 is an automatic reset circuit, 6 is an OR circuit, and 7 is a group discrimination circuit. In addition, in the drawings, the same reference numerals indicate the same or similar parts. Patent applicant: Mitsubishi Electric Corporation I−−□−” Agent: Patent attorney 1) Hiroshi Sawa Akiji
(2 other people) 1

Claims (2)

【特許請求の範囲】[Claims] (1)入力信号および外部起動条件を入力し、事故等の
事象発生時に過去に遡つての一定時間のデータを記録す
る事象解析記録計において、前記入力信号から判定した
起動条件と前記外部起動条件とを条件信号毎に自動的に
リセットする自動リセット回路を備えたことを特徴とす
る事象解析記録計。
(1) In an event analysis recorder that inputs an input signal and an external start condition and records data for a certain period of time going back to the past when an event such as an accident occurs, the start condition determined from the input signal and the external start condition An event analysis recorder characterized in that it is equipped with an automatic reset circuit that automatically resets each condition signal.
(2)上記自動リセット回路は入力信号および外部起動
条件等の複数の信号をあるグループ毎にまとめるグルー
プ弁別回路が付設され、前記グループ毎に自動的に起動
条件をリセットするようにしたことを特徴とする特許請
求の範囲第1項記載の事象解析記録計。
(2) The above-mentioned automatic reset circuit is characterized in that it is equipped with a group discrimination circuit that groups a plurality of signals such as input signals and external starting conditions into groups, and automatically resets the starting conditions for each group. An event analysis recorder according to claim 1.
JP60088110A 1985-04-24 1985-04-24 Event analysis recorder Pending JPS61246624A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60088110A JPS61246624A (en) 1985-04-24 1985-04-24 Event analysis recorder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60088110A JPS61246624A (en) 1985-04-24 1985-04-24 Event analysis recorder

Publications (1)

Publication Number Publication Date
JPS61246624A true JPS61246624A (en) 1986-11-01

Family

ID=13933740

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60088110A Pending JPS61246624A (en) 1985-04-24 1985-04-24 Event analysis recorder

Country Status (1)

Country Link
JP (1) JPS61246624A (en)

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