JPS61239293A - Display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a raster scan type display device.

2. Description of the Related Art An example of a conventional display device will be described below with reference to FIG. Reference numeral 10 is a CPU, which transfers image data to the image memory 11, and at the same time transfers image data to the image memory 11.
) 12 outputs a CRT control signal. The image memory 11 inputs the image data sent from the CPU 10, and outputs a parallel image signal, which is the element of the image signal, to the shift register from an address specified by the image data. The CRTC 12 inputs a CRT control signal from the CPU 1o, instructs the image memory 11 to sequentially read parallel image signals, and also outputs a clock signal for timing control and a load command signal for the parallel image signal to the shift register 13. ing.

The shift register 13 inputs the parallel image signal from the image memory 11, converts the serial image signal into a serial image signal according to the lock signal sent from the CRTCl 2, and outputs the serial image signal to the next video amplifier 14. The video amplifier 14 amplifies the input image signal and outputs it to the CRTls. C
The RTls inputs an image signal from the video amplifier 14 and displays it.

Problems to be Solved by the Invention Regarding the conventional display device configured as described above, CR
When display dots are continuous in the image signal input to T15 (for example, 11" in 01o11o10"), the display dots are displayed very brightly on the CRT, and the difference in brightness from independent display dots is noticeable. . When a large number of display dots are displayed in succession, the difference in brightness between the display dots and the individual display dots is emphasized, making the display screen on a CRT extremely difficult to see.

The present invention has been made in view of the above problems, and
The brightness of the display dots displayed continuously on the CRT,
The purpose is to make the CRT easier to see by reducing the difference in brightness between independent display dots.

Means for Solving the Problems In order to solve the above problems, the present invention provides a display device with a comparison means for determining the presence or absence of data of an adjacent display dot adjacent to a display dot in an image signal, and amplification from the comparison means. A video amplifying means configured to control the intensity is provided so that the amplification degree when there are adjacent display dots is smaller than the amplification degree when there are no adjacent display dots.

By using the means described above, when there are adjacent display dots in the image signal, the comparison means lowers the amplification degree of the video amplification means to suppress the brightness of the display dots, so that there are no adjacent display dots in the image signal. In this case, the difference in brightness compared to the case where the solid display dots are independent is reduced. Therefore, the CRT screen can be easily viewed.

Example The configuration of an embodiment of the present invention will be described below.

In FIG. 1, CPU1. CRTC2, image memory 3
and shift register 4 are constructed and connected in the same manner as in the prior art. Reference numeral 6 denotes a comparison means that inputs an image signal from the shift register 4, is controlled by a clock signal c1 synchronized with the raster scan output from the CRTC 2, and outputs an image signal and a gain control signal to the video amplifier 6. 6 inputs the image signal and gain control signal from the comparing means 6;
This is a video amplifier that outputs an image signal to the CRT7.

FIG. 2 is a diagram showing the configuration of the comparing means 5 in detail. In the figure, a flip-flop 6a is a flip-flop that sequentially stores and outputs the output Oo (serial image signal) of the last digit of the shift register 4 at the rising edge of the clock signal C1 sent from the CRTC 2. 5b inputs the output Qa of the flip-flop 6a, and the flip-flop 70
Similar to a, this is a flip-flop that sequentially stores and outputs data in accordance with the clock signal c1. 6c is an AND circuit which inputs the output Qo of the shift register 4 and the output Qa of the flip-flop 6a. On the other hand, 5d is the output Qa of the flip-flop 6a and the output Q of the flip-flop 6b.
This is an AND circuit that inputs b. 5e is AND circuit 5
This is a NOR circuit which inputs both the outputs of C and AND circuit 5d and outputs an amplification control signal G1. 5f is NOR
The circuit 6e is a flip-flop that stores the amplification degree control signal G1 at the rising edge of the clock signal C1 and outputs it to the video amplifier 6 as the amplification degree control signal G2.

FIG. 3 is a timing chart showing the operation of the comparing means 5 in this embodiment. shift register 4c CRT
According to the load command signal Lo sent from C2, the parallel dot signal is stored and output at the rising edge of the clock signal c1. For example, at t=TI, 1011 is sent to the shift register 4 as a parallel dot signal (DO to D7).
Assume that "o1o1" is stored.At this time, data "1" of Do is output to the last digit data Qo of the shift register 4.The data stored in the shift register 4 is shifted at the rising edge of the clock signal c1. , data QO is output sequentially from the last digit.
QOs are sequentially stored and output in a in synchronization with the clock signal c1. Similarly to the shift register 4, the flip-flop 5a and the flip-flop 5b receive a clock signal c.
At the rising edge of 1, the input signal is stored and output. if,
When Qa is 11" and either QO or ob is "1'' (for example, when t = T4 to T6)
, one output of the AND circuit 5c or the AND circuit 5d becomes "1", and the output G1 of the NOR circuit 5e becomes "0".In other words, G1 indicates that there is a display dot on the CRT 7, and that the display dot is adjacent to the front and rear of the display dot. O'' only if there is a dot that does. Further, even when Qa is 1'', when both Qo and ob are 0'' (for example, when t=T2 to T3), G1 remains 1''.

However, after Qa becomes '1' at t=T4, G1
AND5c, AAND circuit 5 until becomes "o"
d, since the calculation in the NOR circuit 5e takes time, Td
A delay of (sec) occurs, and using G1 as an amplification degree control signal causes a problem.

Therefore, G1 is stored in the flip-flop 5f and output in synchronization with the clock signal C1, and the video amplifier 6
The output ob of the flip-flop 5b is used as the image signal output to. The flip-flop 6f receives the clock signal C
01 is stored at the rising edge of 1 (for example, t=T6),
As G2, it is output synchronously when ob becomes "1".

The video amplifier 6 amplifies the image signal input from the flip-flop 5b and outputs it to the CRT 7.

However, the amplification degree of the video amplifier 6 is the flip-flop 5f.
02 is inputted and controlled by G2, and is set higher when G2 is "0" than when 02 is "1". CRT
7 inputs the image signal input from the video amplifier 6;
Display on screen.

As described above, according to this embodiment, the image signal output from the last digit Qo of the shift register 4 is sequentially stored in the flip-flop 5a and the flip-flop 6b, and the output Qa of the flip-flop 70 and the output Qo of the shift register 4 are stored sequentially in the flip-flop 5a and flip-flop 6b. Output QO
is input to the AND circuit 5C, the output Qa of the flip-flop 5a and the output Qb of the flip-flop 6b are input to the AND circuit 5d, and the outputs of the respective AND circuits are input to the NO circuit.
By inputting it to the R circuit 5e, an amplification control signal can be obtained, and it can be determined whether there are adjacent dots before and after the display dot displayed on the CRT, or whether the display dots are independent. I can do it.

The amplification degree control signal G2 is input to the video amplifier 6 in synchronization with the image signal Qb to control the amplification degree, and when a display dot adjacent to a display dot on the CRTT exists, the video amplifier 6 amplifies the amplification degree. You can feel the sharpness of lowering the intensity and it becomes much easier to see.

Note that in this embodiment, the output signal QO of the shift register and
The output signal ob of the flip-flop 6b is
The output data of the AND circuits 6C and 6d is input to the NOR circuit 5e to obtain G1, but the logical sum of the data of Qo and the data of ob is This can also be realized by inputting it into an AND circuit and applying a gate using Qa data.

Furthermore, in this example, data of a display dot and data adjacent to the display dot before and after the raster scan direction are compared, but the same comparison can be made even when there are adjacent dots in the direction perpendicular to the raster scan direction. , a more easily viewable display screen can be obtained.

Effects of the Invention As described above, the present invention provides a comparison means for determining the presence or absence of a display dot adjacent to a display dot in an image signal, and a video amplification means whose amplification degree is controlled by the comparison means. When there is a display dot adjacent to a display dot on the CRT screen, the amplification degree of the video amplifier can be lowered to suppress the brightness of the display dot, reducing the difference in brightness between the display dot and the independent display dot. Therefore, it is possible to make the CRT easier to see.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a display device according to an embodiment of the present invention, Fig. 2 is a circuit diagram of a comparison means of the embodiment, Fig. 3 is a timing chart showing the operation of the embodiment, and Fig. 4 is a conventional one. FIG. 2 is a block diagram of a display device of FIG. 4...Shift register, 6...Comparison means, 5a...Flip-flop, 5b...
...Flip-flop, 6C...AND circuit, 5d...AND circuit, 5e...N
OR circuit, 5f...Flip-flop, 6...
...Video amplifier, 7...CRT0 Name of agent Patent attorney Toshio Nakao and one other person Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] a cathode ray tube display means for displaying an image signal; a comparison means for comparing data of a display dot displayed on the screen of the cathode ray tube display means in the image signal with data of an adjacent display dot adjacent to the display dot; A display device comprising video amplifying means for amplifying an image signal to be applied to the cathode ray tube display means, and having a degree of amplification controlled by the output of the comparing means.