JPS61234572A - Pressure sensor - Google Patents
Pressure sensorInfo
- Publication number
- JPS61234572A JPS61234572A JP7730785A JP7730785A JPS61234572A JP S61234572 A JPS61234572 A JP S61234572A JP 7730785 A JP7730785 A JP 7730785A JP 7730785 A JP7730785 A JP 7730785A JP S61234572 A JPS61234572 A JP S61234572A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- groove
- thin
- diaphragm
- thick
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 21
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims description 8
- 230000003321 amplification Effects 0.000 abstract description 4
- 238000003199 nucleic acid amplification method Methods 0.000 abstract description 4
- 239000010409 thin film Substances 0.000 abstract description 2
- 239000011521 glass Substances 0.000 description 3
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000005452 bending Methods 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/84—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by variation of applied mechanical force, e.g. of pressure
Abstract
Description
【発明の詳細な説明】
〈産業上の利用分野〉
本発明は、半導体チップの中央部に薄肉ダイヤフラムを
形成するとともにこの薄肉ダイヤフラムの周囲にIC(
集積回路)を形成したrc圧力センサに関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention involves forming a thin diaphragm in the center of a semiconductor chip, and surrounding the thin diaphragm with an IC (
The present invention relates to an rc pressure sensor formed with an integrated circuit.
〈従来の技術〉
最近、半導体チップの薄肉ダイヤフラムの周辺にIC1
例えば増幅器、温度補償回路を載せたIC圧力センサが
開発されつつある。このものは、第4図および第5図に
示すように、半導体チップlOの下面中央部に凹みを設
けて薄肉ダイヤフラム11を形成し、その周辺の厚肉部
12の下面を台座13に低融点ガラス14によって接合
させている。さらに、薄肉ダイヤフラム11上に歪ゲー
ジ15を形成し、厚肉部12の上面に歪ゲージ15の出
力電圧を増幅する増幅器16を形成している。<Conventional technology> Recently, IC1 has been installed around the thin diaphragm of semiconductor chips.
For example, IC pressure sensors equipped with amplifiers and temperature compensation circuits are being developed. As shown in FIGS. 4 and 5, a recess is provided in the center of the lower surface of the semiconductor chip 10 to form a thin-walled diaphragm 11, and the lower surface of the thick-walled portion 12 around the diaphragm 11 is attached to a pedestal 13 with a low melting point. They are joined by glass 14. Further, a strain gauge 15 is formed on the thin-walled diaphragm 11, and an amplifier 16 for amplifying the output voltage of the strain gauge 15 is formed on the upper surface of the thick-walled portion 12.
〈発明が解決しようとする問題点〉
上述したrc圧カセンサは、増幅器をIC化するため小
型化できる利点が得られるとともに歪ゲージ15の出力
電圧をすぐに増幅するため雑音に強い利点が得られる。<Problems to be solved by the invention> The above-mentioned rc pressure sensor has the advantage of being miniaturized because the amplifier is integrated into an IC, and also has the advantage of being resistant to noise because the output voltage of the strain gauge 15 is immediately amplified. .
しかしながら、半導体チップ10と台座は、互いに熱膨
張係数の異なる材料が用いられるので、周辺の温度が上
昇した時は半導体チップ10が第4図の点線Aに示すよ
うに湾曲し、逆に周辺の温度が下降した時は半導体チッ
プ10が点線Bのように湾曲する。この時厚肉部12も
わずかに湾曲するため、増幅器16内の極めて細い配線
が切断したり、増幅器16内のトランジスタに歪が加わ
ることによって増幅度が変化する恐れがあった。However, since the semiconductor chip 10 and the pedestal are made of materials with different coefficients of thermal expansion, when the surrounding temperature rises, the semiconductor chip 10 curves as shown by the dotted line A in FIG. When the temperature drops, the semiconductor chip 10 curves as indicated by the dotted line B. At this time, the thick portion 12 is also slightly curved, so that there is a risk that extremely thin wiring within the amplifier 16 may be cut or that distortion may be applied to the transistor within the amplifier 16, thereby changing the amplification degree.
〈問題点を解決するための手段〉
本発明は、上述した問題点を解決するためになされたも
ので、半導体チップの厚肉部の下面に薄肉ダイヤフラム
と集積回路間で薄肉ダイヤフラムを取り囲むように溝を
形成したものである。<Means for Solving the Problems> The present invention has been made in order to solve the above-mentioned problems, and includes a structure in which a thin diaphragm is placed between the thin diaphragm and the integrated circuit on the lower surface of the thick part of the semiconductor chip so as to surround the thin diaphragm. It has grooves formed therein.
〈実施例〉 以下本発明の実施例を図面に基づいて説明する。<Example> Embodiments of the present invention will be described below based on the drawings.
第1図、第2図および第3図において20はシリンコン
からなる半導体チップであり、この半導体チップ20に
は下面中央部に凹みを設けて薄肉ダイヤフラム21が形
成されている。薄肉ダイヤフラム21の周囲には薄肉ダ
イヤフラム21に比べて比較的厚い厚肉部22が形成さ
れ、この厚肉部22の下面には前記薄肉ダイヤフラム2
1を取り囲むように溝23が形成されている。薄肉ダイ
ヤフラム21の上面には歪ゲージ24が形成され、厚肉
部22の上面には溝23の外側で増幅発信器25が形成
されている。歪ゲージ24と増幅発信器25とは囲路の
配線によって接続されている。In FIGS. 1, 2, and 3, reference numeral 20 denotes a semiconductor chip made of silicon, and this semiconductor chip 20 has a thin diaphragm 21 formed by providing a recess in the center of the lower surface. A thick portion 22 that is relatively thicker than the thin diaphragm 21 is formed around the thin diaphragm 21, and the thin diaphragm 2 is formed on the lower surface of the thick portion 22.
A groove 23 is formed to surround 1. A strain gauge 24 is formed on the upper surface of the thin-walled diaphragm 21, and an amplified oscillator 25 is formed on the upper surface of the thick-walled portion 22 outside the groove 23. The strain gauge 24 and the amplified oscillator 25 are connected by an enclosure wiring.
なお、他の実施例としてICは増幅発信器25に限らず
、温度補償回路、電圧−周波数変換器を用いたものでも
良い。In addition, as another embodiment, the IC is not limited to the amplified oscillator 25, but may be one using a temperature compensation circuit or a voltage-frequency converter.
30はガラス若しくはセラミックスからなる台座であり
、この台座30に厚肉部22の下面が低融点ガラス31
によって接着されている。なお、厚肉部22の下面を陽
極接合法によって台座30に接合させても良い。Reference numeral 30 denotes a pedestal made of glass or ceramics, and the lower surface of the thick wall portion 22 of the pedestal 30 has a low melting point glass 31.
It is glued by. Note that the lower surface of the thick portion 22 may be bonded to the pedestal 30 by an anodic bonding method.
次に上述した構成に基づいて作用について説明する。Next, the operation will be explained based on the above-described configuration.
薄肉ダイヤフラム21に上方から圧力が作用すると、歪
ゲージ24が歪んで出力電圧が変化し、この出力電圧が
増幅発信器25によって増幅されて外部機器に送られる
。When pressure is applied to the thin diaphragm 21 from above, the strain gauge 24 is distorted and the output voltage changes, and this output voltage is amplified by the amplification oscillator 25 and sent to an external device.
周囲温度が変化すると、半導体チップ20と台座30と
の熱膨張率差によって台座30とともに半導体チップ2
0が湾曲する。このとき半導体チップ20には溝23が
形成されて溝23部分が薄肉となっているため、溝23
部分で大きく湾曲し、さらに薄肉から厚肉に変化する部
分に応力が集中して折れ曲がるような形となるので、溝
23の外側の厚肉部22はほとんど湾曲しない。この結
果、増幅発信器25内の配線が切断したり、増幅発信器
25内の囲路のトランジスタに歪が加わらないので増幅
度が変化する恐れがない。When the ambient temperature changes, the difference in thermal expansion coefficient between the semiconductor chip 20 and the pedestal 30 causes the semiconductor chip 2 to expand along with the pedestal 30.
0 is curved. At this time, since the groove 23 is formed in the semiconductor chip 20 and the groove 23 portion is thin, the groove 23
The thick portion 22 outside the groove 23 hardly curves because the stress is concentrated and bent at the portion where the wall changes from thin to thick. As a result, there is no risk that the wiring within the amplified oscillator 25 will be cut or that the amplification degree will change because no distortion is applied to the transistors in the circuit within the amplified oscillator 25.
上述した実施例は溝23を1つ設けた例について述べた
が複数設けても良い。In the above embodiment, one groove 23 is provided, but a plurality of grooves 23 may be provided.
〈発明の効果〉
以上述べたように本発明は、半導体チップの厚肉部の下
面に薄膜ダイヤフラムと集積回路間で薄肉ダイヤフラム
を取り囲むように溝を形成したので、周囲温度の変化に
よって半導体チップが湾曲しても、溝部分で大きく湾曲
しかつ薄肉から厚肉に変化する部分に応力が集中して折
れ曲がるような形となるので、溝の外側の厚肉部はほと
んど湾曲しない。このため集積回路内の配線が切断した
り、集積回路内のトランジスタに歪が加わらないので特
性が変化する恐れがない利点が得られる。<Effects of the Invention> As described above, according to the present invention, a groove is formed on the lower surface of the thick portion of the semiconductor chip between the thin film diaphragm and the integrated circuit so as to surround the thin diaphragm, so that the semiconductor chip is not affected by changes in ambient temperature. Even if it curves, the groove part is largely curved and the stress is concentrated in the part where the wall changes from thin to thick, resulting in the shape of bending, so the thick part outside the groove hardly curves. Therefore, there is an advantage that there is no possibility that the wiring in the integrated circuit will be cut or that the transistors in the integrated circuit will be distorted, so that the characteristics will not change.
第1図から第3図までは本発明の実施例を示すもので、
第1図は縦断面図、第2図は第1図における■−■線断
面図、第3図は平面図、第4図および第5図は従来のI
C圧力センサを示すもので、第4図は縦断面図、第5図
は平面図である。
20・・・半導体チップ、21・・・薄肉ダイヤフラム
、22・・・厚肉部、23・・・溝、24・・・歪ゲー
ジ、25・・・増幅発信器。1 to 3 show embodiments of the present invention,
Figure 1 is a longitudinal sectional view, Figure 2 is a sectional view taken along the line ■-■ in Figure 1, Figure 3 is a plan view, and Figures 4 and 5 are conventional I
4 is a longitudinal sectional view and FIG. 5 is a plan view of the C pressure sensor. 20... Semiconductor chip, 21... Thin diaphragm, 22... Thick wall portion, 23... Groove, 24... Strain gauge, 25... Amplified oscillator.
Claims (1)
ダイヤフラムを形成し、その周囲の厚肉部の下面を台座
に接着するとともに上面に少なくとも増幅器を集積化し
た集積回路を形成してなる圧力センサにおいて、前記薄
肉ダイヤフラムと集積回路間で厚肉部の下面に薄肉ダイ
ヤフラムを取り囲むように溝を形成したことを特徴とす
る圧力センサ。(1) The central part of the lower surface of a plate-shaped semiconductor chip is recessed to form a thin-walled diaphragm, the lower surface of the thick-walled part around the diaphragm is adhered to a pedestal, and an integrated circuit in which at least an amplifier is integrated is formed on the upper surface. A pressure sensor characterized in that a groove is formed on the lower surface of the thick portion between the thin diaphragm and the integrated circuit so as to surround the thin diaphragm.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7730785A JPS61234572A (en) | 1985-04-11 | 1985-04-11 | Pressure sensor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7730785A JPS61234572A (en) | 1985-04-11 | 1985-04-11 | Pressure sensor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61234572A true JPS61234572A (en) | 1986-10-18 |
Family
ID=13630256
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7730785A Pending JPS61234572A (en) | 1985-04-11 | 1985-04-11 | Pressure sensor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61234572A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007024589A (en) * | 2005-07-13 | 2007-02-01 | Hitachi Ltd | Gas flow rate measuring arrangement |
-
1985
- 1985-04-11 JP JP7730785A patent/JPS61234572A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007024589A (en) * | 2005-07-13 | 2007-02-01 | Hitachi Ltd | Gas flow rate measuring arrangement |
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