JPS61234061A - Manufacture of lead frame of semiconductor device - Google Patents
Manufacture of lead frame of semiconductor deviceInfo
- Publication number
- JPS61234061A JPS61234061A JP7430085A JP7430085A JPS61234061A JP S61234061 A JPS61234061 A JP S61234061A JP 7430085 A JP7430085 A JP 7430085A JP 7430085 A JP7430085 A JP 7430085A JP S61234061 A JPS61234061 A JP S61234061A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- substrate
- fingers
- layer
- frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 19
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 229910052751 metal Inorganic materials 0.000 claims abstract description 15
- 239000002184 metal Substances 0.000 claims abstract description 15
- 238000005323 electroforming Methods 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 11
- 238000000465 moulding Methods 0.000 claims description 3
- 239000011888 foil Substances 0.000 claims 1
- 238000010030 laminating Methods 0.000 claims 1
- 238000003825 pressing Methods 0.000 abstract description 2
- 229920003002 synthetic resin Polymers 0.000 description 4
- 239000000057 synthetic resin Substances 0.000 description 4
- YMWUJEATGCHHMB-UHFFFAOYSA-N Dichloromethane Chemical compound ClCCl YMWUJEATGCHHMB-UHFFFAOYSA-N 0.000 description 3
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 239000002904 solvent Substances 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910001220 stainless steel Inorganic materials 0.000 description 2
- 239000010935 stainless steel Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- NTIZESTWPVYFNL-UHFFFAOYSA-N Methyl isobutyl ketone Chemical compound CC(C)CC(C)=O NTIZESTWPVYFNL-UHFFFAOYSA-N 0.000 description 1
- UIHCLUNTQKBZGK-UHFFFAOYSA-N Methyl isobutyl ketone Natural products CCC(C)C(C)=O UIHCLUNTQKBZGK-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229920001225 polyester resin Polymers 0.000 description 1
- 239000004645 polyester resin Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 235000011121 sodium hydroxide Nutrition 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔技術分野〕
本発明はIC,LSI等の半導体チップを固定するのに
用いるリードフレームの製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a method for manufacturing a lead frame used for fixing semiconductor chips such as ICs and LSIs.
従来より半導体チップを樹脂モールドで一体化して複数
ピンを突設した半導体装置の組立てには金属製のリード
フレームが用いられている。このリードフレームは薄い
金属板をプレスで打ち抜いたり、エツチングなどによっ
て形成されており、その形状は第4図に示すように、半
導体チップ1を取り付ける矩形のタブ2をその4隅にお
いて支持するタブリード3と、タブ2の周縁に内端を臨
ませる複数のフィンガ4と、これらフィンガ4及びタブ
リード3の外端を支持する枠部5と、枠部5の両側縁に
沿って定間隔に設けられたスプロケット孔6とからなっ
ている。2. Description of the Related Art Conventionally, metal lead frames have been used to assemble semiconductor devices in which semiconductor chips are integrated with a resin mold and have a plurality of protruding pins. This lead frame is formed by punching out a thin metal plate with a press or by etching, and its shape is as shown in FIG. , a plurality of fingers 4 whose inner ends face the periphery of the tab 2, a frame 5 that supports these fingers 4 and the outer ends of the tab lead 3, and a plurality of fingers 4 provided at regular intervals along both side edges of the frame 5 It consists of a sprocket hole 6.
このようなリードフレーム7を用いて半導体装置を組み
立てるには、まずタブ2上に半導体チップ1を取り付け
た後、半導体チップlの各電極とこれに対応するフィン
ガ4の内端をワイヤあるいはワイヤを用いず直接に接続
し、その後矩形枠部5の内側領域を合成樹脂でモールド
し半導体チップ1を被覆し、次いで枠部5を切除し、フ
ラットリードあるいはインライン型の半導体装置を得る
のである。To assemble a semiconductor device using such a lead frame 7, first attach the semiconductor chip 1 onto the tab 2, and then connect each electrode of the semiconductor chip l and the corresponding inner end of the finger 4 with a wire or a wire. After that, the inner region of the rectangular frame portion 5 is molded with synthetic resin to cover the semiconductor chip 1, and then the frame portion 5 is cut out to obtain a flat lead or in-line type semiconductor device.
ところで、リードフレーム7のフィンガ4の先端には半
導体チップ1の電極に接続するためのバンプが形成され
るが、近年多数のピンを有する半導体装置が要求される
ようになり、フィンガの幅が極めて小さいものとなって
くると、フィンガを含むリードフレームの接続そのもの
が非常に難しく、ましてやフィンガが先端にバンプを一
体に形成するのは困難である。Incidentally, a bump is formed at the tip of the finger 4 of the lead frame 7 to connect to the electrode of the semiconductor chip 1. However, in recent years, as semiconductor devices with a large number of pins have been required, the width of the finger has become extremely large. As the lead frame becomes smaller, it becomes very difficult to connect the lead frame including the fingers, and it is even more difficult to integrally form a bump at the tip of the finger.
従来、上記の如き非常に微細な加工を施すには、フォト
エツチング等の手段が用いられているが、エツチング加
工は製造装置等が高価であり、コストをさげるのが難し
い。Conventionally, methods such as photoetching have been used to perform extremely fine processing as described above, but etching requires expensive manufacturing equipment and is difficult to reduce costs.
本発明は上記の点に鑑みてなされたもので、多数のバン
プ付フィンガを備えたリードフレームを容易に成形でき
るリードフレームの製造方法の提供を目的としている。The present invention has been made in view of the above points, and an object of the present invention is to provide a method for manufacturing a lead frame that can easily form a lead frame having a large number of bumped fingers.
上記目的を達成するための手段として、本発明は、電鋳
により基板上に形成したリードフレームを基板とともに
プレス成形してフィンガの先端にバンプを形成し、その
後基板からリードフレームを剥離してリードフレーム本
体を得るようにしたことを特徴としている。As a means for achieving the above object, the present invention involves press-molding a lead frame formed on a substrate by electroforming together with the substrate to form a bump at the tip of the finger, and then peeling the lead frame from the substrate to lead the lead frame. It is characterized by having a frame body.
第1図は本発明の実施例におけるリードフレームの製造
工程を説明するものである。FIG. 1 explains the manufacturing process of a lead frame in an embodiment of the present invention.
まず第1図(a)の如くステンレス等の導電性金属から
なる基板8上に所望パターンのレジスト層9を形成する
。このレジスト層9はリードフレーム7を形成しない位
置のみに積層されるものであって、非レジスト部8aの
形状は所望パターンのリードフレーム形状である。First, as shown in FIG. 1(a), a resist layer 9 having a desired pattern is formed on a substrate 8 made of a conductive metal such as stainless steel. This resist layer 9 is laminated only at positions where the lead frame 7 is not formed, and the shape of the non-resist portion 8a is the shape of the lead frame of a desired pattern.
次にこのレジスト層9が形成された基板8上を、レジス
トがアルカリ現像タイプではカセイソーダを、溶剤タイ
プの場合は塩化メチレン等の溶剤を用いてM離処理を行
い、その後電鋳により銅、ニッケル、金等の導電性金属
を積層させる。Next, the substrate 8 on which this resist layer 9 has been formed is subjected to an M-release treatment using caustic soda if the resist is an alkaline developing type, or a solvent such as methylene chloride if the resist is a solvent type, and then copper and nickel are formed by electroforming. , layering conductive metals such as gold.
これにより山)図の如くレジスト層9を除く非レジスト
部8a上にのみ金属層が形状される。更にレジスト9を
メチルイソブチルケトンのような溶剤で洗浄除去して(
C)の如き積層体を得る。As a result, the metal layer is formed only on the non-resist portion 8a excluding the resist layer 9, as shown in FIG. Furthermore, the resist 9 is removed by washing with a solvent such as methyl isobutyl ketone (
A laminate like C) is obtained.
このようにして一枚の板状に成形された基板8及び金属
層10の積層体の一部をプレス成形により(d)図の如
く基板8側に突出するように折曲加工する。この成形部
分はリードフレーム7のフィンガ先端部であり、図では
タブ2に向って対向延出する一対のフィンガ4を示して
いる。この場合、レジスト層を残したままプレス成形す
ることにより、フィンガ先端部を取り囲むレジスト層が
フィンガの横ずれ防止作用をするとともに、過剰プレス
力の緩衝機能をもたせることができる。なおタブ2は特
に必要としない。A part of the laminate of the substrate 8 and the metal layer 10 thus formed into a single plate is bent by press molding so as to protrude toward the substrate 8 as shown in FIG. This molded part is the tip of the fingers of the lead frame 7, and the figure shows a pair of fingers 4 extending oppositely toward the tab 2. In this case, by press-forming with the resist layer left in place, the resist layer surrounding the finger tips can act to prevent the fingers from shifting laterally, and can also have a buffering function against excessive pressing force. Note that tab 2 is not particularly required.
次いで基板8から金属層10を剥離して+81図の如き
断面形状を有するフィンガ4を得る。Next, the metal layer 10 is peeled off from the substrate 8 to obtain the finger 4 having a cross-sectional shape as shown in FIG.
第2図は上述の方法によって得られたリードフレーム7
のフィンガ4部分を拡大して示した斜視図である。図か
ら明らかなように、リードフレーム7の枠部5から内方
へ延出する多数のフィンガ4の先端部は下方へ湾曲され
、その先端は頚部4aを介して円形のバンプ4bを形成
している。Figure 2 shows a lead frame 7 obtained by the above method.
FIG. 4 is an enlarged perspective view of the finger 4 portion of FIG. As is clear from the figure, the tips of the many fingers 4 extending inward from the frame 5 of the lead frame 7 are curved downward, and the tips form circular bumps 4b through the neck 4a. There is.
先端部形状を円形にすることにより、半導体チップ1の
凹入した電極との接合位置をフィンガ4の横ずれに対し
て許容することができ、組立性を向上させることができ
るが、円形に限らず矩形もしては多角形状等種々変更で
きる。By making the tip shape circular, the bonding position of the semiconductor chip 1 with the recessed electrode can be tolerated against lateral displacement of the fingers 4, and ease of assembly can be improved, but it is not limited to a circular shape. It can be changed into various shapes such as a rectangle or a polygon.
第3図はリードフレームを用いて半導体チップを配線基
板に取り付けた状態を示したもので、リードフレーム7
はプリント配線板11の上面に載置固定されており、リ
ードフレーム7のフィンガ4が延出する部分のプリント
配線板11にはディバイス孔11aが設けられている。Figure 3 shows a state in which a semiconductor chip is attached to a wiring board using a lead frame.
is mounted and fixed on the upper surface of the printed wiring board 11, and a device hole 11a is provided in the printed wiring board 11 at a portion where the fingers 4 of the lead frame 7 extend.
このディバイス孔り1a内には半導体チップ1が配され
、フィンガ4の先端のバンプ4bが半導体チップ1の上
面に設けられた電極に半田で固着されるのである。The semiconductor chip 1 is placed in the device hole 1a, and the bumps 4b at the tips of the fingers 4 are fixed to electrodes provided on the top surface of the semiconductor chip 1 with solder.
電鋳用基板8として、上記実施例ではそれ自体導電性を
有するステンレス薄鋼板を用い、フィンガ4の先端プレ
ス成形時にこの基板8とフィンガ4とを同時プレス加工
することにより、フィンガ4のちぎれや不要変形を回避
するようにしたが、基板8はそれ自体が導電性を有しな
いもしくは抵抗値が高い材質例えばポリエステルやポリ
イミド樹脂のような合成樹脂フィルムや表面に導電性を
有しないようなアルミニウム薄板等も用いることができ
、合成樹脂フィルムの場合には、蒸着やスパッタリング
、無電解メッキ等によりその表面に導電性を付与せしめ
れば良く、またアルミニウム薄板の場合には、その表面
に亜鉛等による置換反応で導電性を持たせれば良い。As the substrate 8 for electroforming, in the above embodiment, a thin stainless steel plate, which itself is conductive, is used, and by press-working the substrate 8 and the fingers 4 at the same time when press-forming the tips of the fingers 4, it is possible to prevent the fingers 4 from breaking. Although unnecessary deformation was avoided, the substrate 8 is made of a material that itself does not have conductivity or has a high resistance value, such as a synthetic resin film such as polyester or polyimide resin, or a thin aluminum plate whose surface does not have conductivity. In the case of a synthetic resin film, conductivity may be imparted to the surface by vapor deposition, sputtering, electroless plating, etc., and in the case of an aluminum thin plate, the surface may be coated with zinc or the like. It is sufficient to impart conductivity through a substitution reaction.
特にこのような合成樹脂やアルミニウム薄板の場合には
材質自体が柔軟性や展性、延性に冨むため、フィンガ4
のプレス加工時の加工圧のばらつきを吸収させることが
でき、バンプ部分の寸法管理を容易にすることができる
。In particular, in the case of such synthetic resins and aluminum thin plates, the materials themselves are flexible, malleable, and ductile, so the finger 4
It is possible to absorb variations in working pressure during press working, and it is possible to easily manage the dimensions of the bump portion.
以上のように本発明の製造方法によれば、リードフレー
ム本体は電鋳により成形されるので、幅の狭い多数のフ
ィンガを有するものであっても、精度よく製造すること
ができ、エツチング法などに比べ製造コストは低く抑え
ることができる。As described above, according to the manufacturing method of the present invention, the lead frame main body is formed by electroforming, so even if it has a large number of narrow fingers, it can be manufactured with high precision. Manufacturing costs can be kept low compared to
また、フィンガ先端のバンプを折曲加工するのに基板と
ともになされるから、幅の小さい径の細いフィンガであ
っても十分にプレス加工が可能であり、製造が容易とな
る。Further, since the bending process of the bump at the tip of the finger is performed together with the substrate, even a finger with a small width and a narrow diameter can be sufficiently press-formed, and manufacturing becomes easy.
第1図は本発明実施例におけるリードフレームの製造工
程を示す図、第2図は本発明によって製造したリードフ
レームのフィンガ部を拡大して示す斜視図、第3図はリ
ードフレームを用いて半導体チップを配線基板に取り付
けた状態を示す図、第4図は一般的なリードフレームの
平面図である。
1・・・半導体チップ、1a・・・電極、2・・・タブ
、4・・・フィンガ、4b・・・バンプ、7・・・リー
ドフレーム、8・・・金属基板、8a・・・非レジスト
部。
第1図
θ
第2図
第3図
第4図FIG. 1 is a diagram showing the manufacturing process of a lead frame according to an embodiment of the present invention, FIG. 2 is an enlarged perspective view showing a finger portion of a lead frame manufactured according to the present invention, and FIG. FIG. 4, which shows a state in which the chip is attached to a wiring board, is a plan view of a general lead frame. DESCRIPTION OF SYMBOLS 1...Semiconductor chip, 1a...Electrode, 2...Tab, 4...Finger, 4b...Bump, 7...Lead frame, 8...Metal substrate, 8a...Non resist section. Figure 1 θ Figure 2 Figure 3 Figure 4
Claims (1)
箔にて形成したリードフレームの製造方法であつて、少
なくとも表面に導電性を付与した基板に所望パターンの
レジスト層を形成し、非レジスト部に金属を電鋳により
積層してフィンガを形成する工程と、金属層を積層した
基板をプレス成形してフィンガの先端部にバンプを形成
する工程と、基板より金属層を剥離する工程とからなる
半導体装置のリードフレーム製造方法。A method for manufacturing a lead frame in which fingers to be connected to electrodes of a semiconductor chip are formed of conductive metal foil, the method comprising forming a resist layer in a desired pattern on a substrate whose surface is made conductive at least, and forming a resist layer on a non-resist part. A semiconductor product that consists of a process of laminating metal by electroforming to form fingers, a process of press-molding a substrate with laminated metal layers to form a bump at the tip of the finger, and a process of peeling the metal layer from the substrate. A method for manufacturing lead frames for equipment.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60074300A JPH0719865B2 (en) | 1985-04-10 | 1985-04-10 | Method for manufacturing lead frame of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60074300A JPH0719865B2 (en) | 1985-04-10 | 1985-04-10 | Method for manufacturing lead frame of semiconductor device |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4117984A Division JP2528766B2 (en) | 1992-04-10 | 1992-04-10 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61234061A true JPS61234061A (en) | 1986-10-18 |
JPH0719865B2 JPH0719865B2 (en) | 1995-03-06 |
Family
ID=13543141
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60074300A Expired - Lifetime JPH0719865B2 (en) | 1985-04-10 | 1985-04-10 | Method for manufacturing lead frame of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0719865B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5001545A (en) * | 1988-09-09 | 1991-03-19 | Motorola, Inc. | Formed top contact for non-flat semiconductor devices |
JPH07307425A (en) * | 1994-08-22 | 1995-11-21 | Kyushu Hitachi Maxell Ltd | Electrocasting method |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50114353A (en) * | 1974-02-20 | 1975-09-08 | ||
JPS55110051A (en) * | 1979-02-15 | 1980-08-25 | Nec Corp | Lead frame and semiconductor device |
JPS57171681A (en) * | 1981-04-17 | 1982-10-22 | Toshiba Corp | Lead frame and its manufacture |
-
1985
- 1985-04-10 JP JP60074300A patent/JPH0719865B2/en not_active Expired - Lifetime
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50114353A (en) * | 1974-02-20 | 1975-09-08 | ||
JPS55110051A (en) * | 1979-02-15 | 1980-08-25 | Nec Corp | Lead frame and semiconductor device |
JPS57171681A (en) * | 1981-04-17 | 1982-10-22 | Toshiba Corp | Lead frame and its manufacture |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5001545A (en) * | 1988-09-09 | 1991-03-19 | Motorola, Inc. | Formed top contact for non-flat semiconductor devices |
JPH07307425A (en) * | 1994-08-22 | 1995-11-21 | Kyushu Hitachi Maxell Ltd | Electrocasting method |
Also Published As
Publication number | Publication date |
---|---|
JPH0719865B2 (en) | 1995-03-06 |
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