JPS612323A - Annealing method for semiconductor device - Google Patents

Abstract

PURPOSE:To enable to irradiate infrared rays from the back-side of an Si substrate on an MOS type device by a method wherein the characteristics of silicon which is almost transparent for infrared rays and an SiO2 film which absorbs infrared rays are utilized. CONSTITUTION:An element isolation region 2 is formed on an MOS type transistor using a P type substrate 1. A gate electrode 3 is polycrystalline Si, and phosphorus is diffused thereon. A passivation film has a two-layer construction consisting of an SiO2 film 4 and a phosphosilicide glass film 5. A diffusion layer 6 is formed by performing an ion implantation of phosphorus. An Al film 7 is formed by sputtering, and a phosphosilicide glass film 8 is deposited thereon. This substrate is placed in an electron beam direct patterning device, and an EB irradiation is performed. After the EB irradiation is finished, the variation of the threshold voltage in the stage of annealing (curved line 1) at 450 deg.C for 30min and in the stage of laser irradiation (curved lines 2 and 3) of one pulse and two pulses can be plotted as the function of dosage.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field to which the Invention Pertains] The present invention relates to annealing technology for semiconductor devices, and particularly to an annealing technology for damage caused to semiconductor devices by high-energy beams such as electron beams and X-rays.

[Prior art and its problems]

Semiconductor integrated circuits are becoming increasingly miniaturized and highly integrated, with development progressing at a rate of quadrupling the degree of integration every two years. */JA dimensions are finally entering Bumicron, and 0.
A resolution of 5 μm is increasingly required. Currently, it is generally believed that optical lithography can process up to 0.7 to 0.8 μm, but 0.5 μm
It is expected that X-ray phosphorography or electron beam direct writing techniques will be required.

One of the problems with electron beam direct writing and X-ray phosphorography techniques is radiation damage to the device.

In the case of MO8 type devices, electron-hole pairs are generally generated in the gate oxide film when irradiated with a high-energy beam.
Electrons with high mobility diffuse easily, but the mobility /J
It is said that the small holes are trapped by the unstable bonds at the S t /S t O2 interface, form positive charges, and shift the threshold voltage to the negative side. Furthermore, neutral traps are said to be formed that impair device reliability.

These radiation damages are generally repaired by thermal annealing, but for example AI! When electron beam direct writing or X-ray phosphorography technology is used for patterning, 45
Since only a heat treatment of about 0° C. can be applied, the radiation damage described above cannot be sufficiently recovered.

Figure 1 shows an example of radiation damage when a MOS transistor is irradiated with an electron beam of 10 to 5 QKV and heated to 450°C.
FIG. 3 is a diagram plotting the change in threshold voltage against the dose amount after additive annealing. Obviously, the threshold voltage shift remained, indicating that the radiation damage caused to the device by the electron beam could not be completely removed by heat treatment at 450°C.

[Purpose of the invention]

An object of the present invention is to provide a technique for easily removing radiation damage caused to an element by electron beams or X-rays.

[Summary of the invention]

In the present invention, silicon is almost transparent to infrared rays, but the 8i02 film absorbs infrared rays, which is a difference in the properties of the two. It is characterized by irradiating infrared light from.

〔Effect of the invention〕

When infrared light is irradiated from the back side of the Si substrate, the 81 substrate absorbs almost no infrared light, so the infrared light is absorbed by the Si/Si substrate.
O, it reaches the interface. 8i/Sin, at the interface, 5
The temperature of Sin increases as it is absorbed by in2, and radiation damage such as positive charges in the gate oxide film is annealed out. In order not to disrupt the impurity profile in the diffusion layer or the boron distribution under the field, it is preferable to use a pulsed laser to instantaneously raise the temperature.

[Embodiments of the invention]

Practical examples of the present invention will be described below with reference to the drawings.

FIG. 2 shows an MO8 transistor used to demonstrate the present invention, in which element isolation regions 2 were formed by selective oxidation using a P-type (100) 6-8 Ω substrate 1. The gate WA3 is made of polycrystalline Si deposited using a vapor phase growth method.
The film thickness is 0.4 μm. Polycrystalline Si is phosphorus-diffused. Passivation film is CVD 8
With a two-layer structure of 102g14 and phosphoric glass film 5,
A total of 1 μm. The diffusion layer 6 is formed by ion incision of arsenic, and the depth Xj is 0.25 μm. The A film 7 is formed by sputtering and has a thickness of 0.8 μm. Polycrystalline S1, passivation film and A! All 111J etchings were carried out using a reactive ion etching method. 02 Ashing was used to remove the resist. On the Al wiring, phosphorus silicide glass 8 was deposited to a thickness of 12 μm. This channel length is 1.2
Measure the threshold voltage of a μm MO8 type transistor,
Then, the substrate was placed in an electron beam direct lithography device, and an acceleration voltage of 5 QKV was applied to the substrate.
Electron beam irradiation was performed at a dose of 300 μC. EB
After the irradiation was allowed to take place for at least some time, the threshold voltage was measured again and the deviation from the initial value was determined. Next, TEA-
A CO2 laser beam was irradiated from the back side of the wafer 1. The beam size is 811X2Q1g, which is wide enough to cover 2 chips. The pulse width is 10 to 20 nsec,
Pulse energy is 2J. First, each chip was irradiated with one pulse and then the threshold voltage was measured, and then each chip was further irradiated with two pulses and the threshold voltage was measured. Figure 3 shows the change in threshold voltage as a function of dose during the 30-minute annealing step at 450°C after EBB irradiation (curve 1) and during 1-pulse and 2-pulse laser beam sterilization (curves 2 and 3). It is plotted. It is clear that the threshold change caused by EB has been completely recovered.

In FIG. 4, a stress test was carried out with a drain voltage of 6 cm and a gate voltage of 6 cm, and neutral traps were measured by injecting hot electrons. Obviously, after EB heat irradiation, 5
When only annealing is performed at 0°C for 230 minutes (curve 1)
In comparison, the sample irradiated with the two-pulse TE human C02 laser beam (curve 2) shows less change in threshold voltage, indicating that the neutral trap is annealed.

Although this embodiment has described annealing damage caused by electron beams, it goes without saying that the present invention is also effective for damage caused by reactive ion etching and X-rays.

[Brief explanation of drawings]

Figure 1 is a characteristic diagram showing the relationship between the dose of electron beam irradiation on a MOS fi ) transistor, the acceleration voltage, and the shift of threshold voltage, and Figure 2 is a schematic diagram of an MO8 type transistor used to demonstrate the effects of the present invention. Figure, 3rd
The figure is a characteristic diagram in which the threshold voltage shift due to electron beam irradiation and subsequent laser beam irradiation is plotted against the dose, and FIG. 4 is a characteristic diagram showing the results of a reliability test of a MOS transistor. IP shop (100) Si substrate, 2 element isolation region, 3
Game) [Polar, 4,, CVD Sin,
Membrane, 5. Phosphoricated glass membrane, 6. Diffusion layer, 7 A
l membrane, 8 phosphorusilicate glass membrane. Figure 1

Claims (3)

[Claims] (1) A method for annealing a semiconductor device, characterized by irradiating infrared light from the back side of a silicon wafer on which elements are formed. (2) The method of annealing a semiconductor device according to claim 1, wherein the infrared light is carbon dioxide laser light. (3) The method of annealing a semiconductor device according to claim 1, wherein the carbon dioxide laser is a TEA-CO_2 laser.