JPS61228707A - 周波数弁別回路 - Google Patents

周波数弁別回路

Info

Publication number
JPS61228707A
JPS61228707A JP60069809A JP6980985A JPS61228707A JP S61228707 A JPS61228707 A JP S61228707A JP 60069809 A JP60069809 A JP 60069809A JP 6980985 A JP6980985 A JP 6980985A JP S61228707 A JPS61228707 A JP S61228707A
Authority
JP
Japan
Prior art keywords
circuit
frequency
tuning
output
frequency discrimination
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60069809A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0250642B2 (enrdf_load_html_response
Inventor
Yukio Sudo
幸夫 須藤
Noriyuki Akaha
赤羽　紀之
Shinobu Sakurai
忍 桜井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Keiki Inc
Original Assignee
Tokyo Keiki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Keiki Co Ltd filed Critical Tokyo Keiki Co Ltd
Priority to JP60069809A priority Critical patent/JPS61228707A/ja
Publication of JPS61228707A publication Critical patent/JPS61228707A/ja
Publication of JPH0250642B2 publication Critical patent/JPH0250642B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Radar Systems Or Details Thereof (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP60069809A 1985-04-02 1985-04-02 周波数弁別回路 Granted JPS61228707A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60069809A JPS61228707A (ja) 1985-04-02 1985-04-02 周波数弁別回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60069809A JPS61228707A (ja) 1985-04-02 1985-04-02 周波数弁別回路

Publications (2)

Publication Number Publication Date
JPS61228707A true JPS61228707A (ja) 1986-10-11
JPH0250642B2 JPH0250642B2 (enrdf_load_html_response) 1990-11-05

Family

ID=13413452

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60069809A Granted JPS61228707A (ja) 1985-04-02 1985-04-02 周波数弁別回路

Country Status (1)

Country Link
JP (1) JPS61228707A (enrdf_load_html_response)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002097991A3 (en) * 2001-05-31 2003-09-18 Koninkl Philips Electronics Nv Frequency locked loop, clock recovery circuit and receiver
JP2007298417A (ja) * 2006-04-28 2007-11-15 Furuno Electric Co Ltd レーダ装置、及びレーダ装置の同調処理方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6069810A (ja) * 1983-09-26 1985-04-20 Matsushita Electric Ind Co Ltd ヘッド用薄膜材料の評価方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6069810A (ja) * 1983-09-26 1985-04-20 Matsushita Electric Ind Co Ltd ヘッド用薄膜材料の評価方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002097991A3 (en) * 2001-05-31 2003-09-18 Koninkl Philips Electronics Nv Frequency locked loop, clock recovery circuit and receiver
JP2007298417A (ja) * 2006-04-28 2007-11-15 Furuno Electric Co Ltd レーダ装置、及びレーダ装置の同調処理方法

Also Published As

Publication number Publication date
JPH0250642B2 (enrdf_load_html_response) 1990-11-05

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