JPS6121725Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an information reading device that makes the reading speed of information on a recording medium variable according to the information transfer rate.

Today, serial data transmission methods have diversified as data (information) transfer methods, and eight types of data transfer rates have become necessary, ranging from 110 baud to 9600 baud. However, since the data reading speed was fixed, the information reading device had to be equipped with buffer memory.

In view of the above-mentioned points, the present invention provides an information reading device in which the reading speed of information on a recording medium is made variable in accordance with the selected value of the information transfer rate.

Another purpose of the present invention is to make the reading speed of information on a recording medium variable according to the selected value of the information transfer rate.
An information reading device that reduces buffer memory is provided.

An embodiment of the present invention will be described below with reference to the drawings.

The baud rate generator BG generates pulses according to the baud rate, and each output is a switch circuit.
Selected by SC and applied to other circuits.

Serial parallel converter (hereinafter referred to as converter)
SPCON outputs information applied in parallel in serial form, and the transfer speed is determined by the baud rate generator.
Can be changed by BG pulse.

The decoder DE detects an end code in the read information sent by the tape reader TR, and when it detects the end code, it outputs a signal with a logic value of 0.

Flip-flops FF1, FF2, and FF3 are reset by the logic value 0 of decoder DE.

The tape reader TR is activated by the output Q = 1 of flip-flop FF3 and transfers 8-bit information to the data bus.
Send to DB.

AG1 to AG3 are AND gates.

The operation of the embodiment having the above configuration will be explained.
The activation of the tape reader TR is set by the processing unit CPU to the flip-flop FF2 at the falling edge of the clock CP in FIG. 2 when the start signal SI in FIG. 2 becomes "1". At this point, the converter SPCON shown in Figure 1
EMPTY has no data in the register in the converter SPCON and is set to "1" as shown in FIG. 2C.
Under this condition, gate AG2 is opened and flip-flop FF3 is set at the falling edge of clock CP.
This signal starts reading the tape reader TR, and the data in Figure 2 is sent to the decoder DE and converter.
Input to SPCON. Decoder DE data
DEOUT in Figure 2 only when data is the end code
It becomes “0” as in Therefore, flip-flop FF2 does not become "0" and remains set. The data input to the converter SPCON in FIG. Stop reading operation.

The data input to the converter SPCON is latched by a register, and the output of the baud rate generator BG is input to the converter SPCON by a switch circuit SC, and the first output is input to the converter SPCON in accordance with the pulse of this transfer rate.
Serial data is sent to the processing unit CPU via the signal line L in the figure.
Transfer data. After the transfer, the converter SPCON
Since EMPTY is set to “1”, the gate shown in Figure 1
When AG2 satisfies the condition, flip-flop FF3
Set.

Next, a description of FIG. 2B will be given. This shows the case where the information transfer rate is set higher than in FIG. 2A. The paper tape reading start of the paper tape reader TR is the same as in the case of FIG. 2A. However, this time, the transfer data of data 4 in FIG. 1 is faster than the paper tape reading speed. This is because 9600 and 4800 baud SC1 were selected by the switch circuit SC. When selected by the switch circuit, the flip-flop FF is selected as shown in FIG. 2B.
1Q is set, and at this time gate AG in Figure 1
Condition 3 is not satisfied, flip-flop FF3
is not reset by the LOAD of the converter SPCON in FIG. 1, so the tape start signal S2 remains at "1" and the tape reader TR continues the reading operation. The read data data is transferred from the parallel register input to the decoder DE and the converter SPCON to the serial register, and then transferred to the processing unit CPU via the signal line L according to the transfer rate of the switch circuit SC, as shown in FIG. EMPTY becomes “1”. However, since the reading speed of the tape reader is slow, it is in a state of waiting for input of parallel data data from the converter SPCON shown in FIG.

By repeating this state, data is transferred to the processing unit CPU. Next, in the state shown in Figure 2 D, if the data read from the tape reader TR is an end code (ENDCODE), DEOUT in Figure 2 becomes "0" and FF in Figure 1
1, FF2, and FF3 are forcibly reset, so even if the EMPTY of the converter SPCON in Figure 1 becomes "1", the gate AG2 does not satisfy the condition.
In FIG. FF3, no reading operation is performed on the tape reader TR without being set.

In this way, by adjusting the reading operation of the tape reader to the transfer data rate, a control means that does not require a large number of buffer circuits can be created.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention. Figure 2 is a timing diagram. SPCON...Converter, BG...Baud rate generator, SC...Switch circuit.

Claims (1)

[Scope of utility model registration request] a selection means for selecting an information transfer rate; a transfer means for transferring information according to the information transfer rate determined by the selection means; a control means coupled to the transfer means to request information from a recording medium; and information from the control means. and means for supplying information on the recording medium to the transfer means in response to a request from the information reader.