JPS61216512A - Pulse width modulating circuit - Google Patents

Abstract

PURPOSE:To allow even a device which processes a high-speed digital signal to operate stably by connecting a current source which varies a current value with the input voltage of a modulated signal and a capacitor, to the emitter of an input emitter follower circuit, and comparing the voltage across the capacitor with a specified voltage and outputting it. CONSTITUTION:When the input voltage of the modulated signal rises, a bias current I1 decreases corresponding to it and the discharge time constant of a capacitor C1 increases. The voltage across the capacitor C1, therefore, becomes slower in the rising of the waveform as the input voltage of the modulated signal rises. This voltage is inputted to the transistor (TR) Q1 of a comparator and compared with a reference voltage Vref inputted to the TR Q4, so that a waveform which varies in pulse width at its trailing edge and increases gradually according to the voltage of the modulated input signal is outputted.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is applicable to pulse width modulation circuits for analog signals in devices that handle digital signals, particularly for use in monitoring the transmission quality of optical repeaters. The present invention relates to an improvement in a pulse width modulation circuit for analog signals when handling the above digital signals.

It is desired that the above-mentioned pulse width modulation circuit be able to realize stable modulation even when handling high-speed digital signals of several tens of MHz or more, and be able to be miniaturized with a simple circuit configuration.

[Prior Art] - Fig. 5 is a block diagram showing the configuration of a conventional pulse width modulation circuit, and Fig. 6 is a time chart of □ waveforms of various parts in Fig. 5. In the figure, 1 is a sampling circuit, 2 is a holding circuit, 3 is a comparator, and 4 is a sawtooth wave generator.

In FIG. 5, the analog input signal shown in FIG.
The converted value shown in FIG. 6(b) is held in the holding circuit 2 and input to the comparator 3.

On the other hand, as shown in FIG. 6 (
A sawtooth wave shown in (c) of A) is generated and inputted to the comparator 3, and the voltage is compared with the above-mentioned held PAM wave to obtain the signal shown in Fig. 6 (B).
) to obtain a pulse width modulated (PWM) output.

Of course, in this case, the comparison wave may be a triangular wave instead of a sawtooth wave.

Furthermore, as a pulse width modulation circuit, the input analog signal is
There is also a method of superimposing a comparison wave (sawtooth wave or triangular wave) with a repeating sampling period and extracting the time when a certain slip level is exceeded.

[Problem that the invention seeks to solve]

However, conventional pulse width modulation circuits require special waveform generation circuits such as sawtooth waves or triangular waves, which has the problem of complicating the circuit and making the special waveform generation unstable in the case of high-speed clock input signals of several tens of MHz or more. Therefore, there is a problem that stable pulse width modulation cannot be performed.

[Means for solving problems]

The above problem can be solved by connecting a current source and a capacitor whose current value is varied according to the modulation signal input voltage to the emitter of an input emitter-forward circuit that inputs a pulse signal, and then adjusting the voltage across the capacitor to a predetermined value using a comparator. This problem is solved by the pulse width modulation circuit of the present invention, which compares the voltage with the voltage and outputs the comparison result.

[Effect]

According to the present invention, as the modulation signal input (analog signal) increases, the current of the current source decreases accordingly, the changing voltage of the input clock pulse is constant, and the changing voltage across the capacitor is constant. Therefore, if the current decreases, the time constant when discharging the capacitor increases, and the amount of variation in the relative pulse width of the input clock pulse voltage generated across the capacitor is proportional to the amplitude of the modulation signal input voltage. Then pulse width modulation is performed.

Therefore, since this circuit can be constructed using general transistors, resistors, and capacitor elements without using any special circuit, a stable pulse width modulation circuit can be obtained even with high-speed signals of several tens of MHz or more, and it can be constructed with a small-scale circuit. It can be integrated into an IC and can be made smaller.

〔Example〕

FIG. 1 is a circuit diagram of a pulse width modulation circuit according to an embodiment of the present invention,
Fig. 2 is a characteristic diagram for explaining the principle of variable pulse width in Fig. 1, Fig. 3 is a time chart of waveforms of various parts in Fig. 1,
FIG. 4 is a characteristic diagram showing the modulation signal input voltage versus relative pulse width fluctuation amount.

In Figure 1, 5 is a constant current source, Q1 to Q4 are transistors, and R
1-R3 is a resistor, C1 is a capacitor, and transistor Q3. Q4. By resistors R1, R2゜ constant current source 5,
A comparator is configured to compare with reference voltage Vrer.

□ In FIG. 1, the current source that varies the current value according to the modulation signal input (analog signal) voltage is the transistor Q2. It is made up of a resistor R1 and changes the Iasumi flow 11 of the input limiter follower circuit which inputs a clock pulse signal made up of a transistor Q1. □ The capacitor CI connected to this part and the emitter of the transistor The main parts of the present invention are constructed as follows, considering the principle of varying the pulse width.

In Fig. 1, the voltage shown in Fig. 2 (A) is from ■H to V.
Considering the case where a clock pulse that changes to L is input to the transistor Q1, if there is no capacitor C1, the potential at point b of the emitter of the transistor Q1 will remain as it is, VC = VH - VL, as shown in Figure 2 (A). only changes.

However, due to the presence of capacitor C1, the potential at point b is delayed by time T due to this time constant, as shown in Figure 2 (B).
Voltage VC from the side closer to the ground voltage to the power supply voltage -■
only changes.

This time T becomes longer if the bias current 11 is smaller, and becomes shorter if the bias current 11 is larger.

In other words, as the voltage of the modulation signal input increases, the current 11 decreases, and therefore the time T increases.

The present invention utilizes this point to perform pulse width modulation.

Next, to explain the case where the modulation signal input voltage gradually increases, using FIG. 2, the clock pulse shown in FIG. 2 (A) is input to the transistor Q1, and the modulation signal input voltage increases. As it increases, the bias current If decreases accordingly and the discharge time constant of the capacitor CI increases.

Therefore, as shown in FIG. 3(B), as the modulation signal input voltage increases, the voltage across the capacitor C1 becomes slower in its waveform.

This voltage is input to the transistor Q1 of the comparator, and the reference voltage Vr in FIG. 3(B) is input to the transistor Q4.
From the output terminal OUT, if there is no modulation signal, the pulse width changes from tl to t, and changes from tl to t2°, from t3 to t4', and from t5 depending on the voltage of the modulation input signal.
A waveform that gradually becomes wider from t6· is output.

In Figure 4, the input pulse is 100MH! This is a characteristic diagram of the modulation signal input voltage versus the relative pulse width variation amount obtained as a result of simulating the circuit in Figure 1 with a computer using a clock pulse of 200 mV. The amount of variation in pulse width was obtained.

As shown in Figure 1, this pulse width modulation circuit is composed of ordinary transistors, resistors, and capacitors, does not require a special waveform generation circuit, and is stable even in equipment that handles high-speed digital signals of several tens of MH2 or more. In addition, it can be integrated into an IC with a small-scale circuit configuration and can be miniaturized.

〔Effect of the invention〕

As explained in detail above, according to the present invention, the pulse width modulation circuit is composed of ordinary transistors, resistors, and capacitors, does not require a special waveform generation circuit, and is stable even in equipment that handles high-speed digital signals of several tens of MHz or more. It is possible to operate the IC with a small-scale circuit configuration.
It has the advantage that it can be made smaller and more compact.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of a pulse width modulation circuit according to an embodiment of the present invention, Fig. 2 is a characteristic diagram for explaining the principle of pulse width variation in Fig. 1, and Fig. 3 is a time diagram of waveforms at various parts in Fig. 1. 4 is a characteristic diagram showing the relative amount of pulse width fluctuation versus modulation signal input voltage, FIG. 5 is a block diagram showing the configuration of a conventional pulse width modulation circuit, and FIG. 6 is each part of FIG. 5. This is a time chart of the waveform. In the figure, 1 is a sampling circuit, 2 is a holding circuit, 3 is a comparator, 4 is a sawtooth wave generator, 5 is a constant current source, Ql to Q4 are transistors, R1 to R3 are resistors, and C1 is a capacitor. . (A) (B) Part 2 Figure' 0.1 0.2 0.3 0.4 change 1
Zhou A word 3゛ Input electric power-T country 4 Tuto 35 Tui 6 Fig.

Claims (1)

[Claims] A current source whose current value is varied depending on the modulation signal input voltage and a capacitor are connected to the emitter of the input emitter follower circuit that inputs the pulse signal, and the voltage across the capacitor is compared with a predetermined voltage using a comparator. A pulse width modulation circuit characterized by outputting a result.