JPS61214694A - データ伝送のスイッチング装置 - Google Patents

データ伝送のスイッチング装置

Info

Publication number
JPS61214694A
JPS61214694A JP60283194A JP28319485A JPS61214694A JP S61214694 A JPS61214694 A JP S61214694A JP 60283194 A JP60283194 A JP 60283194A JP 28319485 A JP28319485 A JP 28319485A JP S61214694 A JPS61214694 A JP S61214694A
Authority
JP
Japan
Prior art keywords
message
output
buffer
control
adapter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60283194A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0453358B2 (cg-RX-API-DMAC7.html
Inventor
ピーター・アンソニー・フラナスゼツク
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS61214694A publication Critical patent/JPS61214694A/ja
Publication of JPH0453358B2 publication Critical patent/JPH0453358B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/64—Distributing or queueing
    • H04Q3/68—Grouping or interlacing selector groups or stages

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Multi Processors (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
JP60283194A 1985-03-18 1985-12-18 データ伝送のスイッチング装置 Granted JPS61214694A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US71311785A 1985-03-18 1985-03-18
US713117 1985-03-18

Publications (2)

Publication Number Publication Date
JPS61214694A true JPS61214694A (ja) 1986-09-24
JPH0453358B2 JPH0453358B2 (cg-RX-API-DMAC7.html) 1992-08-26

Family

ID=24864807

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60283194A Granted JPS61214694A (ja) 1985-03-18 1985-12-18 データ伝送のスイッチング装置

Country Status (5)

Country Link
US (1) US4814762A (cg-RX-API-DMAC7.html)
EP (1) EP0195589B1 (cg-RX-API-DMAC7.html)
JP (1) JPS61214694A (cg-RX-API-DMAC7.html)
CA (1) CA1263729A (cg-RX-API-DMAC7.html)
DE (1) DE3685599T2 (cg-RX-API-DMAC7.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05501358A (ja) * 1989-11-27 1993-03-18 チノイン　ジョジェセル　エス　ベジェセティ　テルメケク　ジャラ　エルテー バンコマイシンの調製方法

Families Citing this family (33)

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Publication number Priority date Publication date Assignee Title
US4897641A (en) * 1986-12-04 1990-01-30 Pascom Pty. Ltd. Space switch
FR2620285B1 (fr) * 1987-09-07 1990-01-19 Velikanov Cyrille Procede et dispositif de commandes de commutations dans un ensemble d'interconnexions
US4833468A (en) * 1987-10-14 1989-05-23 Unisys Corporation Layered network
US4929939A (en) * 1988-10-31 1990-05-29 International Business Machines Corporation High-speed switching system with flexible protocol capability
US5163149A (en) * 1988-11-02 1992-11-10 International Business Machines Corporation Combining switch for reducing accesses to memory and for synchronizing parallel processes
US5039986A (en) * 1988-11-15 1991-08-13 International Business Machines Corporation High speed dynamic allocator for various length time slots
US4952930A (en) * 1988-11-18 1990-08-28 International Business Machines Corp. Multipath hierarchical network
US4984237A (en) * 1989-06-29 1991-01-08 International Business Machines Corporation Multistage network with distributed pipelined control
KR940002905B1 (en) * 1989-12-15 1994-04-07 Ibm Apparatus for conditioning priority arbitration in buffered direct memory addressing
JP2770936B2 (ja) * 1990-12-18 1998-07-02 インターナショナル・ビジネス・マシーンズ・コーポレイション 通信ネットワークおよび通信チャンネルをつくる方法
CA2113647A1 (en) * 1991-08-05 1993-02-18 Aloke Guha Crossbar with return net for scalable self-routing non-blocking message switching and routing system
CA2113725A1 (en) * 1991-08-05 1993-02-18 Aloke Guha Scalable self-routing non-blocking message switching and routing network
EP0600997A1 (en) * 1991-08-05 1994-06-15 Honeywell Inc. Message structure for scalable self-routing non-blocking message switching and routing system
EP0602916A3 (en) * 1992-12-14 1994-08-10 Hewlett Packard Co Cross-bar interconnect apparatus.
JP3483284B2 (ja) * 1993-12-28 2004-01-06 富士通株式会社 並列プロセッサシステム用ネットワークサブ装置および並列プロセッサシステム用ネットワーク装置
KR0132944B1 (ko) * 1994-12-23 1998-04-21 양승택 데이터 교환장치
US5742597A (en) * 1996-03-14 1998-04-21 Motorola, Inc. Method and device for multipoint switching and arbitration in output-request packet switch
US5790545A (en) * 1996-03-14 1998-08-04 Motorola Inc. Efficient output-request packet switch and method
US5754791A (en) * 1996-03-25 1998-05-19 I-Cube, Inc. Hierarchical address translation system for a network switch
US5784003A (en) * 1996-03-25 1998-07-21 I-Cube, Inc. Network switch with broadcast support
US5689644A (en) * 1996-03-25 1997-11-18 I-Cube, Inc. Network switch with arbitration sytem
EP0950225B1 (en) * 1997-10-21 2006-01-04 Koninklijke Philips Electronics N.V. Signal processing device and method of planning connections between processors in a signal processing device
US6243770B1 (en) * 1998-07-21 2001-06-05 Micron Technology, Inc. Method for determining status of multiple interlocking FIFO buffer structures based on the position of at least one pointer of each of the multiple FIFO buffers
WO2001026345A1 (en) * 1999-09-30 2001-04-12 Fujitsu Limited Method for controlling setting of network and device for controlling setting of network
US6529983B1 (en) 1999-11-03 2003-03-04 Cisco Technology, Inc. Group and virtual locking mechanism for inter processor synchronization
US6892237B1 (en) 2000-03-28 2005-05-10 Cisco Technology, Inc. Method and apparatus for high-speed parsing of network messages
US6505269B1 (en) 2000-05-16 2003-01-07 Cisco Technology, Inc. Dynamic addressing mapping to eliminate memory resource contention in a symmetric multiprocessor system
CN1777878A (zh) * 2003-03-24 2006-05-24 索尼计算机娱乐公司 纵横制交换机,方法和用于控制其操作的程序
US20060155563A1 (en) * 2005-01-12 2006-07-13 Banerjee Dwip N Method, system and article for advance lease negotiation in DHCP
RU2360283C2 (ru) * 2007-08-13 2009-06-27 Государственное образовательное учреждение высшего профессионального образования Курский государственный технический университет Коммутационный модуль с параллельно-конвейерной обработкой и вещанием сообщений
RU2416121C2 (ru) * 2009-03-10 2011-04-10 Государственное образовательное учреждение высшего профессионального образования "Юго-Западный государственный университет" (ЮЗГУ) Устройство адаптивной коммутации сообщений
TWI453605B (zh) * 2012-11-13 2014-09-21 Askey Computer Corp 資料傳輸選擇電路及方法
US12450182B2 (en) * 2022-11-14 2025-10-21 Faisal A. Qureshi Distributed queue multi-bus on multi-CPU chips

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2155120A5 (cg-RX-API-DMAC7.html) * 1971-10-08 1973-05-18 Labo Cent Telecommunicat
US4074233A (en) * 1976-06-30 1978-02-14 Norlin Music, Inc. Selection switch memory circuit
JPS5346216A (en) * 1976-10-08 1978-04-25 Nec Corp Time sharing multiplex commnicating unit
JPS582513B2 (ja) * 1978-03-03 1983-01-17 株式会社日立製作所 ネットワ−ク駆動方式
JPS55143652A (en) * 1979-04-25 1980-11-10 Hitachi Ltd Series-parallel signal converter
JPS56119596A (en) * 1980-02-26 1981-09-19 Nec Corp Control signal generator
US4393381A (en) * 1981-01-02 1983-07-12 T-Bar Incorporated Transfer bus matrix
EP0094130B1 (en) * 1982-05-07 1987-01-21 Philips Electronics Uk Limited Data entry keyboard apparatus
US4518960A (en) * 1982-11-23 1985-05-21 Burroughs Corporation Speed independent selector switch employing M-out-of-N codes

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05501358A (ja) * 1989-11-27 1993-03-18 チノイン　ジョジェセル　エス　ベジェセティ　テルメケク　ジャラ　エルテー バンコマイシンの調製方法

Also Published As

Publication number Publication date
EP0195589A2 (en) 1986-09-24
DE3685599T2 (de) 1993-01-21
EP0195589B1 (en) 1992-06-10
US4814762A (en) 1989-03-21
EP0195589A3 (en) 1989-07-19
DE3685599D1 (de) 1992-07-16
CA1263729A (en) 1989-12-05
JPH0453358B2 (cg-RX-API-DMAC7.html) 1992-08-26

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